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Trivial, cosmetic change from review of last PR

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This commit is contained in:
Gregory Nutt
2018-03-04 06:51:37 -06:00
parent f745b4404a
commit 6c729d6a7b
1 changed files with 32 additions and 32 deletions
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arch/arm/src/stm32/chip/stm32f33xxx_hrtim.h
+32 -32
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@@ -960,38 +960,38 @@
/* Timer X Capture 12 Control Register */
#define HRTIM_TIMCPT12CR_SWCPT (1 << 0)
#define HRTIM_TIMCPT12CR_UPDCPT (1 << 1)
#define HRTIM_TIMCPT12CR_EXEV1CPT (1 << 2)
#define HRTIM_TIMCPT12CR_EXEV2CPT (1 << 3)
#define HRTIM_TIMCPT12CR_EXEV3CPT (1 << 4)
#define HRTIM_TIMCPT12CR_EXEV4CPT (1 << 5)
#define HRTIM_TIMCPT12CR_EXEV5CPT (1 << 6)
#define HRTIM_TIMCPT12CR_EXEV6CPT (1 << 7)
#define HRTIM_TIMCPT12CR_EXEV7CPT (1 << 8)
#define HRTIM_TIMCPT12CR_EXEV8CPT (1 << 9)
#define HRTIM_TIMCPT12CR_EXEV9CPT (1 << 10)
#define HRTIM_TIMCPT12CR_EXEV10CPT (1 << 11)
#define HRTIM_TIMCPT12CR_TA1SET (1 << 12)
#define HRTIM_TIMCPT12CR_TA1RST (1 << 13)
#define HRTIM_TIMCPT12CR_TACMP1 (1 << 14)
#define HRTIM_TIMCPT12CR_TACMP2 (1 << 15)
#define HRTIM_TIMCPT12CR_TB1SET (1 << 16)
#define HRTIM_TIMCPT12CR_TB1RST (1 << 17)
#define HRTIM_TIMCPT12CR_TBCMP1 (1 << 18)
#define HRTIM_TIMCPT12CR_TBCMP2 (1 << 19)
#define HRTIM_TIMCPT12CR_TC1SET (1 << 20)
#define HRTIM_TIMCPT12CR_TC1RST (1 << 21)
#define HRTIM_TIMCPT12CR_TCCMP1 (1 << 22)
#define HRTIM_TIMCPT12CR_TCCMP2 (1 << 23)
#define HRTIM_TIMCPT12CR_TD1SET (1 << 24)
#define HRTIM_TIMCPT12CR_TD1RST (1 << 25)
#define HRTIM_TIMCPT12CR_TDCMP1 (1 << 26)
#define HRTIM_TIMCPT12CR_TDCMP2 (1 << 27)
#define HRTIM_TIMCPT12CR_TE1SET (1 << 28)
#define HRTIM_TIMCPT12CR_TE1RST (1 << 29)
#define HRTIM_TIMCPT12CR_TECMP1 (1 << 30)
#define HRTIM_TIMCPT12CR_TECMP2 (1 << 31)
#define HRTIM_TIMCPT12CR_SWCPT (1 << 0)
#define HRTIM_TIMCPT12CR_UPDCPT (1 << 1)
#define HRTIM_TIMCPT12CR_EXEV1CPT (1 << 2)
#define HRTIM_TIMCPT12CR_EXEV2CPT (1 << 3)
#define HRTIM_TIMCPT12CR_EXEV3CPT (1 << 4)
#define HRTIM_TIMCPT12CR_EXEV4CPT (1 << 5)
#define HRTIM_TIMCPT12CR_EXEV5CPT (1 << 6)
#define HRTIM_TIMCPT12CR_EXEV6CPT (1 << 7)
#define HRTIM_TIMCPT12CR_EXEV7CPT (1 << 8)
#define HRTIM_TIMCPT12CR_EXEV8CPT (1 << 9)
#define HRTIM_TIMCPT12CR_EXEV9CPT (1 << 10)
#define HRTIM_TIMCPT12CR_EXEV10CPT (1 << 11)
#define HRTIM_TIMCPT12CR_TA1SET (1 << 12)
#define HRTIM_TIMCPT12CR_TA1RST (1 << 13)
#define HRTIM_TIMCPT12CR_TACMP1 (1 << 14)
#define HRTIM_TIMCPT12CR_TACMP2 (1 << 15)
#define HRTIM_TIMCPT12CR_TB1SET (1 << 16)
#define HRTIM_TIMCPT12CR_TB1RST (1 << 17)
#define HRTIM_TIMCPT12CR_TBCMP1 (1 << 18)
#define HRTIM_TIMCPT12CR_TBCMP2 (1 << 19)
#define HRTIM_TIMCPT12CR_TC1SET (1 << 20)
#define HRTIM_TIMCPT12CR_TC1RST (1 << 21)
#define HRTIM_TIMCPT12CR_TCCMP1 (1 << 22)
#define HRTIM_TIMCPT12CR_TCCMP2 (1 << 23)
#define HRTIM_TIMCPT12CR_TD1SET (1 << 24)
#define HRTIM_TIMCPT12CR_TD1RST (1 << 25)
#define HRTIM_TIMCPT12CR_TDCMP1 (1 << 26)
#define HRTIM_TIMCPT12CR_TDCMP2 (1 << 27)
#define HRTIM_TIMCPT12CR_TE1SET (1 << 28)
#define HRTIM_TIMCPT12CR_TE1RST (1 << 29)
#define HRTIM_TIMCPT12CR_TECMP1 (1 << 30)
#define HRTIM_TIMCPT12CR_TECMP2 (1 << 31)
/* Timer X Output Register */