xtensa/esp32: Add efuse driver

This commit is contained in:
Alan C. Assis
2021-01-19 20:01:59 -03:00
committed by Xiang Xiao
parent 3e9b89f778
commit 6a87b85285
10 changed files with 1494 additions and 0 deletions
@@ -0,0 +1,69 @@
/****************************************************************************
* arch/xtensa/include/esp32/esp_efuse_table.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifdef __cplusplus
extern "C"
{
#endif
extern const efuse_desc_t *ESP_EFUSE_MAC_FACTORY[];
extern const efuse_desc_t *ESP_EFUSE_MAC_FACTORY_CRC[];
extern const efuse_desc_t *ESP_EFUSE_MAC_CUSTOM_CRC[];
extern const efuse_desc_t *ESP_EFUSE_MAC_CUSTOM[];
extern const efuse_desc_t *ESP_EFUSE_MAC_CUSTOM_VER[];
extern const efuse_desc_t *ESP_EFUSE_SECURE_BOOT_KEY[];
extern const efuse_desc_t *ESP_EFUSE_ABS_DONE_0[];
extern const efuse_desc_t *ESP_EFUSE_ENCRYPT_FLASH_KEY[];
extern const efuse_desc_t *ESP_EFUSE_ENCRYPT_CONFIG[];
extern const efuse_desc_t *ESP_EFUSE_DISABLE_DL_ENCRYPT[];
extern const efuse_desc_t *ESP_EFUSE_DISABLE_DL_DECRYPT[];
extern const efuse_desc_t *ESP_EFUSE_DISABLE_DL_CACHE[];
extern const efuse_desc_t *ESP_EFUSE_FLASH_CRYPT_CNT[];
extern const efuse_desc_t *ESP_EFUSE_DISABLE_JTAG[];
extern const efuse_desc_t *ESP_EFUSE_CONSOLE_DEBUG_DISABLE[];
extern const efuse_desc_t *ESP_EFUSE_UART_DOWNLOAD_DIS[];
extern const efuse_desc_t *ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT[];
extern const efuse_desc_t *ESP_EFUSE_WR_DIS_BLK1[];
extern const efuse_desc_t *ESP_EFUSE_WR_DIS_BLK2[];
extern const efuse_desc_t *ESP_EFUSE_WR_DIS_BLK3[];
extern const efuse_desc_t *ESP_EFUSE_RD_DIS_BLK1[];
extern const efuse_desc_t *ESP_EFUSE_RD_DIS_BLK2[];
extern const efuse_desc_t *ESP_EFUSE_RD_DIS_BLK3[];
extern const efuse_desc_t *ESP_EFUSE_CHIP_VER_DIS_APP_CPU[];
extern const efuse_desc_t *ESP_EFUSE_CHIP_VER_DIS_BT[];
extern const efuse_desc_t *ESP_EFUSE_CHIP_VER_PKG[];
extern const efuse_desc_t *ESP_EFUSE_CHIP_CPU_FREQ_LOW[];
extern const efuse_desc_t *ESP_EFUSE_CHIP_CPU_FREQ_RATED[];
extern const efuse_desc_t *ESP_EFUSE_CHIP_VER_REV1[];
extern const efuse_desc_t *ESP_EFUSE_CHIP_VER_REV2[];
extern const efuse_desc_t *ESP_EFUSE_XPD_SDIO_REG[];
extern const efuse_desc_t *ESP_EFUSE_SDIO_TIEH[];
extern const efuse_desc_t *ESP_EFUSE_SDIO_FORCE[];
extern const efuse_desc_t *ESP_EFUSE_ADC_VREF_AND_SDIO_DREF[];
extern const efuse_desc_t *ESP_EFUSE_ADC1_TP_LOW[];
extern const efuse_desc_t *ESP_EFUSE_ADC2_TP_LOW[];
extern const efuse_desc_t *ESP_EFUSE_ADC1_TP_HIGH[];
extern const efuse_desc_t *ESP_EFUSE_ADC2_TP_HIGH[];
extern const efuse_desc_t *ESP_EFUSE_SECURE_VERSION[];
#ifdef __cplusplus
}
#endif
+6
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@@ -58,6 +58,12 @@ config ESP32_BT
---help---
No yet implemented
config ESP32_EFUSE
bool "EFUSE support"
default n
---help---
Enable ESP32 efuse support.
config ESP32_EMAC
bool "Ethernet MAC"
default n
+6
View File
@@ -128,6 +128,12 @@ CHIP_CSRCS += esp32_psram.c
CHIP_CSRCS += esp32_himem.c
endif
ifeq ($(CONFIG_ESP32_EFUSE),y)
CHIP_CSRCS += esp32_efuse.c
CHIP_CSRCS += esp32_efuse_table.c
CHIP_CSRCS += esp32_efuse_lowerhalf.c
endif
ifeq ($(CONFIG_ESP32_EMAC),y)
CHIP_CSRCS += esp32_emac.c
endif
File diff suppressed because it is too large Load Diff
+63
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@@ -0,0 +1,63 @@
/****************************************************************************
* arch/xtensa/src/esp32/esp32_efuse.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* Type of eFuse blocks for ESP32 */
typedef enum
{
EFUSE_BLK0 = 0, /* Reserved. */
EFUSE_BLK1 = 1, /* Used for Flash Encryption. */
EFUSE_BLK2 = 2, /* Used for Secure Boot. */
EFUSE_BLK3 = 3, /* Uses for the purpose of the user. */
EFUSE_BLK_MAX
} esp_efuse_block_t;
/* This is type of function that will handle the efuse field register.
*
* num_reg The register number in the block.
* efuse_block Block number.
* bit_start Start bit in the register.
* bit_count The number of bits used in the register.
* arr A pointer to an array or variable.
* bits_counter Counter bits.
*
* return
* - OK: The operation was successfully completed.
* - other efuse component errors.
*/
typedef int (*efuse_func_proc_t) (unsigned int num_reg,
int starting_bit_num_in_reg,
int num_bits_used_in_reg,
void *arr, int *bits_counter);
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
int esp_efuse_read_field(const efuse_desc_t *field[], void *dst,
size_t dst_size_bits);
int esp_efuse_write_field(const efuse_desc_t *field[],
const void *src, size_t src_size_bits);
void esp_efuse_burn_efuses(void);
int esp32_efuse_initialize(FAR const char *devpath);
@@ -0,0 +1,193 @@
/****************************************************************************
* arch/xtensa/src/esp32/esp32_efuse.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <stdlib.h>
#include <debug.h>
#include <assert.h>
#include <nuttx/kmalloc.h>
#include <nuttx/efuse/efuse.h>
#include "hardware/esp32_soc.h"
#include "esp32_efuse.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
struct esp32_efuse_lowerhalf_s
{
FAR const struct efuse_ops_s *ops; /* Lower half operations */
void *upper; /* Pointer to efuse_upperhalf_s */
};
/****************************************************************************
* Private Functions Prototypes
****************************************************************************/
/* "Lower half" driver methods **********************************************/
static int esp32_efuse_read_field(FAR struct efuse_lowerhalf_s *lower,
const efuse_desc_t *field[],
FAR uint8_t *data, size_t size);
static int esp32_efuse_write_field(FAR struct efuse_lowerhalf_s *lower,
const efuse_desc_t *field[],
FAR const uint8_t *data,
size_t size);
static int efuse_ioctl(FAR struct efuse_lowerhalf_s *lower, int cmd,
unsigned long arg);
/****************************************************************************
* Private Data
****************************************************************************/
/* "Lower half" driver methods */
static const struct efuse_ops_s g_esp32_efuse_ops =
{
.read_field = esp32_efuse_read_field,
.write_field = esp32_efuse_write_field,
.ioctl = efuse_ioctl,
};
/* EFUSE lower-half */
static struct esp32_efuse_lowerhalf_s g_esp32_efuse_lowerhalf =
{
.ops = &g_esp32_efuse_ops,
.upper = NULL,
};
/****************************************************************************
* Private functions
****************************************************************************/
static int esp32_efuse_read_field(FAR struct efuse_lowerhalf_s *lower,
const efuse_desc_t *field[],
uint8_t *data, size_t bits_len)
{
int ret = OK;
/* Read the requested field */
ret = esp_efuse_read_field(field, data, bits_len);
return ret;
}
static int esp32_efuse_write_field(FAR struct efuse_lowerhalf_s *lower,
const efuse_desc_t *field[],
const uint8_t *data, size_t bits_len)
{
irqstate_t flags;
int ret = OK;
flags = enter_critical_section();
/* Write the blob data to the field */
ret = esp_efuse_write_field(field, data, bits_len);
/* Burn the EFUSEs */
esp_efuse_burn_efuses();
leave_critical_section(flags);
return ret;
}
/****************************************************************************
* Name: efuse_ioctl
****************************************************************************/
static int efuse_ioctl(FAR struct efuse_lowerhalf_s *lower,
int cmd, unsigned long arg)
{
int ret = OK;
switch (cmd)
{
/* We don't have proprietary EFUSE ioctls */
default:
{
minfo("Unrecognized cmd: %d\n", cmd);
ret = -ENOTTY;
}
break;
}
return ret;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp32_efuse_initialize
*
* Description:
* Initialize the efuse driver. The efuse is initialized
* and registered as 'devpath'.
*
* Input Parameters:
* devpath - The full path to the efuse. This should
* be of the form /dev/efuse
*
* Returned Values:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure.
*
****************************************************************************/
int esp32_efuse_initialize(FAR const char *devpath)
{
struct esp32_efuse_lowerhalf_s *lower = NULL;
int ret = OK;
DEBUGASSERT(devpath);
lower = &g_esp32_efuse_lowerhalf;
/* Register the efuser upper driver */
lower->upper = efuse_register(devpath,
(FAR struct efuse_lowerhalf_s *)lower);
if (lower->upper == NULL)
{
/* The actual cause of the failure may have been a failure to allocate
* perhaps a failure to register the efuser driver (such as if the
* 'devpath' were not unique). We know here but we return EEXIST to
* indicate the failure (implying the non-unique devpath).
*/
ret = -EEXIST;
goto errout;
}
errout:
return ret;
}
File diff suppressed because it is too large Load Diff
@@ -21,6 +21,12 @@
#ifndef __ARCH_XTENSA_INCLUDE_EFUSE_REG_H
#define __ARCH_XTENSA_INCLUDE_EFUSE_REG_H
/****************************************************************************
* Included Files
****************************************************************************/
#include "esp32_soc.h"
#define EFUSE_BLK0_RDATA0_REG (DR_REG_EFUSE_BASE + 0x000)
/* EFUSE_RD_FLASH_CRYPT_CNT : RO ;bitpos:[26:20] ;default: 7'b0 ;
@@ -215,6 +215,7 @@
#define DR_REG_RTCIO_BASE 0x3ff48400
#define DR_REG_SARADC_BASE 0x3ff48800
#define DR_REG_IO_MUX_BASE 0x3ff49000
#define DR_REG_EFUSE_BASE 0x3ff5a000
#define DR_REG_RTCMEM0_BASE 0x3ff61000
#define DR_REG_RTCMEM1_BASE 0x3ff62000
#define DR_REG_RTCMEM2_BASE 0x3ff63000
@@ -170,6 +170,14 @@ int esp32_bringup(void)
}
#endif
#if defined(CONFIG_ESP32_EFUSE)
ret = esp32_efuse_initialize("/dev/efuse");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret);
}
#endif
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */