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ATMEGA2560: Most cosmetic changes from review of pull request

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This commit is contained in:
Gregory Nutt
2015-12-29 13:02:20 -06:00
parent 87a6662998
commit 68cc2ecfd2
15 changed files with 286 additions and 298 deletions
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arch/avr/include/atmega/irq.h
+2 -3
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@@ -146,7 +146,7 @@
# define ATMEGA_IRQ_INT4 6 /* 0x000A INT4 External Interrupt Request 4 */
# define ATMEGA_IRQ_INT5 7 /* 0x000C INT5 External Interrupt Request 5 */
# define ATMEGA_IRQ_INT6 8 /* 0x000E INT6 External Interrupt Request 6 */
# define ATMEGA_IRQ_INT7 9 /* 0x0010 INT7 External Interrupt Request 7 */
# define ATMEGA_IRQ_INT7 9 /* 0x0010 INT7 External Interrupt Request 7 */
# define ATMEGA_IRQ_PCINT0 10 /* 0x0012 PCINT0 Pin Change Interrupt Req 0 */
# define ATMEGA_IRQ_PCINT1 11 /* 0x0014 PCINT1 Pin Change Interrupt Req 1 */
# define ATMEGA_IRQ_PCINT2 12 /* 0x0016 PCINT2 Pin Change Interrupt Req 2 */
@@ -194,7 +194,7 @@
# define ATMEGA_IRQ_USART2_TXC 54 /* 0x006A USART2 TX USART2 Tx Complete */
# define ATMEGA_IRQ_USART3_RXC 55 /* 0x006C USART3 RX USART3 Rx Complete */
# define ATMEGA_IRQ_USART3_UDRE 56 /* 0x006E USART3 UDRE USART3 Data Register Empty */
# define ATMEGA_IRQ_USART3_TXC 57 /* 0x0070 USART3 TX USART3 Tx Complete */
# define ATMEGA_IRQ_USART3_TXC 57 /* 0x0070 USART3 TX USART3 Tx Complete */
# define NR_IRQS 58
# define ATMEGA_PC_SIZE 24
@@ -239,4 +239,3 @@ extern "C"
#endif
#endif /* __ARCH_AVR_INCLUDE_ATMEGA_IRQ_H */
arch/avr/include/avr/irq.h
+4 -5
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@@ -94,7 +94,7 @@
#define REG_PC0 35 /* PC */
#define REG_PC1 36
#if ATMEGA_PC_SIZE > 16
#define REG_PC2 37
# define REG_PC2 37
#endif
/****************************************************************************
@@ -166,9 +166,9 @@ static inline irqstate_t irqsave(void)
asm volatile
(
"\tin %0, __SREG__\n"
"\tcli\n"
: "=&r" (sreg) ::
);
"\tcli\n"
: "=&r" (sreg) ::
);
return sreg;
}
@@ -204,4 +204,3 @@ extern "C"
#endif
#endif /* __ARCH_AVR_INCLUDE_AVR_IRQ_H */
arch/avr/src/Makefile
-1
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@@ -183,4 +183,3 @@ endif
$(call DELFILE, .depend)
-include Make.dep
arch/avr/src/atmega/Kconfig
-2
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@@ -39,7 +39,6 @@ config AVR_USART1
endmenu # ATMega Peripheral Selections
menu "Low level UART driver options"
depends on AVR_USART0 || AVR_USART1
@@ -54,4 +53,3 @@ config SERIAL_TERMIOS
endmenu
endif
arch/avr/src/atmega/atmega_head.S
+231 -231
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File diff suppressed because it is too large Load Diff
arch/avr/src/atmega/atmega_lowinit.c
+1 -3
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@@ -132,7 +132,7 @@ void up_lowinit(void)
CLKPR = 0x80;
CLKPR = 0;
#elif defined(XDIV)
XDIV = 0;
XDIV = 0;
#endif
/* Initialize the watchdog timer */
@@ -155,5 +155,3 @@ void up_lowinit(void)
atmega_boardinitialize();
}
arch/avr/src/atmega/atmega_timerisr.c
+1 -1
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@@ -179,7 +179,7 @@ void up_timer_initialize(void)
#else
# error "Unable to find IRQ for timer"
#endif
/* Enable the interrupt on compare match A */
#if defined(TIMSK1)
arch/avr/src/avr/Toolchain.defs
-2
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@@ -124,5 +124,3 @@ ifeq ($(CONFIG_AVR_TOOLCHAIN),WINAVR)
MAXOPTIMIZATION ?= -O2
LDFLAGS += -nostartfiles -nodefaultlibs
endif
arch/avr/src/avr/excptmacros.h
+42 -41
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@@ -1,22 +1,22 @@
/********************************************************************************************
* arch/avr/src/avr/excptmacros.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@@ -223,7 +223,7 @@
in r27, _SFR_IO_ADDR(SPH)
adiw r26, XCPTCONTEXT_REGS-2
push r26 /* SPL then SPH */
push r26 /* SPL then SPH */
push r27
.endm
@@ -248,8 +248,8 @@
/* We don't need to restore the stack pointer */
pop r27 /* Discard SPH */
pop r26 /* Discard SPL */
pop r27 /* Discard SPH */
pop r26 /* Discard SPL */
/* Restore r26-r27 */
@@ -303,8 +303,8 @@
/* Restore the status register (probably enabling interrupts) */
pop r24 /* Restore the status register */
andi r24, ~(1 << SREG_I) /* but keeping interrupts disabled until the reti */
pop r24 /* Restore the status register */
andi r24, ~(1 << SREG_I) /* but keeping interrupts disabled until the reti */
out _SFR_IO_ADDR(SREG), r24
/* Finally, restore r24-r25 - the temporary and IRQ number registers */
@@ -336,10 +336,10 @@
/* Pop the return address from the stack (PC0 then PC1). R18:19 are Call-used */
#if ATMEGA_PC_SIZE > 16
pop r20
pop r20
#endif /* ATMEGA_PC_SIZE */
pop r19
pop r18
pop r19
pop r18
/* Save the current stack pointer as it would be after the return(SPH then SPL). */
@@ -350,7 +350,7 @@
/* Skip over r26-r27 and r30-r31 - Call-used, "volatile" registers */
adiw r26, 4 /* Four registers: r26-r27 and r30-r31*/
adiw r26, 4 /* Four registers: r26-r27 and r30-r31*/
/* Save r28-r29 - Call-saved, "static" registers */
@@ -361,7 +361,7 @@
* already been skipped, r24 and r25 are saved elsewhere)
*/
adiw r26, 6 /* Seven registers: r18-23 */
adiw r26, 6 /* Seven registers: r18-23 */
/* Save r2-r17 - Call-saved, "static" registers */
@@ -398,14 +398,15 @@
/* Skip r24-r25 - These are scratch register and Call-used, "volatile" registers */
adiw r26, 2 /* Two registers: r24-r25 */
adiw r26, 2 /* Two registers: r24-r25 */
/* Save the return address that we have saved in r18:19*/
#if ATMEGA_PC_SIZE > 16
st x+, r20
#endif /* ATMEGA_PC_SIZE */
st x+, r19
st x+, r18
st x+, r19
st x+, r18
.endm
/********************************************************************************************
@@ -433,17 +434,17 @@
* Y [r28:29]
*/
movw r28, r26 /* Get a pointer to the PC0/PC1 storage location */
movw r28, r26 /* Get a pointer to the PC0/PC1 storage location */
#if ATMEGA_PC_SIZE <= 16
adiw r28, REG_PC0
#else
adiw r28, REG_PC2
adiw r28, REG_PC2
#endif
/* Fetch and set the new stack pointer */
ld r25, x+ /* Fetch stack pointer (post-incrementing) */
out _SFR_IO_ADDR(SPH), r25 /* (SPH then SPL) */
ld r25, x+ /* Fetch stack pointer (post-incrementing) */
out _SFR_IO_ADDR(SPH), r25 /* (SPH then SPL) */
ld r24, x+
out _SFR_IO_ADDR(SPL), r24
@@ -457,20 +458,20 @@
*/
#if ATMEGA_PC_SIZE <= 16
ld r25, y+ /* Load PC0 (r25) then PC1 (r24) */
ld r25, y+ /* Load PC0 (r25) then PC1 (r24) */
ld r24, y+
push r24 /* Push PC0 and PC1 on the stack (PC1 then PC0) */
push r24 /* Push PC0 and PC1 on the stack (PC1 then PC0) */
push r25
#else
ld r25, y /* Load PC2 (r25) */
subi r28,1
push r25
ld r25, y /* Load PC1 (r25) */
subi r28,1
push r25
ld r25, y /* Load PC0 (r25) */
subi r28,1
push r25
#else
ld r25, y /* Load PC2 (r25) */
subi r28,1
push r25
ld r25, y /* Load PC1 (r25) */
subi r28,1
push r25
ld r25, y /* Load PC0 (r25) */
subi r28,1
push r25
#endif
/* Then get value of X [r26:r27]. Save X on the new stack where we can
@@ -484,9 +485,9 @@
* --- <- SP
*/
ld r25, x+ /* Fetch r26-r27 and save to the new stack */
ld r25, x+ /* Fetch r26-r27 and save to the new stack */
ld r24, x+
push r24 /* r26 then r27 */
push r24 /* r26 then r27 */
push r25
/* Restore r30-r31 - Call-used, "volatile" registers */
@@ -550,7 +551,7 @@
ld r24, x+
bst r24, SREG_I
brts go_reti
brts go_reti
/* Restore the status register, interrupts are disabled */
@@ -575,7 +576,7 @@ go_reti:
* and exit with reti (that will set the Interrupt Enable)
*/
andi r24, ~(1 << SREG_I)
andi r24, ~(1 << SREG_I)
out _SFR_IO_ADDR(SREG), r24
ld r25, x+
arch/avr/src/avr/up_createstack.c
+1 -1
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@@ -160,7 +160,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
tcb->adj_stack_ptr = (FAR void *)top_of_stack;
tcb->adj_stack_size = stack_size;
#if defined(ARCH_HAVE_LEDS)
#if defined(ARCH_HAVE_LEDS)
board_autoled_on(LED_STACKCREATED);
#endif
return OK;
arch/avr/src/avr/up_dumpstate.c
+3 -3
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@@ -158,9 +158,9 @@ static inline void up_registerdump(void)
current_regs[REG_SREG]);
#else
lldbg("PC: %02x%02x%02x SP: %02x%02x SREG: %02x\n",
current_regs[REG_PC0], current_regs[REG_PC1], current_regs[REG_PC2],
current_regs[REG_SPH], current_regs[REG_SPL],
current_regs[REG_SREG]);
current_regs[REG_PC0], current_regs[REG_PC1],
current_regs[REG_PC2], current_regs[REG_SPH],
current_regs[REG_SPL], current_regs[REG_SREG]);
#endif
}
}
arch/avr/src/avr/up_initialstate.c
-1
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@@ -113,4 +113,3 @@ void up_initial_state(struct tcb_s *tcb)
xcp->regs[REG_SREG] = getsreg() | (1 << SREG_I);
#endif
}
arch/avr/src/avr/up_schedulesigaction.c
-1
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@@ -224,4 +224,3 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
}
#endif /* !CONFIG_DISABLE_SIGNALS */
arch/avr/src/avr/up_sigdeliver.c
-1
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@@ -155,4 +155,3 @@ void up_sigdeliver(void)
}
#endif /* !CONFIG_DISABLE_SIGNALS */
arch/avr/src/common/up_initialize.c
+1 -2
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@@ -297,8 +297,7 @@ void up_initialize(void)
up_usbinitialize();
#if defined(ARCH_HAVE_LEDS)
#if defined(ARCH_HAVE_LEDS)
board_autoled_on(LED_IRQSENABLED);
#endif
}