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boards/arm/stm32f7: separate nucleo-144 board into individual boards

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nucleo-144 combines 3 different ST boards. This approach is inconsistent with
the support for the rest of the nucleo boards, where each board is in separate folders.
Also nucleo-144 is no longer reserved for STM32F7 chips but other families also use this format.

After this commit nucleo-144 is divided into 3 boards:

- nucleo-f746zg
- nucleo-f767zi
- nucleo-f722ze
This commit is contained in:
raiden00pl
2024-10-20 09:58:25 +02:00
committed by Xiang Xiao
parent d73d34b1a0
commit 6657f2abb7
117 changed files with 11536 additions and 552 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/platforms/arm/stm32f7/boards/nucleo-f722/index.rst → Documentation/platforms/arm/stm32f7/boards/nucleo-f722ze/index.rst
+8 -8
View File
@@ -272,8 +272,8 @@ and connect it as follows::
Configurations
==============
f7xx-nsh
--------
nsh
---
Configures the NuttShell (nsh) located at apps/examples/nsh for the
Nucleo-144 boards. The Configuration enables the serial interfaces
@@ -290,11 +290,11 @@ NOTES:
b. If this is the initial configuration then execute::
./tools/configure.sh nucleo-144:nsh
./tools/configure.sh nucleo-f722ze:nsh
in nuttx/ in order to start configuration process.
Caution: Doing this step more than once will overwrite .config with
the contents of the nucleo-144/nsh/defconfig file.
the contents of the nucleo-f722ze/nsh/defconfig file.
c. Execute 'make oldconfig' in nuttx/ in order to refresh the
configuration.
@@ -334,8 +334,8 @@ NOTES:
Default values for other settings associated with the select USART should
be correct.
f7xx-evalos:
------------
evalos:
-------
This configuration is designed to test the features of the board.
@@ -358,11 +358,11 @@ NOTES:
b. If this is the initial configuration then execute::
./tools/configure.sh nucleo-144:evalos
./tools/configure.sh nucleo-f722ze:evalos
in nuttx/ in order to start configuration process.
Caution: Doing this step more than once will overwrite .config with
the contents of the nucleo-144/evalos/defconfig file.
the contents of the nucleo-f722ze/evalos/defconfig file.
c. Execute 'make oldconfig' in nuttx/ in order to refresh the
configuration.
Documentation/platforms/arm/stm32f7/boards/nucleo-f746/index.rst → Documentation/platforms/arm/stm32f7/boards/nucleo-f746zg/index.rst
+7 -7
View File
@@ -314,8 +314,8 @@ and connect it as follows::
Configurations
==============
f7xx-nsh
--------
nsh
---
Configures the NuttShell (nsh) located at apps/examples/nsh for the
Nucleo-144 boards. The Configuration enables the serial interfaces
@@ -332,11 +332,11 @@ NOTES:
b. If this is the initial configuration then execute::
./tools/configure.sh nucleo-144:nsh
./tools/configure.sh nucleo-f746zg:nsh
in nuttx/ in order to start configuration process.
Caution: Doing this step more than once will overwrite .config with
the contents of the nucleo-144/nsh/defconfig file.
the contents of the nucleo-f746zg/nsh/defconfig file.
c. Execute 'make oldconfig' in nuttx/ in order to refresh the
configuration.
@@ -376,8 +376,8 @@ NOTES:
Default values for other settings associated with the select USART should
be correct.
f7xx-evalos:
------------
evalos:
-------
This configuration is designed to test the features of the board.
@@ -404,7 +404,7 @@ NOTES:
in nuttx/ in order to start configuration process.
Caution: Doing this step more than once will overwrite .config with
the contents of the nucleo-144/evalos/defconfig file.
the contents of the nucleo-f746zg/evalos/defconfig file.
c. Execute 'make oldconfig' in nuttx/ in order to refresh the
configuration.
Documentation/platforms/arm/stm32f7/boards/nucleo-f767/index.rst → Documentation/platforms/arm/stm32f7/boards/nucleo-f767zi/index.rst
+8 -8
View File
@@ -316,8 +316,8 @@ and connect it as follows::
Configurations
==============
f7xx-nsh
--------
nsh
---
Configures the NuttShell (nsh) located at apps/examples/nsh for the
Nucleo-144 boards. The Configuration enables the serial interfaces
@@ -334,11 +334,11 @@ NOTES:
b. If this is the initial configuration then execute::
./tools/configure.sh nucleo-144:nsh
./tools/configure.sh nucleo-f767zi:nsh
in nuttx/ in order to start configuration process.
Caution: Doing this step more than once will overwrite .config with
the contents of the nucleo-144/nsh/defconfig file.
the contents of the nucleo-f767zi/nsh/defconfig file.
c. Execute 'make oldconfig' in nuttx/ in order to refresh the
configuration.
@@ -378,8 +378,8 @@ NOTES:
Default values for other settings associated with the select USART should
be correct.
f7xx-evalos:
------------
evalos:
-------
This configuration is designed to test the features of the board.
@@ -402,11 +402,11 @@ NOTES:
b. If this is the initial configuration then execute::
./tools/configure.sh nucleo-144:evalos
./tools/configure.sh nucleo-f767zi:evalos
in nuttx/ in order to start configuration process.
Caution: Doing this step more than once will overwrite .config with
the contents of the nucleo-144/evalos/defconfig file.
the contents of the nucleo-f767zi/evalos/defconfig file.
c. Execute 'make oldconfig' in nuttx/ in order to refresh the
configuration.
LICENSE
+9 -3
View File
@@ -3355,8 +3355,12 @@ boards/arm/stm32/omnibusf4/src/stm32_romfs.h
boards/arm/stm32/omnibusf4/src/stm32_romfs_initialize.c
boards/arm/stm32/stm32f4discovery/src/stm32_romfs.h
boards/arm/stm32/stm32f4discovery/src/stm32_romfs_initialize.c
boards/arm/stm32f7/nucleo-144/src/stm32_romfs.h
boards/arm/stm32f7/nucleo-144/src/stm32_romfs_initialize.c
boards/arm/stm32f7/nucleo-f722ze/src/stm32_romfs.h
boards/arm/stm32f7/nucleo-f722ze/src/stm32_romfs_initialize.c
boards/arm/stm32f7/nucleo-f746zg/src/stm32_romfs.h
boards/arm/stm32f7/nucleo-f746zg/src/stm32_romfs_initialize.c
boards/arm/stm32f7/nucleo-f767zi/src/stm32_romfs.h
boards/arm/stm32f7/nucleo-f767zi/src/stm32_romfs_initialize.c
=============================================================
Copyright (C) 2017 Tomasz Wozniak. All rights reserved.
@@ -3420,7 +3424,9 @@ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
boards/arm/stm32f7/nucleo-144/src/stm32_dma_alloc.c
boards/arm/stm32f7/nucleo-f722ze/src/stm32_dma_alloc.c
boards/arm/stm32f7/nucleo-f746zg/src/stm32_dma_alloc.c
boards/arm/stm32f7/nucleo-f767zi/src/stm32_dma_alloc.c
boards/arm/stm32f7/stm32f746-ws/src/stm32_dma_alloc.c
boards/arm/stm32l4/nucleo-l496zg/src/stm32_dma_alloc.c
boards/arm/tms570/tms570ls31x-usb-kit/include/nsh_romfsimg.h
boards/Kconfig
+34 -27
View File
@@ -1524,36 +1524,35 @@ config ARCH_BOARD_NUCLEO_F429ZI
---help---
STMicro Nucleo-F429zi board based on the STMicro STM32F429ZIT6 MCU.
config ARCH_BOARD_NUCLEO_144
bool "STMicro NUCLEO-144"
depends on ARCH_CHIP_STM32F722ZE || ARCH_CHIP_STM32F746ZG || ARCH_CHIP_STM32F767ZI
config ARCH_BOARD_NUCLEO_F722ZE
bool "STMicro NUCLEO-F722ZE"
depends on ARCH_CHIP_STM32F722ZE
select ARCH_HAVE_LEDS
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
STMicro Nucleo-144 development board featuring STMicroelectronics
F2, F3, F4, F7 and L4 MCU families. The board is a "Hardware pattern"
that can be populated with the 144 pin package of the following MCUs:
STMicro Nucleo F722ZE board based on STM32F722ZET6,
a 216MHz Cortex-M7, w/FPU, 512KiB Flash memory and 256KiB SRAM.
Target STM32 Order code
STM32F207ZGT6 NUCLEO-F207ZG
STM32F303ZET6 NUCLEO-F303ZE
STM32F429ZIT6 NUCLEO-F429ZI
STM32F446ZET6 NUCLEO-F446ZE
STM32F722ZET6 NUCLEO-F722ZE
STM32F746ZGT6 NUCLEO-F746ZG
STM32F767ZIT6 NUCLEO-F767ZI
STM32L496ZGT6 NUCLEO-L496ZG
STM32L496ZGT6P NUCLEO-L496ZG-P
config ARCH_BOARD_NUCLEO_F746ZG
bool "STMicro NUCLEO-F746ZG"
depends on ARCH_CHIP_STM32F746ZG
select ARCH_HAVE_LEDS
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
STMicro Nucleo F746ZG board based on STM32F746ZGT6
a 216MHz Cortex-M7, w/FPU, 1024KiB Flash memory and 320KiB SRAM.
Supported in this configuration are:
NUCLEO-F722ZE - STM32F722ZET6 a 216MHz Cortex-M7, w/FPU -
512KiB Flash memory and 256KiB SRAM.
NUCLEO-F746ZG - STM32F746ZGT6 a 216MHz Cortex-M7, w/FPU -
1024KiB Flash memory and 320KiB SRAM.
NUCLEO-F767ZI - STM32F767ZIT6 a 216MHz Cortex-M7, w/DPFPU -
2048KiB Flash memory and 512KiB SRAM.
config ARCH_BOARD_NUCLEO_F767ZI
bool "STMicro NUCLEO-F767ZI"
depends on ARCH_CHIP_STM32F767ZI
select ARCH_HAVE_LEDS
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
STMicro Nucleo F767ZI board based on STM32F767ZIT6,
a 216MHz Cortex-M7, w/DPFPU 2048KiB Flash memory and 512KiB SRAM.
config ARCH_BOARD_NUCLEO_L073RZ
bool "STM32L073RZU6 Nucleo L073RZ"
@@ -3356,7 +3355,9 @@ config ARCH_BOARD
default "thingy91-nrf52" if ARCH_BOARD_THINGY91_NRF52
default "nrf9160-dk-nrf52" if ARCH_BOARD_NRF9160_DK_NRF52
default "ntosd-dm320" if ARCH_BOARD_NTOSD_DM320
default "nucleo-144" if ARCH_BOARD_NUCLEO_144
default "nucleo-f722ze" if ARCH_BOARD_NUCLEO_F722ZE
default "nucleo-f746zg" if ARCH_BOARD_NUCLEO_F746ZG
default "nucleo-f767zi" if ARCH_BOARD_NUCLEO_F767ZI
default "nucleo-f072rb" if ARCH_BOARD_NUCLEO_F072RB
default "nucleo-f091rc" if ARCH_BOARD_NUCLEO_F091RC
default "nucleo-f103rb" if ARCH_BOARD_NUCLEO_F103RB
@@ -4002,8 +4003,14 @@ endif
if ARCH_BOARD_STM32F072_DISCOVERY
source "boards/arm/stm32f0l0g0/stm32f072-discovery/Kconfig"
endif
if ARCH_BOARD_NUCLEO_144
source "boards/arm/stm32f7/nucleo-144/Kconfig"
if ARCH_BOARD_NUCLEO_F722ZE
source "boards/arm/stm32f7/nucleo-f722ze/Kconfig"
endif
if ARCH_BOARD_NUCLEO_F746ZG
source "boards/arm/stm32f7/nucleo-f746zg/Kconfig"
endif
if ARCH_BOARD_NUCLEO_F767ZI
source "boards/arm/stm32f7/nucleo-f767zi/Kconfig"
endif
if ARCH_BOARD_STM32F746_WS
source "boards/arm/stm32f7/stm32f746-ws/Kconfig"
boards/arm/stm32f7/nucleo-144/configs/f722-cansock/Make.defs
-39
View File
@@ -1,39 +0,0 @@
############################################################################
# boards/arm/stm32f7/nucleo-144/configs/f722-cansock/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = f722-flash.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
boards/arm/stm32f7/nucleo-144/configs/f722-composite/Make.defs
-39
View File
@@ -1,39 +0,0 @@
############################################################################
# boards/arm/stm32f7/nucleo-144/configs/f722-composite/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = f722-flash.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
boards/arm/stm32f7/nucleo-144/configs/f722-nsh/Make.defs
-39
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@@ -1,39 +0,0 @@
############################################################################
# boards/arm/stm32f7/nucleo-144/configs/f722-nsh/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = f722-flash.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
boards/arm/stm32f7/nucleo-144/configs/f746-evalos/Make.defs
-39
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@@ -1,39 +0,0 @@
############################################################################
# boards/arm/stm32f7/nucleo-144/configs/f746-evalos/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = f746-flash.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
boards/arm/stm32f7/nucleo-144/configs/f746-pysim/Make.defs
-39
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@@ -1,39 +0,0 @@
############################################################################
# boards/arm/stm32f7/nucleo-144/configs/f746-pysim/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = f746-flash.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
boards/arm/stm32f7/nucleo-144/configs/f767-evalos/Make.defs
-39
View File
@@ -1,39 +0,0 @@
############################################################################
# boards/arm/stm32f7/nucleo-144/configs/f767-evalos/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = f767-flash.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
boards/arm/stm32f7/nucleo-144/configs/f767-netnsh/Make.defs
-39
View File
@@ -1,39 +0,0 @@
############################################################################
# boards/arm/stm32f7/nucleo-144/configs/f767-netnsh/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = f767-flash.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
boards/arm/stm32f7/nucleo-144/CMakeLists.txt → boards/arm/stm32f7/nucleo-f722ze/CMakeLists.txt
+1 -1
View File
@@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32f7/nucleo-144/CMakeLists.txt
# boards/arm/stm32f7/nucleo-f722ze/CMakeLists.txt
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
boards/arm/stm32f7/nucleo-144/Kconfig → boards/arm/stm32f7/nucleo-f722ze/Kconfig
+56 -56
View File
@@ -3,7 +3,7 @@
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_NUCLEO_144
if ARCH_BOARD_NUCLEO_F722ZE
config STM32_ROMFS
bool "Automount baked-in ROMFS image"
@@ -29,7 +29,7 @@ config STM32_ROMFS_IMAGEFILE
choice
prompt "Select Console wiring."
default NUCLEO_CONSOLE_ARDUINO
default NUCLEO_F722ZE_CONSOLE_ARDUINO
---help---
Select where you will connect the console.
@@ -77,196 +77,196 @@ choice
-------- --------- -----
Note: SB13 must be removed to disable Ethernet.
config NUCLEO_CONSOLE_ARDUINO
config NUCLEO_F722ZE_CONSOLE_ARDUINO
bool "Arduino Connector"
select STM32F7_USART6
select USART6_SERIALDRIVER
config NUCLEO_CONSOLE_VIRTUAL
config NUCLEO_F722ZE_CONSOLE_VIRTUAL
bool "Virtual Comport"
select STM32F7_USART3
select USART3_SERIALDRIVER
config NUCLEO_CONSOLE_MORPHO
config NUCLEO_F722ZE_CONSOLE_MORPHO
bool "Morpho Connector"
select STM32F7_UART8
select UART8_SERIALDRIVER
config NUCLEO_CONSOLE_MORPHO_UART4
config NUCLEO_F722ZE_CONSOLE_MORPHO_UART4
bool "Morpho Connector UART4"
select STM32F7_UART4
select UART4_SERIALDRIVER
config NUCLEO_CONSOLE_NONE
config NUCLEO_F722ZE_CONSOLE_NONE
bool "No Console"
endchoice # "Select Console wiring"
config NUCLEO_SPI_TEST
config NUCLEO_F722ZE_SPI_TEST
bool "Enable SPI test"
default n
---help---
Enable Spi test - initialize and configure SPI to send
NUCLEO_SPI_TEST_MESSAGE text. The text is sent on the
NUCLEO_F722ZE_SPI_TEST_MESSAGE text. The text is sent on the
selected SPI Buses with the configured parameters.
Note the CS lines will not be asserted.
if NUCLEO_SPI_TEST
if NUCLEO_F722ZE_SPI_TEST
config NUCLEO_SPI_TEST_MESSAGE
config NUCLEO_F722ZE_SPI_TEST_MESSAGE
string "Text to Send on SPI Bus(es)"
default "Hello World"
depends on NUCLEO_SPI_TEST
depends on NUCLEO_F722ZE_SPI_TEST
---help---
Text to sent on SPI bus(es)
config NUCLEO_SPI1_TEST
config NUCLEO_F722ZE_SPI1_TEST
bool "Test SPI bus 1"
default n
depends on NUCLEO_SPI_TEST
depends on NUCLEO_F722ZE_SPI_TEST
---help---
Enable Spi test - on SPI BUS 1
if NUCLEO_SPI1_TEST
if NUCLEO_F722ZE_SPI1_TEST
config NUCLEO_SPI1_TEST_FREQ
config NUCLEO_F722ZE_SPI1_TEST_FREQ
int "SPI 1 Clock Freq in Hz"
default 1000000
depends on NUCLEO_SPI1_TEST
depends on NUCLEO_F722ZE_SPI1_TEST
---help---
Sets SPI 1 Clock Freq
config NUCLEO_SPI1_TEST_BITS
config NUCLEO_F722ZE_SPI1_TEST_BITS
int "SPI 1 number of bits"
default 8
depends on NUCLEO_SPI1_TEST
depends on NUCLEO_F722ZE_SPI1_TEST
---help---
Sets SPI 1 bit length
choice
prompt "SPI BUS 1 Clock Mode"
default NUCLEO_SPI1_TEST_MODE3
default NUCLEO_F722ZE_SPI1_TEST_MODE3
---help---
Sets SPI 1 clock mode
config NUCLEO_SPI1_TEST_MODE0
config NUCLEO_F722ZE_SPI1_TEST_MODE0
bool "CPOL=0 CPHA=0"
config NUCLEO_SPI1_TEST_MODE1
config NUCLEO_F722ZE_SPI1_TEST_MODE1
bool "CPOL=0 CPHA=1"
config NUCLEO_SPI1_TEST_MODE2
config NUCLEO_F722ZE_SPI1_TEST_MODE2
bool "CPOL=1 CPHA=0"
config NUCLEO_SPI1_TEST_MODE3
config NUCLEO_F722ZE_SPI1_TEST_MODE3
bool "CPOL=1 CPHA=1"
endchoice # "SPI BUS 1 Clock Mode"
endif # NUCLEO_SPI1_TEST
endif # NUCLEO_F722ZE_SPI1_TEST
config NUCLEO_SPI2_TEST
config NUCLEO_F722ZE_SPI2_TEST
bool "Test SPI bus 2"
default n
depends on NUCLEO_SPI_TEST
depends on NUCLEO_F722ZE_SPI_TEST
---help---
Enable Spi test - on SPI BUS 2
if NUCLEO_SPI2_TEST
if NUCLEO_F722ZE_SPI2_TEST
config NUCLEO_SPI2_TEST_FREQ
config NUCLEO_F722ZE_SPI2_TEST_FREQ
int "SPI 2 Clock Freq in Hz"
default 12000000
depends on NUCLEO_SPI2_TEST
depends on NUCLEO_F722ZE_SPI2_TEST
---help---
Sets SPI 2 Clock Freq
config NUCLEO_SPI2_TEST_BITS
config NUCLEO_F722ZE_SPI2_TEST_BITS
int "SPI 2 number of bits"
default 8
depends on NUCLEO_SPI2_TEST
depends on NUCLEO_F722ZE_SPI2_TEST
---help---
Sets SPI 2 bit length
choice
prompt "SPI BUS 2 Clock Mode"
default NUCLEO_SPI2_TEST_MODE3
default NUCLEO_F722ZE_SPI2_TEST_MODE3
---help---
Sets SPI 2 clock mode
config NUCLEO_SPI2_TEST_MODE0
config NUCLEO_F722ZE_SPI2_TEST_MODE0
bool "CPOL=0 CPHA=0"
config NUCLEO_SPI2_TEST_MODE1
config NUCLEO_F722ZE_SPI2_TEST_MODE1
bool "CPOL=0 CPHA=1"
config NUCLEO_SPI2_TEST_MODE2
config NUCLEO_F722ZE_SPI2_TEST_MODE2
bool "CPOL=1 CPHA=0"
config NUCLEO_SPI2_TEST_MODE3
config NUCLEO_F722ZE_SPI2_TEST_MODE3
bool "CPOL=1 CPHA=1"
endchoice # "SPI BUS 2 Clock Mode"
endif # NUCLEO_SPI2_TEST
endif # NUCLEO_F722ZE_SPI2_TEST
config NUCLEO_SPI3_TEST
config NUCLEO_F722ZE_SPI3_TEST
bool "Test SPI bus 3"
default n
depends on NUCLEO_SPI_TEST
depends on NUCLEO_F722ZE_SPI_TEST
---help---
Enable Spi test - on SPI BUS 3
if NUCLEO_SPI3_TEST
if NUCLEO_F722ZE_SPI3_TEST
config NUCLEO_SPI3_TEST_FREQ
config NUCLEO_F722ZE_SPI3_TEST_FREQ
int "SPI 3 Clock Freq in Hz"
default 40000000
depends on NUCLEO_SPI3_TEST
depends on NUCLEO_F722ZE_SPI3_TEST
---help---
Sets SPI 3 Clock Freq
config NUCLEO_SPI3_TEST_BITS
config NUCLEO_F722ZE_SPI3_TEST_BITS
int "SPI 3 number of bits"
default 8
depends on NUCLEO_SPI3_TEST
depends on NUCLEO_F722ZE_SPI3_TEST
---help---
Sets SPI 3 bit length
choice
prompt "SPI BUS 3 Clock Mode"
default NUCLEO_SPI3_TEST_MODE3
default NUCLEO_F722ZE_SPI3_TEST_MODE3
---help---
Sets SPI 3 clock mode
config NUCLEO_SPI3_TEST_MODE0
config NUCLEO_F722ZE_SPI3_TEST_MODE0
bool "CPOL=0 CPHA=0"
config NUCLEO_SPI3_TEST_MODE1
config NUCLEO_F722ZE_SPI3_TEST_MODE1
bool "CPOL=0 CPHA=1"
config NUCLEO_SPI3_TEST_MODE2
config NUCLEO_F722ZE_SPI3_TEST_MODE2
bool "CPOL=1 CPHA=0"
config NUCLEO_SPI3_TEST_MODE3
config NUCLEO_F722ZE_SPI3_TEST_MODE3
bool "CPOL=1 CPHA=1"
endchoice # "SPI BUS 3 Clock Mode"
endif # NUCLEO_SPI3_TEST
endif # NUCLEO_SPI_TEST
endif # NUCLEO_F722ZE_SPI3_TEST
endif # NUCLEO_F722ZE_SPI_TEST
choice
prompt "CAN1 pins selection"
default NUCLEO_CAN1_MAP_PD0PD1
default NUCLEO_F722ZE_CAN1_MAP_PD0PD1
depends on STM32F7_CAN1
config NUCLEO_144_CAN1_MAP_D14D15
config NUCLEO_F722ZE_F722ZE_CAN1_MAP_D14D15
bool "CAN1_TX=D14 CAN1_RX=D15"
config NUCLEO_CAN1_MAP_PD0PD1
config NUCLEO_F722ZE_CAN1_MAP_PD0PD1
bool "CAN1_RX=PD0 CAN1_TX=PD1"
endchoice # CAN1 pins selection
endif # ARCH_BOARD_NUCLEO_144
endif # ARCH_BOARD_NUCLEO_F722ZE
boards/arm/stm32f7/nucleo-144/configs/f722-can/defconfig → boards/arm/stm32f7/nucleo-f722ze/configs/can/defconfig
+4 -4
View File
@@ -8,8 +8,8 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32F7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-144"
CONFIG_ARCH_BOARD_NUCLEO_144=y
CONFIG_ARCH_BOARD="nucleo-f722ze"
CONFIG_ARCH_BOARD_NUCLEO_F722ZE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32f7"
CONFIG_ARCH_CHIP_STM32F722ZE=y
@@ -35,8 +35,8 @@ CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_NUCLEO_144_CAN1_MAP_D14D15=y
CONFIG_NUCLEO_CONSOLE_VIRTUAL=y
CONFIG_NUCLEO_F722ZE_CAN1_MAP_D14D15=y
CONFIG_NUCLEO_F722ZE_CONSOLE_VIRTUAL=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
boards/arm/stm32f7/nucleo-144/configs/f722-cansock/defconfig → boards/arm/stm32f7/nucleo-f722ze/configs/cansock/defconfig
+4 -4
View File
@@ -10,8 +10,8 @@
# CONFIG_NET_IPv4 is not set
# CONFIG_STM32F7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-144"
CONFIG_ARCH_BOARD_NUCLEO_144=y
CONFIG_ARCH_BOARD="nucleo-f722ze"
CONFIG_ARCH_BOARD_NUCLEO_F722ZE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32f7"
CONFIG_ARCH_CHIP_STM32F722ZE=y
@@ -43,8 +43,8 @@ CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_NUCLEO_144_CAN1_MAP_D14D15=y
CONFIG_NUCLEO_CONSOLE_VIRTUAL=y
CONFIG_NUCLEO_F722ZE_CAN1_MAP_D14D15=y
CONFIG_NUCLEO_F722ZE_CONSOLE_VIRTUAL=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
boards/arm/stm32f7/nucleo-144/configs/f722-composite/defconfig → boards/arm/stm32f7/nucleo-f722ze/configs/composite/defconfig
+3 -3
View File
@@ -8,8 +8,8 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32F7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-144"
CONFIG_ARCH_BOARD_NUCLEO_144=y
CONFIG_ARCH_BOARD="nucleo-f722ze"
CONFIG_ARCH_BOARD_NUCLEO_F722ZE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32f7"
CONFIG_ARCH_CHIP_STM32F722ZE=y
@@ -57,7 +57,7 @@ CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_NUCLEO_CONSOLE_VIRTUAL=y
CONFIG_NUCLEO_F722ZE_CONSOLE_VIRTUAL=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
boards/arm/stm32f7/nucleo-144/configs/f722-nsh/defconfig → boards/arm/stm32f7/nucleo-f722ze/configs/nsh/defconfig
+2 -2
View File
@@ -10,8 +10,8 @@
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32F7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-144"
CONFIG_ARCH_BOARD_NUCLEO_144=y
CONFIG_ARCH_BOARD="nucleo-f722ze"
CONFIG_ARCH_BOARD_NUCLEO_F722ZE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32f7"
CONFIG_ARCH_CHIP_STM32F722ZE=y
boards/arm/stm32f7/nucleo-144/include/board.h → boards/arm/stm32f7/nucleo-f722ze/include/board.h
+11 -11
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/include/board.h
* boards/arm/stm32f7/nucleo-f722ze/include/board.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32F7_NUCLEO_144_INCLUDE_BOARD_H
#define __BOARDS_ARM_STM32F7_NUCLEO_144_INCLUDE_BOARD_H
#ifndef __BOARDS_ARM_STM32F7_NUCLEO_F722ZE_INCLUDE_BOARD_H
#define __BOARDS_ARM_STM32F7_NUCLEO_F722ZE_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
@@ -39,7 +39,7 @@
/* Clocking *****************************************************************/
/* The Nucleo-144 board provides the following clock sources:
/* The Nucleo-f722ze board provides the following clock sources:
*
* MCO: 8 MHz from MCO output of ST-LINK is used as input clock
* X2: 32.768 KHz crystal for LSE
@@ -256,7 +256,7 @@
/* LED definitions **********************************************************/
/* The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED,
/* The Nucleo-f722ze board has numerous LEDs but only three, LD1 a Green LED,
* LD2 a Blue LED and LD3 a Red LED, that can be controlled by software.
* The following definitions assume the default Solder Bridges are installed.
*
@@ -384,7 +384,7 @@
#define GPIO_TIM3_CH3OUT (GPIO_TIM3_CH3OUT_2|GPIO_SPEED_50MHz)
#define GPIO_TIM3_CH4OUT (GPIO_TIM3_CH4OUT_1|GPIO_SPEED_50MHz)
#if defined(CONFIG_NUCLEO_CONSOLE_ARDUINO)
#if defined(CONFIG_NUCLEO_F722ZE_CONSOLE_ARDUINO)
/* USART6:
*
@@ -408,12 +408,12 @@
* Use USART3 and the USB virtual COM port
*/
#if defined(CONFIG_NUCLEO_CONSOLE_VIRTUAL)
#if defined(CONFIG_NUCLEO_F722ZE_CONSOLE_VIRTUAL)
# define GPIO_USART3_RX (GPIO_USART3_RX_3|GPIO_SPEED_100MHz)
# define GPIO_USART3_TX (GPIO_USART3_TX_3|GPIO_SPEED_100MHz)
#endif
#if defined(CONFIG_NUCLEO_CONSOLE_MORPHO_UART4)
#if defined(CONFIG_NUCLEO_F722ZE_CONSOLE_MORPHO_UART4)
/* UART4:
*
@@ -538,10 +538,10 @@
/* CAN Bus */
#ifdef CONFIG_NUCLEO_CAN1_MAP_PD0PD1
#ifdef CONFIG_NUCLEO_F722ZE_CAN1_MAP_PD0PD1
# define GPIO_CAN1_TX (GPIO_CAN1_TX_3|GPIO_SPEED_50MHz) /* PD1 */
# define GPIO_CAN1_RX (GPIO_CAN1_RX_3|GPIO_SPEED_50MHz) /* PD0 */
#elif CONFIG_NUCLEO_144_CAN1_MAP_D14D15
#elif CONFIG_NUCLEO_F722ZE_CAN1_MAP_D14D15
# define GPIO_CAN1_TX (GPIO_CAN1_TX_2|GPIO_SPEED_50MHz) /* PB9 */
# define GPIO_CAN1_RX (GPIO_CAN1_RX_2|GPIO_SPEED_50MHz) /* PB8 */
#endif
@@ -565,4 +565,4 @@
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32F7_NUCLEO_144_INCLUDE_BOARD_H */
#endif /* __BOARDS_ARM_STM32F7_NUCLEO_F722ZE_INCLUDE_BOARD_H */
boards/arm/stm32f7/nucleo-144/configs/f722-can/Make.defs → boards/arm/stm32f7/nucleo-f722ze/scripts/Make.defs
+2 -2
View File
@@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32f7/nucleo-144/configs/f722-can/Make.defs
# boards/arm/stm32f7/nucleo-f722ze/scriptsMake.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
@@ -22,7 +22,7 @@ include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = f722-flash.ld
LDSCRIPT = flash.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
boards/arm/stm32f7/nucleo-144/scripts/f722-flash.ld → boards/arm/stm32f7/nucleo-f722ze/scripts/flash.ld
+1 -1
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/scripts/f722-flash.ld
* boards/arm/stm32f7/nucleo-f722ze/scripts/flash.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
boards/arm/stm32f7/nucleo-144/scripts/kernel-space.ld → boards/arm/stm32f7/nucleo-f722ze/scripts/kernel-space.ld
+1 -1
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/scripts/kernel-space.ld
* boards/arm/stm32f7/nucleo-f722ze/scripts/kernel-space.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
boards/arm/stm32f7/nucleo-144/scripts/user-space.ld → boards/arm/stm32f7/nucleo-f722ze/scripts/user-space.ld
+1 -1
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/scripts/user-space.ld
* boards/arm/stm32f7/nucleo-f722ze/scripts/user-space.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
boards/arm/stm32f7/nucleo-144/src/CMakeLists.txt → boards/arm/stm32f7/nucleo-f722ze/src/CMakeLists.txt
+2 -7
View File
@@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32f7/nucleo-144/src/CMakeLists.txt
# boards/arm/stm32f7/nucleo-f722ze/src/CMakeLists.txt
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
@@ -89,10 +89,5 @@ endif()
target_sources(board PRIVATE ${SRCS})
if(CONFIG_ARCH_CHIP_STM32F722ZE)
set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/f722-flash.ld")
elseif(CONFIG_ARCH_CHIP_STM32F746ZG)
set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/f746-flash.ld")
elseif(CONFIG_ARCH_CHIP_STM32F767ZI)
set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/f767-flash.ld")
set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/flash.ld")
endif()
boards/arm/stm32f7/nucleo-144/src/Make.defs → boards/arm/stm32f7/nucleo-f722ze/src/Make.defs
+1 -1
View File
@@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32f7/nucleo-144/src/Make.defs
# boards/arm/stm32f7/nucleo-f722ze/src/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
boards/arm/stm32f7/nucleo-f722ze/src/nucleo-f722ze.h
+353
View File
@@ -0,0 +1,353 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-f722ze/src/nucleo-f722ze.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32F7_NUCLEO_F722ZE_SRC_NUCLEO_F722ZE_H
#define __BOARDS_ARM_STM32F7_NUCLEO_F722ZE_SRC_NUCLEO_F722ZE_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* procfs File System */
#ifdef CONFIG_FS_PROCFS
# ifdef CONFIG_NSH_PROC_MOUNTPOINT
# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
# else
# define STM32_PROCFS_MOUNTPOINT "/proc"
# endif
#endif
/* nucleo-f722ze GPIO Pin Definitions ***************************************/
/* LED
*
* The nucleo-f722ze board has numerous LEDs but only three, LD1 a Green LED,
* LD2 a Blue LED and LD3 a Red LED, that can be controlled by software.
* The following definitions assume the default Solder Bridges are installed.
*/
#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
GPIO_PORTB | GPIO_PIN0)
#define GPIO_LD2 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
GPIO_PORTB | GPIO_PIN7)
#define GPIO_LD3 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
GPIO_PORTB | GPIO_PIN14)
#define GPIO_LED_GREEN GPIO_LD1
#define GPIO_LED_BLUE GPIO_LD2
#define GPIO_LED_RED GPIO_LD3
#define LED_DRIVER_PATH "/dev/userleds"
/* BUTTONS
*
* The Blue pushbutton B1, labeled "User", is connected to GPIO PC13.
* A high value will be sensed when the button is depressed.
* Note:
* 1) That the EXTI is included in the definition to enable an interrupt
* on this IO.
* 2) The following definitions assume the default Solder Bridges are
* installed.
*/
#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13)
/* SPI **********************************************************************/
#define GPIO_SPI_CS (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_SET)
#define GPIO_SPI1_CS0 (GPIO_SPI_CS | GPIO_PORTA | GPIO_PIN15)
#define GPIO_SPI1_CS1 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN15)
#define GPIO_SPI1_CS2 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN14)
#define GPIO_SPI1_CS3 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN2)
#define GPIO_SPI2_CS0 (GPIO_SPI_CS | GPIO_PORTD | GPIO_PIN7)
#define GPIO_SPI2_CS1 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN1)
#define GPIO_SPI2_CS2 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN2)
#define GPIO_SPI2_CS3 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN3)
#define GPIO_SPI3_CS0 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN4)
#define GPIO_SPI3_CS1 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN5)
#define GPIO_SPI3_CS2 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN6)
#define GPIO_SPI3_CS3 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN7)
#if defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_SDMMC2)
# define HAVE_SDIO
#endif
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_MMCSD_SDIO)
# undef HAVE_SDIO
#endif
#define SDIO_SLOTNO 0 /* Only one slot */
#ifdef HAVE_SDIO
# if defined(CONFIG_STM32F7_SDMMC1)
# define GPIO_SDMMC1_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI | GPIO_PORTC | GPIO_PIN6)
# endif
# if defined(CONFIG_NSH_MMCSDSLOTNO) && (CONFIG_NSH_MMCSDSLOTNO != 0)
# warning "Only one MMC/SD slot, slot 0"
# define CONFIG_NSH_MMCSDSLOTNO SDIO_SLOTNO
# endif
# if defined(CONFIG_NSH_MMCSDMINOR)
# define SDIO_MINOR CONFIG_NSH_MMCSDMINOR
# else
# define SDIO_MINOR 0
# endif
#endif
/* USB OTG FS
*
* PA9 OTG_FS_VBUS VBUS sensing (also connected to the green LED)
* PC0 OTG_FS_PowerSwitchOn
* PD5 OTG_FS_Overcurrent
*/
#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)
#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN6)
#ifdef CONFIG_USBHOST
# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|\
GPIO_SPEED_100MHz|GPIO_PUSHPULL|\
GPIO_PORTG|GPIO_PIN7)
#else
# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN7)
#endif
/* GPIO pins used by the GPIO Subsystem */
#define BOARD_NGPIOIN 4 /* Amount of GPIO Input pins */
#if defined(CONFIG_STM32F7_TIM1_CH1NOUT) && defined (CONFIG_STM32F7_TIM1_CH2NOUT)
#define BOARD_NGPIOOUT 8 /* Amount of GPIO Output pins */
#elif defined(CONFIG_STM32F7_TIM1_CH1NOUT) || defined (CONFIG_STM32F7_TIM1_CH2NOUT)
#define BOARD_NGPIOOUT 9 /* Amount of GPIO Output pins */
#else
#define BOARD_NGPIOOUT 10 /* Amount of GPIO Output pins */
#endif
#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */
#define GPIO_INT1 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN2)
#define GPIO_IN1 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTE | GPIO_PIN7)
#define GPIO_IN2 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTE | GPIO_PIN12)
#define GPIO_IN3 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTE | GPIO_PIN14)
#define GPIO_IN4 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTE | GPIO_PIN15)
#define GPIO_OUT1 (GPIO_OUTPUT | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN4)
#define GPIO_OUT2 (GPIO_OUTPUT | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN5)
#define GPIO_OUT3 (GPIO_OUTPUT | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN6)
#define GPIO_OUT4 (GPIO_OUTPUT | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_SET | GPIO_PORTA |GPIO_PIN5)
#define GPIO_OUT5 (GPIO_OUTPUT | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_SET | GPIO_PORTF | GPIO_PIN12)
#if !defined(CONFIG_STM32F7_TIM1_CH1NOUT)
#define GPIO_OUT6 (GPIO_OUTPUT | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN8)
#endif
#if !defined(CONFIG_STM32F7_TIM1_CH2NOUT)
#define GPIO_OUT7 (GPIO_OUTPUT | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN10)
#endif
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Functions Definitions
****************************************************************************/
/****************************************************************************
* Name: stm32_bringup
*
* Description:
* Perform architecture specific initialization
*
* CONFIG_BOARDCTL=y:
* If CONFIG_NSH_ARCHINITIALIZE=y:
* Called from the NSH library (or other application)
* Otherwise, assumed to be called from some other application.
*
* Otherwise CONFIG_BOARD_LATE_INITIALIZE=y:
* Called from board_late_initialize().
*
* Otherwise, bad news: Never called
*
****************************************************************************/
int stm32_bringup(void);
/****************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the nucleo-f722ze
* board.
*
****************************************************************************/
#if defined(CONFIG_SPI)
void stm32_spidev_initialize(void);
#endif
/****************************************************************************
* Name: stm32_spidev_bus_test
*
* Description:
* Called to create the defined SPI buses and test them by initializing
* them and sending the NUCLEO_SPI_TEST (no chip select).
*
****************************************************************************/
#if defined(CONFIG_NUCLEO_F722ZE_SPI_TEST)
int stm32_spidev_bus_test(void);
#endif
/****************************************************************************
* Name: stm32_dma_alloc_init
*
* Description:
* Called to create a FAT DMA allocator
*
* Returned Value:
* 0 on success or -ENOMEM
*
****************************************************************************/
void stm32_dma_alloc_init(void);
#if defined (CONFIG_FAT_DMAMEMORY)
int stm32_dma_alloc_init(void);
#endif
/****************************************************************************
* Name: stm32_sdio_initialize
*
* Description:
* Called at application startup time to initialize the SCMMC
* functionality.
*
****************************************************************************/
#ifdef CONFIG_MMCSD
int stm32_sdio_initialize(void);
#endif
/****************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in inialization to setup
* USB-related GPIO pins for the nucleo-f722ze board.
*
****************************************************************************/
#ifdef CONFIG_STM32F7_OTGFS
void stm32_usbinitialize(void);
#endif
/****************************************************************************
* Name: stm32_pwm_setup
*
* Description:
* Initialize PWM and register the PWM device.
*
****************************************************************************/
#ifdef CONFIG_PWM
int stm32_pwm_setup(void);
#endif
/****************************************************************************
* Name: stm32_adc_setup
*
* Description:
* Initialize ADC and register the ADC driver.
*
****************************************************************************/
#ifdef CONFIG_ADC
int stm32_adc_setup(void);
#endif
/****************************************************************************
* Name: stm32_bbsram_int
****************************************************************************/
#ifdef CONFIG_STM32F7_BBSRAM
int stm32_bbsram_int(void);
#endif
/****************************************************************************
* Name: stm32_qencoder_initialize
****************************************************************************/
#ifdef CONFIG_SENSORS_QENCODER
int stm32_qencoder_initialize(const char *devpath, int timer);
#endif
/****************************************************************************
* Name: stm32_can_setup
****************************************************************************/
#ifdef CONFIG_STM32F7_CAN_CHARDRIVER
int stm32_can_setup(void);
#endif
/****************************************************************************
* Name: stm32_cansock_setup
****************************************************************************/
#ifdef CONFIG_STM32F7_CAN_SOCKET
int stm32_cansock_setup(void);
#endif
/****************************************************************************
* Name: stm32f7_gpio_initialize
****************************************************************************/
#ifdef CONFIG_DEV_GPIO
int stm32_gpio_initialize(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_STM32F7_NUCLEO_F722ZE_SRC_NUCLEO_F722ZE_H */
boards/arm/stm32f7/nucleo-144/src/stm32_adc.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_adc.c
+2 -2
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_adc.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_adc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -34,7 +34,7 @@
#include "chip.h"
#include "stm32_gpio.h"
#include "stm32_adc.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#ifdef CONFIG_ADC
boards/arm/stm32f7/nucleo-144/src/stm32_appinitialize.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_appinitialize.c
+2 -2
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_appinitialize.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_appinitialize.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -25,7 +25,7 @@
#include <nuttx/config.h>
#include <sys/types.h>
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#ifdef CONFIG_BOARDCTL
boards/arm/stm32f7/nucleo-144/src/stm32_autoleds.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_autoleds.c
+2 -2
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_autoleds.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_autoleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -33,7 +33,7 @@
#include <arch/board/board.h>
#include "stm32_gpio.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
boards/arm/stm32f7/nucleo-144/src/stm32_bbsram.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_bbsram.c
+2 -2
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_bbsram.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_bbsram.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -43,7 +43,7 @@
#include "arm_internal.h"
#include "stm32_bbsram.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#ifdef CONFIG_STM32F7_BBSRAM
boards/arm/stm32f7/nucleo-144/src/stm32_boot.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_boot.c
+2 -2
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_boot.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -30,7 +30,7 @@
#include <arch/board/board.h>
#include "arm_internal.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
/****************************************************************************
* Public Functions
boards/arm/stm32f7/nucleo-144/src/stm32_bringup.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_bringup.c
+3 -3
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_bringup.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_bringup.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -29,7 +29,7 @@
#include <syslog.h>
#include <stdio.h>
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#include <nuttx/fs/fs.h>
#include <nuttx/i2c/i2c_master.h>
#include <nuttx/kmalloc.h>
@@ -141,7 +141,7 @@ int stm32_bringup(void)
}
#endif
#if defined(CONFIG_NUCLEO_SPI_TEST)
#if defined(CONFIG_NUCLEO_F722ZE_SPI_TEST)
/* Create SPI interfaces */
ret = stm32_spidev_bus_test();
boards/arm/stm32f7/nucleo-144/src/stm32_buttons.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_buttons.c
+2 -2
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_buttons.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_buttons.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -33,7 +33,7 @@
#include <arch/board/board.h>
#include "stm32_gpio.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#ifdef CONFIG_ARCH_BUTTONS
boards/arm/stm32f7/nucleo-144/src/stm32_can.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_can.c
+2 -2
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_can.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_can.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -31,7 +31,7 @@
#include <nuttx/can/can.h>
#include "stm32_can.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#ifdef CONFIG_CAN
boards/arm/stm32f7/nucleo-144/src/stm32_cansock.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_cansock.c
+1 -1
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_cansock.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_cansock.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
boards/arm/stm32f7/nucleo-144/src/stm32_composite.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_composite.c
+1 -1
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_composite.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_composite.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
boards/arm/stm32f7/nucleo-144/src/stm32_dma_alloc.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_dma_alloc.c
+2 -2
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_dma_alloc.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_dma_alloc.c
*
* Copyright (C) 2016 PX4 Development Team. All rights reserved.
*
@@ -42,7 +42,7 @@
#include <errno.h>
#include <nuttx/mm/gran.h>
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#if defined(CONFIG_FAT_DMAMEMORY)
boards/arm/stm32f7/nucleo-144/src/stm32_gpio.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_gpio.c
+3 -3
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_gpio.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_gpio.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -36,7 +36,7 @@
#include "chip.h"
#include "stm32_gpio.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
@@ -126,7 +126,7 @@ static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
#if !defined(CONFIG_STM32F7_TIM1_CH1NOUT)
GPIO_OUT6,
#endif
#if !defined(CONFIG_STM32F7_TIM1_CH2NOUT)
#if !defined(CONFIG_STM32F7_TIM1_CH2NOUT)
GPIO_OUT7,
#endif
};
boards/arm/stm32f7/nucleo-144/src/stm32_pwm.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_pwm.c
+2 -2
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_pwm.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_pwm.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -35,7 +35,7 @@
#include "chip.h"
#include "arm_internal.h"
#include "stm32_pwm.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
/****************************************************************************
* Pre-processor Definitions
boards/arm/stm32f7/nucleo-144/src/stm32_qencoder.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_qencoder.c
+2 -2
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_qencoder.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_qencoder.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -33,7 +33,7 @@
#include "chip.h"
#include "arm_internal.h"
#include "stm32_qencoder.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
/****************************************************************************
* Public Functions
boards/arm/stm32f7/nucleo-144/src/stm32_reset.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_reset.c
+1 -1
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_reset.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_reset.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
boards/arm/stm32f7/nucleo-144/src/stm32_romfs.h → boards/arm/stm32f7/nucleo-f722ze/src/stm32_romfs.h
+1 -1
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_romfs.h
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_romfs.h
*
* Copyright (C) 2017 Tomasz Wozniak. All rights reserved.
* Author: Tomasz Wozniak <t.wozniak@samsung.com>
boards/arm/stm32f7/nucleo-144/src/stm32_romfs_initialize.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_romfs_initialize.c
+1 -1
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_romfs_initialize.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_romfs_initialize.c
* This file provides contents of an optional ROMFS volume, mounted at boot.
*
* Copyright (C) 2017 Tomasz Wozniak. All rights reserved.
boards/arm/stm32f7/nucleo-144/src/stm32_sdio.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_sdio.c
+2 -2
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_sdio.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_sdio.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -33,7 +33,7 @@
#include <nuttx/mmcsd.h>
#include "chip.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#include "stm32_gpio.h"
#include "stm32_sdmmc.h"
boards/arm/stm32f7/nucleo-144/src/stm32_spi.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_spi.c
+55 -51
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_spi.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_spi.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -39,7 +39,7 @@
#include "stm32_gpio.h"
#include "stm32_spi.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#if defined(CONFIG_SPI)
@@ -47,45 +47,45 @@
* Pre-processor Definitions
****************************************************************************/
#if defined(CONFIG_NUCLEO_SPI1_TEST)
# if defined(CONFIG_NUCLEO_SPI1_TEST_MODE0)
# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE0
# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE1)
# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE1
# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE2)
# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE2
# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE3)
# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE3
#if defined(CONFIG_NUCLEO_F722ZE_SPI1_TEST)
# if defined(CONFIG_NUCLEO_F722ZE_SPI1_TEST_MODE0)
# define CONFIG_NUCLEO_F722ZE_SPI1_TEST_MODE SPIDEV_MODE0
# elif defined(CONFIG_NUCLEO_F722ZE_SPI1_TEST_MODE1)
# define CONFIG_NUCLEO_F722ZE_SPI1_TEST_MODE SPIDEV_MODE1
# elif defined(CONFIG_NUCLEO_F722ZE_SPI1_TEST_MODE2)
# define CONFIG_NUCLEO_F722ZE_SPI1_TEST_MODE SPIDEV_MODE2
# elif defined(CONFIG_NUCLEO_F722ZE_SPI1_TEST_MODE3)
# define CONFIG_NUCLEO_F722ZE_SPI1_TEST_MODE SPIDEV_MODE3
# else
# error "No CONFIG_NUCLEO_SPI1_TEST_MODEx defined"
# error "No CONFIG_NUCLEO_F722ZE_SPI1_TEST_MODEx defined"
# endif
#endif
#if defined(CONFIG_NUCLEO_SPI2_TEST)
# if defined(CONFIG_NUCLEO_SPI2_TEST_MODE0)
# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE0
# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE1)
# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE1
# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE2)
# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE2
# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE3)
# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE3
#if defined(CONFIG_NUCLEO_F722ZE_SPI2_TEST)
# if defined(CONFIG_NUCLEO_F722ZE_SPI2_TEST_MODE0)
# define CONFIG_NUCLEO_F722ZE_SPI2_TEST_MODE SPIDEV_MODE0
# elif defined(CONFIG_NUCLEO_F722ZE_SPI2_TEST_MODE1)
# define CONFIG_NUCLEO_F722ZE_SPI2_TEST_MODE SPIDEV_MODE1
# elif defined(CONFIG_NUCLEO_F722ZE_SPI2_TEST_MODE2)
# define CONFIG_NUCLEO_F722ZE_SPI2_TEST_MODE SPIDEV_MODE2
# elif defined(CONFIG_NUCLEO_F722ZE_SPI2_TEST_MODE3)
# define CONFIG_NUCLEO_F722ZE_SPI2_TEST_MODE SPIDEV_MODE3
# else
# error "No CONFIG_NUCLEO_SPI2_TEST_MODEx defined"
# error "No CONFIG_NUCLEO_F722ZE_SPI2_TEST_MODEx defined"
# endif
#endif
#if defined(CONFIG_NUCLEO_SPI3_TEST)
# if defined(CONFIG_NUCLEO_SPI3_TEST_MODE0)
# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE0
# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE1)
# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE1
# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE2)
# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE2
# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE3)
# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE3
#if defined(CONFIG_NUCLEO_F722ZE_SPI3_TEST)
# if defined(CONFIG_NUCLEO_F722ZE_SPI3_TEST_MODE0)
# define CONFIG_NUCLEO_F722ZE_SPI3_TEST_MODE SPIDEV_MODE0
# elif defined(CONFIG_NUCLEO_F722ZE_SPI3_TEST_MODE1)
# define CONFIG_NUCLEO_F722ZE_SPI3_TEST_MODE SPIDEV_MODE1
# elif defined(CONFIG_NUCLEO_F722ZE_SPI3_TEST_MODE2)
# define CONFIG_NUCLEO_F722ZE_SPI3_TEST_MODE SPIDEV_MODE2
# elif defined(CONFIG_NUCLEO_F722ZE_SPI3_TEST_MODE3)
# define CONFIG_NUCLEO_F722ZE_SPI3_TEST_MODE SPIDEV_MODE3
# else
# error "No CONFIG_NUCLEO_SPI3_TEST_MODEx defined"
# error "No CONFIG_NUCLEO_F722ZE_SPI3_TEST_MODEx defined"
# endif
#endif
@@ -171,7 +171,7 @@ static const uint32_t g_spi3gpio[] =
};
#endif
#if defined(CONFIG_NUCLEO_SPI_TEST)
#if defined(CONFIG_NUCLEO_F722ZE_SPI_TEST)
# if defined(CONFIG_STM32F7_SPI1)
struct spi_dev_s *spi1;
# endif
@@ -191,7 +191,8 @@ struct spi_dev_s *spi3;
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the Nucleo-144 board.
* Called to configure SPI chip select GPIO pins for the nucleo-f722ze
* board.
*
****************************************************************************/
@@ -430,14 +431,14 @@ int stm32_spi6cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
#endif /* CONFIG_SPI_CMDDATA */
#if defined(CONFIG_NUCLEO_SPI_TEST)
#if defined(CONFIG_NUCLEO_F722ZE_SPI_TEST)
int stm32_spidev_bus_test(void)
{
/* Configure and test SPI- */
uint8_t *tx = (uint8_t *)CONFIG_NUCLEO_SPI_TEST_MESSAGE;
uint8_t *tx = (uint8_t *)CONFIG_NUCLEO_F722ZE_SPI_TEST_MESSAGE;
#if defined(CONFIG_NUCLEO_SPI1_TEST)
#if defined(CONFIG_NUCLEO_F722ZE_SPI1_TEST)
spi1 = stm32_spibus_initialize(1);
if (!spi1)
@@ -448,13 +449,14 @@ int stm32_spidev_bus_test(void)
/* Default SPI1 to NUCLEO_SPI1_FREQ and mode */
SPI_SETFREQUENCY(spi1, CONFIG_NUCLEO_SPI1_TEST_FREQ);
SPI_SETBITS(spi1, CONFIG_NUCLEO_SPI1_TEST_BITS);
SPI_SETMODE(spi1, CONFIG_NUCLEO_SPI1_TEST_MODE);
SPI_EXCHANGE(spi1, tx, NULL, nitems(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
SPI_SETFREQUENCY(spi1, CONFIG_NUCLEO_F722ZE_SPI1_TEST_FREQ);
SPI_SETBITS(spi1, CONFIG_NUCLEO_F722ZE_SPI1_TEST_BITS);
SPI_SETMODE(spi1, CONFIG_NUCLEO_F722ZE_SPI1_TEST_MODE);
SPI_EXCHANGE(spi1, tx, NULL,
nitems(CONFIG_NUCLEO_F722ZE_SPI_TEST_MESSAGE));
#endif
#if defined(CONFIG_NUCLEO_SPI2_TEST)
#if defined(CONFIG_NUCLEO_F722ZE_SPI2_TEST)
spi2 = stm32_spibus_initialize(2);
if (!spi2)
@@ -465,13 +467,14 @@ int stm32_spidev_bus_test(void)
/* Default SPI2 to NUCLEO_SPI2_FREQ and mode */
SPI_SETFREQUENCY(spi2, CONFIG_NUCLEO_SPI2_TEST_FREQ);
SPI_SETBITS(spi2, CONFIG_NUCLEO_SPI2_TEST_BITS);
SPI_SETMODE(spi2, CONFIG_NUCLEO_SPI2_TEST_MODE);
SPI_EXCHANGE(spi2, tx, NULL, nitems(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
SPI_SETFREQUENCY(spi2, CONFIG_NUCLEO_F722ZE_SPI2_TEST_FREQ);
SPI_SETBITS(spi2, CONFIG_NUCLEO_F722ZE_SPI2_TEST_BITS);
SPI_SETMODE(spi2, CONFIG_NUCLEO_F722ZE_SPI2_TEST_MODE);
SPI_EXCHANGE(spi2, tx, NULL,
nitems(CONFIG_NUCLEO_F722ZE_SPI_TEST_MESSAGE));
#endif
#if defined(CONFIG_NUCLEO_SPI3_TEST)
#if defined(CONFIG_NUCLEO_F722ZE_SPI3_TEST)
spi3 = stm32_spibus_initialize(3);
if (!spi3)
@@ -482,10 +485,11 @@ int stm32_spidev_bus_test(void)
/* Default SPI3 to NUCLEO_SPI3_FREQ and mode */
SPI_SETFREQUENCY(spi3, CONFIG_NUCLEO_SPI3_TEST_FREQ);
SPI_SETBITS(spi3, CONFIG_NUCLEO_SPI3_TEST_BITS);
SPI_SETMODE(spi3, CONFIG_NUCLEO_SPI3_TEST_MODE);
SPI_EXCHANGE(spi3, tx, NULL, nitems(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
SPI_SETFREQUENCY(spi3, CONFIG_NUCLEO_F722ZE_SPI3_TEST_FREQ);
SPI_SETBITS(spi3, CONFIG_NUCLEO_F722ZE_SPI3_TEST_BITS);
SPI_SETMODE(spi3, CONFIG_NUCLEO_F722ZE_SPI3_TEST_MODE);
SPI_EXCHANGE(spi3, tx, NULL,
nitems(CONFIG_NUCLEO_F722ZE_SPI_TEST_MESSAGE));
#endif
return OK;
boards/arm/stm32f7/nucleo-144/src/stm32_usb.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_usb.c
+3 -3
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_usb.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_usb.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -41,7 +41,7 @@
#include "chip.h"
#include "stm32_gpio.h"
#include "stm32_otg.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#ifdef CONFIG_STM32F7_OTGFS
@@ -122,7 +122,7 @@ static int usbhost_waiter(int argc, char *argv[])
*
* Description:
* Called from stm32_usbinitialize very early in inialization to setup
* USB-related GPIO pins for the nucleo-144 board.
* USB-related GPIO pins for the nucleo-f722ze board.
*
****************************************************************************/
boards/arm/stm32f7/nucleo-144/src/stm32_userleds.c → boards/arm/stm32f7/nucleo-f722ze/src/stm32_userleds.c
+2 -2
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_userleds.c
* boards/arm/stm32f7/nucleo-f722ze/src/stm32_userleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -33,7 +33,7 @@
#include <arch/board/board.h>
#include "stm32_gpio.h"
#include "nucleo-144.h"
#include "nucleo-f722ze.h"
#ifndef CONFIG_ARCH_LEDS
boards/arm/stm32f7/nucleo-f746zg/CMakeLists.txt
+21
View File
@@ -0,0 +1,21 @@
# ##############################################################################
# boards/arm/stm32f7/nucleo-f746zg/CMakeLists.txt
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)
boards/arm/stm32f7/nucleo-f746zg/Kconfig
+272
View File
@@ -0,0 +1,272 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_NUCLEO_F746ZG
config STM32_ROMFS
bool "Automount baked-in ROMFS image"
default n
depends on FS_ROMFS
---help---
Select STM32_ROMFS_IMAGEFILE, STM32_ROMFS_DEV_MINOR, STM32_ROMFS_MOUNTPOINT
config STM32_ROMFS_DEV_MINOR
int "Minor for the block device backing the data"
depends on STM32_ROMFS
default 64
config STM32_ROMFS_MOUNTPOINT
string "Mountpoint of the custom romfs image"
depends on STM32_ROMFS
default "/rom"
config STM32_ROMFS_IMAGEFILE
string "ROMFS image file to include into build"
depends on STM32_ROMFS
default "../../../rom.img"
choice
prompt "Select Console wiring."
default NUCLEO_F746ZG_CONSOLE_ARDUINO
---help---
Select where you will connect the console.
Virtual COM Port:
Advantage: Use the ST-Link as a console. No Extra wiring
needed.
Disadvantage: Not the best choice for initial bring up.
ARDUINO Connector:
Advantage: You have a shield so it is easy.
Disadvantage: You loose the use of the
other functions on PC6, PC7
STM32F7
ARDUINO FUNCTION GPIO
-- ----- --------- ----
DO RX USART6_RX PG9
D1 TX USART6_TX PG14
-- ----- --------- ---
OR
Morpho Connector:
STM32F7
MORPHO FUNCTION GPIO
-------- --------- -----
CN12-64 UART8_RX PE0
CN11-61 UART8_TX PE1
-------- --------- -----
OR
Morpho Connector UART4:
STM32F7
MORPHO FUNCTION GPIO
-------- --------- -----
CN11-30 UART4_RX PA0
CN11-28 UART4_TX PA1
-------- --------- -----
Note: SB13 must be removed to disable Ethernet.
config NUCLEO_F746ZG_CONSOLE_ARDUINO
bool "Arduino Connector"
select STM32F7_USART6
select USART6_SERIALDRIVER
config NUCLEO_F746ZG_CONSOLE_VIRTUAL
bool "Virtual Comport"
select STM32F7_USART3
select USART3_SERIALDRIVER
config NUCLEO_F746ZG_CONSOLE_MORPHO
bool "Morpho Connector"
select STM32F7_UART8
select UART8_SERIALDRIVER
config NUCLEO_F746ZG_CONSOLE_MORPHO_UART4
bool "Morpho Connector UART4"
select STM32F7_UART4
select UART4_SERIALDRIVER
config NUCLEO_F746ZG_CONSOLE_NONE
bool "No Console"
endchoice # "Select Console wiring"
config NUCLEO_F746ZG_SPI_TEST
bool "Enable SPI test"
default n
---help---
Enable Spi test - initialize and configure SPI to send
NUCLEO_F746ZG_SPI_TEST_MESSAGE text. The text is sent on the
selected SPI Buses with the configured parameters.
Note the CS lines will not be asserted.
if NUCLEO_F746ZG_SPI_TEST
config NUCLEO_F746ZG_SPI_TEST_MESSAGE
string "Text to Send on SPI Bus(es)"
default "Hello World"
depends on NUCLEO_F746ZG_SPI_TEST
---help---
Text to sent on SPI bus(es)
config NUCLEO_F746ZG_SPI1_TEST
bool "Test SPI bus 1"
default n
depends on NUCLEO_F746ZG_SPI_TEST
---help---
Enable Spi test - on SPI BUS 1
if NUCLEO_F746ZG_SPI1_TEST
config NUCLEO_F746ZG_SPI1_TEST_FREQ
int "SPI 1 Clock Freq in Hz"
default 1000000
depends on NUCLEO_F746ZG_SPI1_TEST
---help---
Sets SPI 1 Clock Freq
config NUCLEO_F746ZG_SPI1_TEST_BITS
int "SPI 1 number of bits"
default 8
depends on NUCLEO_F746ZG_SPI1_TEST
---help---
Sets SPI 1 bit length
choice
prompt "SPI BUS 1 Clock Mode"
default NUCLEO_F746ZG_SPI1_TEST_MODE3
---help---
Sets SPI 1 clock mode
config NUCLEO_F746ZG_SPI1_TEST_MODE0
bool "CPOL=0 CPHA=0"
config NUCLEO_F746ZG_SPI1_TEST_MODE1
bool "CPOL=0 CPHA=1"
config NUCLEO_F746ZG_SPI1_TEST_MODE2
bool "CPOL=1 CPHA=0"
config NUCLEO_F746ZG_SPI1_TEST_MODE3
bool "CPOL=1 CPHA=1"
endchoice # "SPI BUS 1 Clock Mode"
endif # NUCLEO_F746ZG_SPI1_TEST
config NUCLEO_F746ZG_SPI2_TEST
bool "Test SPI bus 2"
default n
depends on NUCLEO_F746ZG_SPI_TEST
---help---
Enable Spi test - on SPI BUS 2
if NUCLEO_F746ZG_SPI2_TEST
config NUCLEO_F746ZG_SPI2_TEST_FREQ
int "SPI 2 Clock Freq in Hz"
default 12000000
depends on NUCLEO_F746ZG_SPI2_TEST
---help---
Sets SPI 2 Clock Freq
config NUCLEO_F746ZG_SPI2_TEST_BITS
int "SPI 2 number of bits"
default 8
depends on NUCLEO_F746ZG_SPI2_TEST
---help---
Sets SPI 2 bit length
choice
prompt "SPI BUS 2 Clock Mode"
default NUCLEO_F746ZG_SPI2_TEST_MODE3
---help---
Sets SPI 2 clock mode
config NUCLEO_F746ZG_SPI2_TEST_MODE0
bool "CPOL=0 CPHA=0"
config NUCLEO_F746ZG_SPI2_TEST_MODE1
bool "CPOL=0 CPHA=1"
config NUCLEO_F746ZG_SPI2_TEST_MODE2
bool "CPOL=1 CPHA=0"
config NUCLEO_F746ZG_SPI2_TEST_MODE3
bool "CPOL=1 CPHA=1"
endchoice # "SPI BUS 2 Clock Mode"
endif # NUCLEO_F746ZG_SPI2_TEST
config NUCLEO_F746ZG_SPI3_TEST
bool "Test SPI bus 3"
default n
depends on NUCLEO_F746ZG_SPI_TEST
---help---
Enable Spi test - on SPI BUS 3
if NUCLEO_F746ZG_SPI3_TEST
config NUCLEO_F746ZG_SPI3_TEST_FREQ
int "SPI 3 Clock Freq in Hz"
default 40000000
depends on NUCLEO_F746ZG_SPI3_TEST
---help---
Sets SPI 3 Clock Freq
config NUCLEO_F746ZG_SPI3_TEST_BITS
int "SPI 3 number of bits"
default 8
depends on NUCLEO_F746ZG_SPI3_TEST
---help---
Sets SPI 3 bit length
choice
prompt "SPI BUS 3 Clock Mode"
default NUCLEO_F746ZG_SPI3_TEST_MODE3
---help---
Sets SPI 3 clock mode
config NUCLEO_F746ZG_SPI3_TEST_MODE0
bool "CPOL=0 CPHA=0"
config NUCLEO_F746ZG_SPI3_TEST_MODE1
bool "CPOL=0 CPHA=1"
config NUCLEO_F746ZG_SPI3_TEST_MODE2
bool "CPOL=1 CPHA=0"
config NUCLEO_F746ZG_SPI3_TEST_MODE3
bool "CPOL=1 CPHA=1"
endchoice # "SPI BUS 3 Clock Mode"
endif # NUCLEO_F746ZG_SPI3_TEST
endif # NUCLEO_F746ZG_SPI_TEST
choice
prompt "CAN1 pins selection"
default NUCLEO_F746ZG_CAN1_MAP_PD0PD1
depends on STM32F7_CAN1
config NUCLEO_F746ZG_F746ZG_CAN1_MAP_D14D15
bool "CAN1_TX=D14 CAN1_RX=D15"
config NUCLEO_F746ZG_CAN1_MAP_PD0PD1
bool "CAN1_RX=PD0 CAN1_TX=PD1"
endchoice # CAN1 pins selection
endif # ARCH_BOARD_NUCLEO_F746ZG
boards/arm/stm32f7/nucleo-144/configs/f746-evalos/defconfig → boards/arm/stm32f7/nucleo-f746zg/configs/evalos/defconfig
+3 -3
View File
@@ -12,8 +12,8 @@
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32F7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-144"
CONFIG_ARCH_BOARD_NUCLEO_144=y
CONFIG_ARCH_BOARD="nucleo-f746zg"
CONFIG_ARCH_BOARD_NUCLEO_F746ZG=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32f7"
CONFIG_ARCH_CHIP_STM32F746ZG=y
@@ -37,7 +37,7 @@ CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_NUCLEO_CONSOLE_VIRTUAL=y
CONFIG_NUCLEO_F746ZG_CONSOLE_VIRTUAL=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PRIORITY_INHERITANCE=y
CONFIG_PTHREAD_MUTEX_DEFAULT_PRIO_INHERIT=y

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