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support for SAMA5D27 SDMMC peripheral

Browse Source 
- MMC and SD Card driver
- ported from imxrt_usdhc.c

Squashed commit of the following:

commit 46cbe18ad6a6e41ec2727d839f86f5670577878a
Author: Adam Feuer <adam@starcat.io>
Date:   Wed Jul 15 10:28:02 2020 -0700

    nxstyle change - Public Function Prototypes

    - instead of Public Functions

commit 486b7b62e83a78ae15b114e34846900d8fef8248
Author: Adam Feuer <adam@starcat.io>
Date:   Wed Jul 15 10:06:51 2020 -0700

    nxstyle changes

commit 28280d585a40aac99fd0e538295828ea013739b7
Author: Adam Feuer <adam@starcat.io>
Date:   Wed Jul 15 10:06:29 2020 -0700

    removing unused enum value

commit 7da6ba437e7e023d348e63c497732fea985a2d1b
Author: Adam Feuer <adam@starcat.io>
Date:   Tue Jul 14 21:17:49 2020 -0700

    CI build error fixes

    - unused vars
    - incorrect method calls

commit 145a73449b9d1eaed8a6cbf47cb53fb5b7a551f6
Author: Adam Feuer <adam@starcat.io>
Date:   Tue Jul 14 17:29:56 2020 -0700

    adding #defines to prevent unused var warning

commit 47ed2c08235816caded26a019cf33899daed1621
Author: Adam Feuer <adam@starcat.io>
Date:   Tue Jul 14 16:29:07 2020 -0700

    removing obsolete config values

commit b43f129c03a8bb8dc57ae6984d124ce9e9306196
Author: Adam Feuer <adam@starcat.io>
Date:   Tue Jul 14 09:58:42 2020 -0700

    removed obsolete config setting

commit 23e3af846ac24cac928442c7af86c5d0ef183ad3
Merge: 8b47330fe5 6f6d61eec4
Author: Adam Feuer <adam@starcat.io>
Date:   Tue Jul 14 09:53:12 2020 -0700

    Merge remote-tracking branch 'upstream/master' into feature/sama5d27-sdmmc-support

commit 8b47330fe5bb49bbd1991f2f3e2c69bdfb833d2c
Author: Adam Feuer <adam@starcat.io>
Date:   Tue Jul 14 09:51:56 2020 -0700

    replaced license headers with Apache License 2.0

commit 865e69b9a84d077ab9e05c2056dc7a515222c6c7
Author: Adam Feuer <adam@starcat.io>
Date:   Thu Jul 9 18:38:01 2020 -0700

    SAMA5D2x SDMMC peripheral support (SD Card driver)

    - reading and writing at 25 MHz and 50Mhz
    - UHS_SDR50, UHS_DDR50, and UHS_SDR104 are supported
    - ported from imxrt_usdhc.c
    - only tested on SAMA5D27

    Squashed commit of the following:

    commit e3122baef2feaeb32bb00798ae56310b2cc5c448
    Author: Adam Feuer <adam@starcat.io>
    Date:   Thu Jul 9 18:30:03 2020 -0700

        added sdmmcnsh defconfig and basic docs

    commit 12a290d7465a0a006473ba67893bf891a7bcea83
    Author: Adam Feuer <adam@starcat.io>
    Date:   Thu Jul 9 17:50:06 2020 -0700

        nxstyle changes

    commit 33409c0f63c328dc200150ba883327cadf0300b2
    Author: Adam Feuer <adam@starcat.io>
    Date:   Thu Jul 9 16:15:00 2020 -0700

        add short delay to in recvshortcrc

        - to allow SDMMC to respond

    commit 3be7a7fb6f79900042d1fdbef72810f364ac5f62
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Thu Jul 9 10:54:59 2020 -0700

        added SDR50 and SDR104 SDMMC bus modes

    commit 2888408866548ca53e582ea1525178a7733617b4
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Thu Jul 9 10:54:25 2020 -0700

        comment formatting cleanup

    commit 06cf2c39193971155eaa6f9c89a39a88b53964a8
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Thu Jul 9 10:34:01 2020 -0700

        removed unneeded comment

    commit ac89b69231bdf19563754865fda93d4bbbb4488d
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Thu Jul 9 10:30:23 2020 -0700

        code cleanup

        - removing custinfo() logging
        - remove duplicate #defines
        - move var declarations to the beginning of methods

    commit bcd4abec7935ee9023ab72edfb02685dbeee243c
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Wed Jul 8 16:34:31 2020 -0700

        handle SDMA Boundary Pause interrupt (DMAINT)

        - SDMMC_INT_DINT
        - add to waitints
        - add handler to sam_interrupt

    commit e9da026c1270e999df520ee2c60487195799f58c
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Tue Jul 7 16:07:34 2020 -0700

        Kconfig setting for SDMMC bus speed

        - 25 and 50 MHz
        - 50 MHz is the default

    commit 9edc636b7f18f981d653f85970c3af0b80801778
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Mon Jul 6 21:55:51 2020 -0700

        added HSEN bit change for high speed mode

        - above 26 MHz

    commit b8e91c95b0f7b2f8220f02b1eb42b6134e0660d0
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Mon Jul 6 21:28:03 2020 -0700

        added calloc to fix bug

        - not sure why this works.

    commit 1ceaf2f8487fe39d4d6fb21adecd57e4c4992e07
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Mon Jul 6 21:25:47 2020 -0700

        removing spurious typo characters

    commit 14ba51743bcca35686b07a76f5af17bcce078a5f
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Sat Jul 4 18:10:46 2020 -0700

        nxstyle changes

    commit d8af26df47b7840117de0d3a44ec548b3a72bc2b
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Sat Jul 4 17:01:11 2020 -0700

        nxstyle changes

    commit 0ae532bd62d02c5ac36aa2192f31fa1f7f1cde99
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Sat Jul 4 16:37:17 2020 -0700

        remove long lines in comments - nxstyle

    commit 3d025a84f8e9ddb7f7a4570504118d782dd5574c
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Sat Jul 4 16:36:52 2020 -0700

        removed custinfo logging

    commit 366b5d9d241a42d693583679cb49aa7bf25615aa
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Sat Jul 4 16:35:08 2020 -0700

        removed custinfo logging

    commit c74396e4a4943873c7de5b6ffee193787c39baef
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Sat Jul 4 16:34:36 2020 -0700

        fixed typo

    commit 7f51e99d7f4c1e5e0bf71a84fd0b2467157fea59
    Merge: c40f8c1039 2481b1bfd5
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Sat Jul 4 15:33:06 2020 -0700

        Merge remote-tracking branch 'upstream/master' into feature/sama5d27-sdmmc-support

    commit c40f8c10390ecefeb3a113046edd6740b07ab31b
    Author: Adam Feuer <adam@adamfeuer.com>
    Date:   Thu Jul 2 22:08:20 2020 -0700

        SDMMC support for SAMA5D27
This commit is contained in:
Adam Feuer
2020-07-16 23:39:37 +01:00
committed by Abdelatif Guettouche
parent 954ee9d5f3
commit 65a866fbe2
23 changed files with 5962 additions and 207 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/sama5/Kconfig
+40
View File
@@ -121,6 +121,10 @@ config SAMA5_HAVE_EMAC1
bool
default n
config SAMA5_HAVE_SDMMC
bool
default n
config SAMA5_HAVE_HSMCI2
bool
default n
@@ -285,6 +289,8 @@ config ARCH_CHIP_ATSAMA5D27
select SAMA5_HAVE_CAN0
select SAMA5_HAVE_CAN1
select SAMA5_HAVE_DDR32
select SAMA5_HAVE_SDMMC
select SAMA5_HAVE_GMAC
config ARCH_CHIP_ATSAMA5D28
bool "Atmel ATSAMA5D28"
@@ -545,6 +551,12 @@ config SAMA5_TWI3
default n
depends on SAMA5_HAVE_TWI3
config SAMA5_SDMMC
bool "Secure Digital Multimedia Card Interface (SDMMC)"
default n
depends on SAMA5_HAVE_SDMMC
select ARCH_HAVE_SDIO
config SAMA5_HSMCI0
bool "High Speed Multimedia Card Interface 0 (HSMCI0)"
default n
@@ -5056,4 +5068,32 @@ config SAMA5_EBICS3_HEAP_SIZE
endif #SAMA5_EBICS3_HEAP
endmenu # Heap Configuration
config SAMA5_SDMMC
bool "enable SDMMC controller"
default y if SAMA5_HAVE_SDMMC
select SDIO_DMA
select SCHED_WORKQUEUE
select SCHED_HPWORK
select MMCSD
select MMCSD_SDIO
select SDIO_BLOCKSETUP
select ARCH_HAVE_SDIO
select SAMA5_SDMMC_DMA
---help---
Enable SD Card interface SDMMC. Selects SAMA5_SDMMC SAMA5_SDMMC_DMA SDIO_DMA SCHED_WORKQUEUE SCHED_HPWORK SDIO_BLOCKSETUP
choice
prompt "SDMMC maximum bus speed"
default SAMA5_SDMMC_50MHZ
depends on SAMA5_SDMMC
config SAMA5_SDMMC_25MHZ
bool "SDMMC 25Mhz"
config SAMA5_SDMMC_50MHZ
bool "SDMMC 50Mhz"
endchoice # SDMMC bus speed
endif # ARCH_CHIP_SAMA5
arch/arm/src/sama5/Make.defs
+8
View File
@@ -213,6 +213,14 @@ endif
endif
endif
ifeq ($(CONFIG_SAMA5_SDMMC0),y)
CHIP_CSRCS += sam_sdmmc.c
else
ifeq ($(CONFIG_SAMA5_SDMMC1),y)
CHIP_CSRCS += sam_sdmmc.c
endif
endif
ifeq ($(CONFIG_SAMA5_HSMCI0),y)
CHIP_CSRCS += sam_hsmci.c sam_hsmci_clkdiv.c
else
arch/arm/src/sama5/hardware/_sama5d2x_memorymap.h
+7 -3
View File
@@ -317,6 +317,8 @@
#define SAM_AXIMX_MMUFLAGS MMU_IOFLAGS
#define SAM_DAP_MMUFLAGS MMU_IOFLAGS
#define SAM_L2CC_MMUFLAGS MMU_IOFLAGS
#define SAM_SDMMC0_MMUFLAGS MMU_IOFLAGS
#define SAM_SDMMC1_MMUFLAGS MMU_IOFLAGS
/* If the NFC is not being used, the NFC SRAM can be used as general purpose
* SRAM (cached). If the NFC is used, then the NFC SRAM should be treated
@@ -429,8 +431,8 @@
#define SAM_EBICS1_VSECTION 0x60000000 /* 0x60000000-0x6fffffff: EBI Chip Select 1 */
#define SAM_EBICS2_VSECTION 0x70000000 /* 0x70000000-0x7fffffff: EBI Chip Select 2 */
#define SAM_EBICS3_VSECTION 0x80000000 /* 0x80000000-0x8fffffff: EBI Chip Select 3 */
#define SAM_QSPI0AES_VSECTION 0x90000000 /* 0x90000000-0x9fffffff: QSPI0 AES Memory */
#define SAM_QSPI1AES_VSECTION 0xa0000000 /* 0xa0000000-0xafffffff: QSPI1 AES Memory */
#define SAM_QSPI0AES_VSECTION 0x90000000 /* 0x90000000-0x97ffffff: QSPI0 AES Memory */
#define SAM_QSPI1AES_VSECTION 0x98000000 /* 0x98000000-0x9fffffff: QSPI1 AES Memory */
#define SAM_SDMMC0_VSECTION 0xa0000000 /* 0xa0000000-0xafffffff: SDMMC0 */
#define SAM_SDMMC1_VSECTION 0xb0000000 /* 0xb0000000-0xbfffffff: SDMMC1 */
#define SAM_NFCCR_VSECTION 0xc0000000 /* 0xc0000000-0xcfffffff: NFC Command Registers */
@@ -461,6 +463,8 @@
/* Peripheral virtual base addresses */
#define SAM_SDMMC0_VBASE (SAM_SDMMC0_VSECTION)
#define SAM_SDMMC1_VBASE (SAM_SDMMC1_VSECTION)
#define SAM_LCDC_VBASE (SAM_PERIPHA_VSECTION+SAM_LCDC_OFFSET)
#define SAM_XDMAC1_VBASE (SAM_PERIPHA_VSECTION+SAM_XDMAC1_OFFSET)
#define SAM_ISC_VBASE (SAM_PERIPHA_VSECTION+SAM_ISC_OFFSET)
@@ -640,7 +644,7 @@
* 1) If CONFIG_ARCH_ROMPGTABLE, then the page table resides in ROM and we
* will not use any page table in RAM.
* 2) We are executing out of SRAM. In this case, vectors will reside at
* the bottom of SRAM, following by .text, .data, .bss, and heep. The
* the bottom of SRAM, following by .text, .data, .bss, and heap. The
* page table will be squeezed into the end of internal SRAM in this
* case.
*
arch/arm/src/sama5/hardware/_sama5d2x_pinmap.h
+32 -31
View File
@@ -1,4 +1,4 @@
/************************************************************************************************************
/****************************************************************************
* arch/arm/src/sama5/hardware/_sama5d2x_pinmap.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
@@ -31,40 +31,42 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMA5_HARDWARE__SAMA5D2X_PINMAP_H
#define __ARCH_ARM_SRC_SAMA5_HARDWARE__SAMA5D2X_PINMAP_H
/************************************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
#include "sam_pio.h"
/************************************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************************************/
****************************************************************************/
/* PIO pin definitions **************************************************************************************/
/* Alternate Pin Functions.
/* PIO pin definitions ******************************************************
* Alternate Pin Functions.
*
* Alternative pin selections are provided with a numeric suffix like _1, _2, etc. Drivers, however, will
* use the pin selection without the numeric suffix. Additional definitions are required in the board.h
* file. For example, if we wanted the PCK0 on PB26, then the following definition should appear in the
* board.h header file for that board:
* Alternative pin selections are provided with a numeric suffix like _1, _2,
* etc. Drivers, however, will use the pin selection without the numeric
* suffix. Additional definitions are required in the board.h file. For
* example, if we wanted the PCK0 on PB26, then the following definition
* should appear in the board.h header file for that board:
*
* #define PIO_PMC_PCK0 PIO_PMC_PCK0_1
*
* The PCK logic will then automatically configure PB26 as the PCK0 pin.
*/
/* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
* Additional effort is required to select specific PIO options such as frequency, open-drain/push-pull,
* and pull-up/down! Just the basics are defined for most pins in this file at the present time.
/* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
* Additional effort is required to select specific PIO options such as
* frequency, open-drain/push-pull, and pull-up/down! Just the basics are
* defined for most pins in this file at the present time.
*/
/* Analog-to-Digital Converter - ADC */
@@ -537,7 +539,6 @@
#define PIO_PDMIC_DAT_1 (PIO_PERIPHD | PIO_CFG_DEFAULT | PIO_PORT_PIOB | PIO_PIN11)
#define PIO_PDMIC_DAT_2 (PIO_PERIPHD | PIO_CFG_DEFAULT | PIO_PORT_PIOB | PIO_PIN26)
/* Pulse Width Modulation Controller - PWM */
#define PIO_PWM0_EXTRG0 (PIO_PERIPHD | PIO_CFG_DEFAULT | PIO_PORT_PIOB | PIO_PIN3)
@@ -601,28 +602,28 @@
/* Secure Data Memory Card - SDMMC */
#define PIO_SDMMC0_CD (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN13)
#define PIO_SDMMC0_CD (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN13 | PIO_CFG_DEGLITCH | PIO_INT_BOTHEDGES | PIO_INPUT )
#define PIO_SDMMC0_CK (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN0)
#define PIO_SDMMC0_CMD (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN1)
#define PIO_SDMMC0_DAT0 (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN2)
#define PIO_SDMMC0_DAT1 (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN3)
#define PIO_SDMMC0_DAT2 (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN4)
#define PIO_SDMMC0_DAT3 (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN5)
#define PIO_SDMMC0_DAT4 (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN6)
#define PIO_SDMMC0_DAT5 (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN7)
#define PIO_SDMMC0_DAT6 (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN8)
#define PIO_SDMMC0_DAT7 (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN9)
#define PIO_SDMMC0_CMD (PIO_PERIPHA | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN1)
#define PIO_SDMMC0_DAT0 (PIO_PERIPHA | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN2)
#define PIO_SDMMC0_DAT1 (PIO_PERIPHA | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN3)
#define PIO_SDMMC0_DAT2 (PIO_PERIPHA | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN4)
#define PIO_SDMMC0_DAT3 (PIO_PERIPHA | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN5)
#define PIO_SDMMC0_DAT4 (PIO_PERIPHA | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN6)
#define PIO_SDMMC0_DAT5 (PIO_PERIPHA | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN7)
#define PIO_SDMMC0_DAT6 (PIO_PERIPHA | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN8)
#define PIO_SDMMC0_DAT7 (PIO_PERIPHA | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN9)
#define PIO_SDMMC0_RSTN (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN10)
#define PIO_SDMMC0_VDDSEL (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN11)
#define PIO_SDMMC0_WP (PIO_PERIPHA | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN12)
#define PIO_SDMMC1_CD (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN30)
#define PIO_SDMMC1_CK (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN22)
#define PIO_SDMMC1_CMD (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN28)
#define PIO_SDMMC1_DAT0 (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN18)
#define PIO_SDMMC1_DAT1 (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN19)
#define PIO_SDMMC1_DAT2 (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN20)
#define PIO_SDMMC1_DAT3 (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN21)
#define PIO_SDMMC1_CMD (PIO_PERIPHE | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN28)
#define PIO_SDMMC1_DAT0 (PIO_PERIPHE | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN18)
#define PIO_SDMMC1_DAT1 (PIO_PERIPHE | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN19)
#define PIO_SDMMC1_DAT2 (PIO_PERIPHE | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN20)
#define PIO_SDMMC1_DAT3 (PIO_PERIPHE | PIO_CFG_PULLUP | PIO_PORT_PIOA | PIO_PIN21)
#define PIO_SDMMC1_RSTN (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN27)
#define PIO_SDMMC1_WP (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN29)
arch/arm/src/sama5/hardware/sam_sdmmc.h
+603
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File diff suppressed because it is too large Load Diff
arch/arm/src/sama5/hardware/sama5d2_sdmmc.h
+619
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File diff suppressed because it is too large Load Diff
arch/arm/src/sama5/sam_hsmci_clkdiv.c
+1 -1
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/sama5/sam_pmc.c
* arch/arm/src/sama5/sam_hsmci_clkdiv.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/sama5/sam_pioirq.c
+2
View File
@@ -386,8 +386,10 @@ void sam_pioirq(pio_pinset_t pinset)
#if defined(SAM_PIO_ISLR_OFFSET)
uint32_t regval;
#endif
#if defined(SAM_PIO_ISLR_OFFSET) || defined(_PIO_INT_AIM)
uint32_t base = sam_piobase(pinset);
int pin = sam_piopin(pinset);
#endif
#if defined(SAM_PIO_ISLR_OFFSET)
/* Enable writing to PIO registers. The following registers are protected:
arch/arm/src/sama5/sam_sdmmc.c
+3859
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File diff suppressed because it is too large Load Diff
arch/arm/src/sama5/sam_sdmmc.h
+142
View File
@@ -0,0 +1,142 @@
/****************************************************************************
* arch/arm/src/sama5/sam_sdmmc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMA5_SDMMC_H
#define __ARCH_ARM_SRC_SAMA5_SDMMC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include "chip.h"
#include "hardware/sam_sdmmc.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Inline Functions
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: sam_sdmmc_set_sdio_card_isr
*
* Description:
* SDIO card generates interrupt via SDIO_DATA_1 pin.
* Called by board-specific logic to register an ISR for SDIO card.
*
* Input Parameters:
* func - callback function.
* arg - arg to be passed to the function.
*
* Returned Value:
* None
*
****************************************************************************/
void sam_sdmmc_set_sdio_card_isr(FAR struct sdio_dev_s *dev,
int (*func)(void *), void *arg);
/****************************************************************************
* Name: sam_sdmmc_sdio_initialize
*
* Description:
* Initialize SDMMC for operation.
*
* Input Parameters:
* slotno - Not used.
*
* Returned Value:
* A reference to a SDIO interface structure. NULL is returned on
* failures.
*
****************************************************************************/
FAR struct sdio_dev_s *sam_sdmmc_sdio_initialize(int slotno);
/****************************************************************************
* Name: sdio_mediachange
*
* Description:
* Called by board-specific logic -- possibly from an interrupt handler --
* in order to signal to the driver that a card has been inserted or
* removed from the slot
*
* Input Parameters:
* dev - An instance of the SDIO driver device state structure.
* cardinslot - true is a card has been detected in the slot; false if a
* card has been removed from the slot. Only transitions
* (inserted->removed or removed->inserted should be reported)
*
* Returned Value:
* None
*
****************************************************************************/
void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot);
/****************************************************************************
* Name: sdio_wrprotect
*
* Description:
* Called by board-specific logic to report if the card in the slot is
* mechanically write protected.
*
* Input Parameters:
* dev - An instance of the SDIO driver device state structure.
* wrprotect - true is a card is writeprotected.
*
* Returned Value:
* None
*
****************************************************************************/
void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect);
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMA5_SDMMC_H */
arch/arm/src/sama5/sam_tc.h
+2 -1
View File
@@ -85,6 +85,7 @@
/****************************************************************************
* Public Types
****************************************************************************/
/* An opaque handle used to represent a timer channel */
typedef void *TC_HANDLE;
@@ -216,7 +217,7 @@ tc_handler_t sam_tc_attach(TC_HANDLE handle, tc_handler_t handler,
* Name: sam_tc_getpending
*
* Description:
* Return the current contents of the interrutp status register, clearing
* Return the current contents of the interrupt status register, clearing
* all pending interrupts.
*
* Input Parameters:
arch/arm/src/sama5/sama5d2x_pio.c
+31 -15
View File
@@ -14,7 +14,7 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
@@ -110,6 +110,7 @@ const uintptr_t g_spiobase[SAM_NPIO] =
/****************************************************************************
* Private Data
****************************************************************************/
/* Maps a port number to the standard port character */
#if defined(CONFIG_DEBUG_GPIO_INFO) && SAM_NPIO > 0
@@ -131,6 +132,7 @@ static const char g_portchar[SAM_NPIO] =
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: sam_issecure
*
@@ -411,7 +413,9 @@ int sam_configpio(pio_pinset_t cfgset)
irqstate_t flags;
int ret;
/* Get the base address and pin mask associated with this pin configuration */
/* Get the base address and pin mask associated with this pin
* configuration
*/
base = sam_piobase(cfgset);
if (base == 0)
@@ -464,7 +468,10 @@ int sam_configpio(pio_pinset_t cfgset)
{
putreg32(pin, base + SAM_SPIO_SIONR_OFFSET);
}
/* Set the mask register to modify only the specific pin being configured. */
/* Set the mask register to modify only the specific pin being
* configured.
*/
putreg32(pin, base + SAM_PIO_MSKR_OFFSET);
@@ -485,7 +492,9 @@ int sam_configpio(pio_pinset_t cfgset)
break;
case PIO_ANALOG:
/* REVISIT */
ret = OK;
break;
@@ -581,26 +590,28 @@ bool sam_pioread(pio_pinset_t pinset)
return 0;
}
/************************************************************************************
/****************************************************************************
* Name: sam_pio_forceclk
*
* Description:
* Enable PIO clocking. Needed only for SAMA5D3/D4 compatibility. For the SAMA5D2,
* there is a common clock for all PIO ports and that clock is always enabled.
* Enable PIO clocking. Needed only for SAMA5D3/D4 compatibility. For the
* SAMA5D2, there is a common clock for all PIO ports and that clock is
* always enabled.
*
************************************************************************************/
****************************************************************************/
void sam_pio_forceclk(pio_pinset_t pinset, bool enable)
{
}
/************************************************************************************
/****************************************************************************
* Function: sam_dumppio
*
* Description:
* Dump all PIO registers associated with the base address of the provided pinset.
* Dump all PIO registers associated with the base address of the provided
* pinset.
*
************************************************************************************/
****************************************************************************/
#ifdef CONFIG_DEBUG_GPIO_INFO
int sam_dumppio(uint32_t pinset, const char *msg)
@@ -632,17 +643,22 @@ int sam_dumppio(uint32_t pinset, const char *msg)
}
gpioinfo(" MSKR: %08x CFGR: %08x PDSR: %08x LOCKSR: %08x\n",
getreg32(base + SAM_PIO_MSKR_OFFSET), getreg32(base + SAM_PIO_CFGR_OFFSET),
getreg32(base + SAM_PIO_PDSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET));
getreg32(base + SAM_PIO_MSKR_OFFSET),
getreg32(base + SAM_PIO_CFGR_OFFSET),
getreg32(base + SAM_PIO_PDSR_OFFSET),
getreg32(base + SAM_PIO_LOCKSR_OFFSET));
gpioinfo(" ODSR: %08x IMR: %08x ISR: %08x\n",
getreg32(base + SAM_PIO_ODSR_OFFSET), getreg32(base + SAM_PIO_IMR_OFFSET),
getreg32(base + SAM_PIO_ODSR_OFFSET),
getreg32(base + SAM_PIO_IMR_OFFSET),
getreg32(base + SAM_PIO_ISR_OFFSET));
if (secure)
{
gpioinfo(" SCDR: %08x WPMR: %08x WPSR: %08x IOSSR: %08x\n",
getreg32(SAM_SPIO_SCDR), getreg32(SAM_SPIO_WPMR),
getreg32(SAM_SPIO_WPSR), getreg32(base + SAM_SPIO_IOSSR_OFFSET));
getreg32(SAM_SPIO_SCDR),
getreg32(SAM_SPIO_WPMR),
getreg32(SAM_SPIO_WPSR),
getreg32(base + SAM_SPIO_IOSSR_OFFSET));
}
else
{
boards/arm/sama5/sama5d2-xult/Kconfig
+94
View File
@@ -34,4 +34,98 @@ config SAMA5D2XULT_USBHOST_PRIO
default 100
depends on USBHOST
config SAMA5_SDMMC
bool "enable SDMMC controller"
default y if SAMA5_HAVE_SDMMC
select SDIO_DMA
select SCHED_WORKQUEUE
select SCHED_HPWORK
select MMCSD
select MMCSD_SDIO
select SDIO_BLOCKSETUP
select ARCH_HAVE_SDIO
select SAMA5_SDMMC_DMA
---help---
Enable SD Card interface SDMMC0. Selects SAMA5_SDMMC SAMA5_SDMMC0 SAMA5_SDMMC_DMA SDIO_DMA SCHED_WORKQUEUE SCHED_HPWORK SDIO_BLOCKSETUP
config SAMA5_SDMMC0
bool "Enable SDMMC0 (built-in eMMC)"
default n if SAMA5_SDMMC
depends on SAMA5_SDMMC
config SAMA5_SDMMC0_SIZE
int "SDMMC0 size in bytes"
default 4294967296
depends on SAMA5_SDMMC0
---help---
Size of eMMC flash in bytes. Default: 4GB
config SAMA5D27_SDMMC0_MOUNT
bool "Mount SDMMC0 at startup"
default n
depends on SAMA5_SDMMC0
config SAMA5D27_SDMMC0_MOUNT_BLKDEV
string "SDMMC0 block device name"
default mmc0
depends on SAMA5_SDMMC0
config SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT
string "SDMMC0 mountpoint"
default "/mnt/sdmmc0"
depends on SAMA5_SDMMC0
config SAMA5D27_SDMMC0_MOUNT_FSTYPE
string "SDMMC0 file system type"
default "vfat"
depends on SAMA5_SDMMC0
config CONFIG_SAMA5_SDMMC1_WIDTH_D1_D8
bool "SDMMC0 data bus width 8 bits"
default y
depends on SAMA5_SDMMC0
config SAMA5_SDMMC1
bool "Enable SDMMC1"
default y if SAMA5_SDMMC
select SAMA5_SDMMC1_WIDTH_D1_D4
depends on SAMA5_SDMMC
config SAMA5_SDMMC1_SIZE
int "SDMMC1 size in bytes"
default 1073741824
depends on SAMA5_SDMMC1
---help---
Size of SD Card in bytes. Default: 16GB
config SAMA5D27_SDMMC1_MOUNT
bool "Mount SDMMC1 at startup"
default n
depends on SAMA5_SDMMC1
config SAMA5D27_SDMMC1_MOUNT_BLKDEV
string "SDMMC1 block device name"
default mmc1
depends on SAMA5_SDMMC1
config SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT
string "SDMMC1 mountpoint"
default "/mnt/sdmmc1"
depends on SAMA5_SDMMC1
config SAMA5D27_SDMMC1_MOUNT_FSTYPE
string "SDMMC1 file system type"
default "vfat"
depends on SAMA5_SDMMC1
config MMCSD_HAVE_CARDDETECT
bool "SDMMC1 card detect"
default y
depends on SAMA5_SDMMC1
config SAMA5_SDMMC1_WIDTH_D1_D4
bool "SDMMC1 data bus width 4 bits"
default y
depends on SAMA5_SDMMC1
endif # ARCH_BOARD_SAMA5D2_XULT
boards/arm/sama5/sama5d2-xult/README.txt
+11 -2
View File
@@ -780,8 +780,10 @@ Configurations
netnsh:
This is a network enabled configuration based on the NuttShell (NSH)
REVISIT: More to be provided.
This is a network enabled configuration based on the NuttShell (NSH).
The CDC-ECM driver is enabled, so you can plug a USB cable into the
USB-Micro port (USB-A) and the board will appear as an CDC-ECM
ethernet adapter.
nsh:
@@ -952,3 +954,10 @@ Configurations
NOTE: If you want the RTC to preserve time over power cycles, you
will need to install a battery in the battery holder (J12) and close
the jumper, JP13.
sdmmcnsh:
This is a configuration based on the NuttShell (NSH). The SDMMC
peripheral is enabled, and can read and write to a VFAT filesystem
on the SD Card.
boards/arm/sama5/sama5d2-xult/configs/sdmmcnsh/defconfig
+147
View File
@@ -0,0 +1,147 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_AUDIO_FORMAT_MP3 is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_SAMA5_UART0 is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="sama5d2-xult"
CONFIG_ARCH_BOARD_SAMA5D2_XULT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="sama5"
CONFIG_ARCH_CHIP_ATSAMA5D27=y
CONFIG_ARCH_CHIP_SAMA5=y
CONFIG_ARCH_CHIP_SAMA5D2=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_AUDIO=y
CONFIG_AUDIO_NUM_BUFFERS=8
CONFIG_BOARDCTL_ROMDISK=y
CONFIG_BOARD_LOOPSPERMSEC=65775
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
CONFIG_CONSOLE_SYSLOG=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_LOOP=y
CONFIG_DEV_ZERO=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXAMPLES_TCPBLASTER=y
CONFIG_EXAMPLES_TCPECHO=y
CONFIG_EXAMPLES_WGET=y
CONFIG_EXAMPLES_WGET_URL="http://10.0.0.1/"
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_AUTOMOUNTER=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_EXCLUDE_VERSION=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HIDKBD_POLLUSEC=80000
CONFIG_I2S=y
CONFIG_INTELHEX_BINARY=y
CONFIG_IOB_NBUFFERS=72
CONFIG_IOB_THROTTLE=16
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_NETDB_BUFSIZE=128
CONFIG_NETINIT_NETLOCAL=y
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_TELNETC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_IPIN=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_CDCECM=y
CONFIG_NET_ETH_PKTSIZE=1514
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ROUTE=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_NOTIFIER=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_PROMPT_STRING="nsh> "
CONFIG_NSH_QUOTE=y
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_PREALLOC_TIMERS=4
CONFIG_PREALLOC_WDOGS=16
CONFIG_RAM_SIZE=268435456
CONFIG_RAM_START=0x20000000
CONFIG_RAM_VSTART=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_CMD_HISTORY_LEN=100
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
CONFIG_READLINE_TABCOMPLETION=y
CONFIG_RR_INTERVAL=200
CONFIG_SAMA5D27_SDMMC0_MOUNT_BLKDEV="/dev/mmcsd0"
CONFIG_SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT="/mnt/mmcsd0"
CONFIG_SAMA5D27_SDMMC1_MOUNT=y
CONFIG_SAMA5D27_SDMMC1_MOUNT_BLKDEV="/dev/mmcsd1"
CONFIG_SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT="/mnt/mmcsd1"
CONFIG_SAMA5D2XULT_528MHZ=y
CONFIG_SAMA5D2XULT_USBHOST_STACKSIZE=2048
CONFIG_SAMA5_BOOT_SDRAM=y
CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
CONFIG_SAMA5_DDRCS_RESERVE=y
CONFIG_SAMA5_EHCI=y
CONFIG_SAMA5_HSMC=y
CONFIG_SAMA5_OHCI=y
CONFIG_SAMA5_PIOA_IRQ=y
CONFIG_SAMA5_PIOB_IRQ=y
CONFIG_SAMA5_PIOC_IRQ=y
CONFIG_SAMA5_PIO_IRQ=y
CONFIG_SAMA5_RTC=y
CONFIG_SAMA5_SDMMC0=y
CONFIG_SAMA5_SDMMC0_SIZE=1073741824
CONFIG_SAMA5_SDMMC=y
CONFIG_SAMA5_TRNG=y
CONFIG_SAMA5_UART1=y
CONFIG_SAMA5_UDPHS=y
CONFIG_SAMA5_UHPHS=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_LPNTHREADS=2
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_SIG_DEFAULT=y
CONFIG_SIG_EVTHREAD=y
CONFIG_START_DAY=31
CONFIG_START_MONTH=7
CONFIG_START_YEAR=2014
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSLOG_TIMESTAMP=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING=y
CONFIG_SYSTEM_VI=y
CONFIG_TTY_SIGINT=y
CONFIG_TTY_SIGSTP=y
CONFIG_UART1_SERIAL_CONSOLE=y
CONFIG_USBDEV=y
CONFIG_USBDEV_DMA=y
CONFIG_USBDEV_DUALSPEED=y
CONFIG_USBDEV_TRACE=y
CONFIG_USBDEV_TRACE_NRECORDS=512
CONFIG_USBHOST_HIDKBD=y
CONFIG_USBHOST_MSC=y
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WDOG_INTRESERVE=2
boards/arm/sama5/sama5d2-xult/include/board.h
+20 -2
View File
@@ -65,8 +65,8 @@
#if defined(CONFIG_SAMA5_BOOT_SDRAM)
/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate
* bootloader.
* That bootloader had to have already configured the PLL and SDRAM for proper
* operation.
* That bootloader had to have already configured the PLL and SDRAM for
* proper operation.
*
* In this case, we don not reconfigure the clocking.
* Rather, we need to query the register settings to determine the clock
@@ -317,6 +317,24 @@
* ---- ------- ---- --------
*/
/* SDIO - Used for both Port 0 & 1 ******************************************/
/* 386 KHz for initial inquiry stuff */
#define BOARD_SDMMC_IDMODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV256
#define BOARD_SDMMC_IDMODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(2)
/* 24.8MHz for other modes */
#define BOARD_SDMMC_MMCMODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV8
#define BOARD_SDMMC_MMCMODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(1)
#define BOARD_SDMMC_SD1MODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV8
#define BOARD_SDMMC_SD1MODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(1)
#define BOARD_SDMMC_SD4MODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV8
#define BOARD_SDMMC_SD4MODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(1)
/****************************************************************************
* Assembly Language Macros
****************************************************************************/
boards/arm/sama5/sama5d2-xult/src/Makefile
+8
View File
@@ -59,6 +59,14 @@ CSRCS += sam_at25.c
endif
endif
ifeq ($(CONFIG_SAMA5_SDMMC0),y)
CSRCS += sam_sdmmc.c
else
ifeq ($(CONFIG_SAMA5_SDMMC1),y)
CSRCS += sam_sdmmc.c
endif
endif
ifeq ($(CONFIG_SAMA5_HSMCI0),y)
CSRCS += sam_hsmci.c
else
boards/arm/sama5/sama5d2-xult/src/sam_appinit.c
+3
View File
@@ -23,6 +23,8 @@
****************************************************************************/
#include <nuttx/config.h>
#include <syslog.h>
#include <debug.h>
#include <nuttx/board.h>
@@ -68,6 +70,7 @@ int board_app_initialize(uintptr_t arg)
#ifndef CONFIG_BOARD_LATE_INITIALIZE
/* Perform board initialization */
mcinfo("Entry\n");
return sam_bringup();
#else
return OK;
boards/arm/sama5/sama5d2-xult/src/sam_bringup.c
+113 -2
View File
@@ -25,8 +25,10 @@
#include <nuttx/config.h>
#include <sys/mount.h>
#include <stdlib.h>
#include <syslog.h>
#include <debug.h>
#include <string.h>
#include <nuttx/irq.h>
#include <nuttx/kthread.h>
@@ -34,6 +36,8 @@
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbdev_trace.h>
#include "sama5d2-xult.h"
#ifdef CONFIG_CDCACM
# include <nuttx/usb/cdcacm.h>
#endif
@@ -51,7 +55,10 @@
# include <nuttx/usb/rndis.h>
#endif
#include "sama5d2-xult.h"
#ifdef CONFIG_MMCSD
# include <nuttx/mmcsd.h>
# include "sam_sdmmc.h"
#endif
/****************************************************************************
* Pre-processor Definitions
@@ -124,6 +131,102 @@ static void sam_i2ctool(void)
# define sam_i2ctool()
#endif
/****************************************************************************
* Name: nsh_sdmmc_initialize
*
* Description:
* Initialize SDMMC drivers
*
****************************************************************************/
#ifdef CONFIG_SAMA5_SDMMC
static int nsh_sdmmc_initialize(void)
{
struct sdio_dev_s *sdmmc0;
struct sdio_dev_s *sdmmc1;
int ret = 0;
/* Get an instance of the SDIO interface */
#ifdef CONFIG_SAMA5_SDMMC0
sdmmc0 = sam_sdmmc_sdio_initialize(SDMMC0_SLOTNO);
if (!sdmmc0)
{
syslog(LOG_ERR, "ERROR: Failed to initialize SD/MMC\n");
}
else
{
/* Bind the SDIO interface to the MMC/SD driver */
ret = mmcsd_slotinitialize(SDMMC0_MINOR, sdmmc0);
if (ret != OK)
{
syslog(LOG_ERR,
"ERROR: Failed to bind SDIO to the MMC/SD driver (slot 0): "
"%d\n",
ret);
}
}
#ifdef CONFIG_SAMA5D27_SDMMC0_MOUNT
/* Mount the volume on SDMMC0 */
ret = mount(CONFIG_SAMA5D27_SDMMC0_MOUNT_BLKDEV,
CONFIG_SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT,
CONFIG_SAMA5D27_SDMMC0_MOUNT_FSTYPE,
0, NULL);
if (ret < 0)
{
_err("ERROR: Failed to mount %s: %d\n",
CONFIG_SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT, errno);
}
#endif
#endif
#ifdef CONFIG_SAMA5_SDMMC1
sdmmc1 = sam_sdmmc_sdio_initialize(SDMMC1_SLOTNO);
if (!sdmmc1)
{
syslog(LOG_ERR, "ERROR: Failed to initialize SD/MMC\n");
}
else
{
/* Bind the SDIO interface to the MMC/SD driver */
ret = mmcsd_slotinitialize(SDMMC1_MINOR, sdmmc1);
if (ret != OK)
{
syslog(LOG_ERR,
"ERROR: Failed to bind SDIO to the MMC/SD driver (slot 0): "
"%d\n",
ret);
}
}
#ifdef CONFIG_SAMA5D27_SDMMC1_MOUNT
/* Mount the volume on SDMMC1 */
ret = mount(CONFIG_SAMA5D27_SDMMC1_MOUNT_BLKDEV,
CONFIG_SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT,
CONFIG_SAMA5D27_SDMMC1_MOUNT_FSTYPE,
0, NULL);
if (ret < 0)
{
_err("ERROR: Failed to mount %s: %d\n",
CONFIG_SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT, errno);
}
#endif
#endif
return OK;
}
#else
# define nsh_sdmmc_initialize() (OK)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -144,6 +247,14 @@ int sam_bringup(void)
sam_i2ctool();
#ifdef HAVE_SDMMC
#ifdef CONFIG_SAMA5_SDMMC
/* Initialize SDMCC-based MMC/SD card support */
nsh_sdmmc_initialize();
#endif
#endif
#ifdef HAVE_HSMCI
#ifdef CONFIG_SAMA5_HSMCI0
/* Initialize the HSMCI0 driver */
@@ -191,7 +302,7 @@ int sam_bringup(void)
#ifdef CONFIG_SAMA5D4EK_HSMCI1_MOUNT
else
{
/* REVISIT: A delay seems to be required here or the mount will fail. */
/* REVISIT: A delay seems required here or the mount will fail. */
/* Mount the volume on HSMCI1 */
boards/arm/sama5/sama5d2-xult/src/sam_hsmci.c → boards/arm/sama5/sama5d2-xult/src/sam_sdmmc.c
+93 -86
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/sama5/sama5d2-xult/src/sam_hsmci.c
* boards/arm/sama5/sama5d2-xult/src/sam_sdmmc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,38 +18,37 @@
*
****************************************************************************/
/* The SAMA5D3-Xplained provides a two SD memory card slots:
* (1) a full size SD card slot (J10), and
* (2) a microSD memory card slot (J11).
/* The SAMA5D2-XULT provides a built-in 4GB eMMC (SDMMC0), and one SD
* full-size memory card slot at J19 (SDMMC1).
*
* The full size SD card slot connects via HSMCI0. The card detect discrete
* is available on PB17 (pulled high). The write protect descrete is tied to
* ground (via PP6) and not available to software. The slot supports 8-bit
* wide transfer mode, but the NuttX driver currently uses only the 4-bit
* wide transfer mode
* SDMMC0: There is a Micron 4Gx8 eMMC managed NAND Flash (MTFC4GLDEA-0M WT)
* connected to SDMMC0.
*
* PD17 MCI0_CD
* PD1 MCI0_DA0
* PD2 MCI0_DA1
* PD3 MCI0_DA2
* PD4 MCI0_DA3
* PD5 MCI0_DA4
* PD6 MCI0_DA5
* PD7 MCI0_DA6
* PD8 MCI0_DA7
* PD9 MCI0_CK
* PD0 MCI0_CDA
* PA1 SDMMC0_CMD
* PA2 SDMMC0_DAT0
* PA3 SDMMC0_DAT1
* PA4 SDMMC0_DAT2
* PA5 SDMMC0_DAT3
* PA6 SDMMC0_DAT4
* PA7 SDMMC0_DAT5
* PA8 SDMMC0_DAT6
* PA9 SDMMC0_DAT7
* PA0 SDMMC0_CK
* PA10 SDMMC0_RSTN
*
* The microSD connects vi HSMCI1. The card detect discrete is available on
* PB18 (pulled high):
* SDMMC1: The full size SD card slot connects via SDMMC1. The card detect
* discrete is available on PA30 (pulled high). The write protect discrete
* is tied to ground and not available to software. The slot only supports
* 4-bit wide transfer mode.
*
* PA30 SDMMC1_CD
* PA18 SDMMC1_DAT0
* PA19 SDMMC1_DAT1
* PA20 SDMMC1_DAT2
* PA21 SDMMC1_DAT3
* PD22 SDMMC1_CK
* PA28 SDMMC1_CDA
*
* PD18 MCI1_CD
* PB20 MCI1_DA0
* PB21 MCI1_DA1
* PB22 MCI1_DA2
* PB23 MCI1_DA3
* PB24 MCI1_CK
* PB19 MCI1_CDA
*/
/****************************************************************************
@@ -66,22 +65,26 @@
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include "chip.h"
#include "arm_internal.h"
#include "arm_arch.h"
#include "sam_pio.h"
#include "sam_hsmci.h"
#include "sam_sdmmc.h"
#include "sama5d3-xplained.h"
#include "sama5d2-xult.h"
#ifdef HAVE_HSMCI
#ifdef HAVE_SDMMC
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure holds static information unique to one HSMCI peripheral */
/* This structure holds static information unique to one SDMMC peripheral */
struct sam_hsmci_state_s
struct sam_sdmmc_state_s
{
struct sdio_dev_s *hsmci; /* R/W device handle */
struct sdio_dev_s *sdmmc; /* R/W device handle */
pio_pinset_t pincfg; /* Card detect PIO pin configuration */
uint8_t irq; /* Interrupt number (same as pid) */
uint8_t slotno; /* Slot number */
@@ -93,29 +96,29 @@ struct sam_hsmci_state_s
* Private Data
****************************************************************************/
/* HSCMI device state */
/* SDMMC device state */
#ifdef CONFIG_SAMA5_HSMCI0
static int sam_hsmci0_cardetect(int irq, void *regs, FAR void *arg);
#ifdef CONFIG_SAMA5_SDMMC0
static int sam_sdmmc0_cardetect(int irq, void *regs, FAR void *arg);
static struct sam_hsmci_state_s g_hsmci0 =
static struct sam_sdmmc_state_s g_sdmmc0 =
{
.pincfg = PIO_MCI0_CD,
.irq = IRQ_MCI0_CD,
.pincfg = PIO_SDMMC0_CD,
.irq = -1,
.slotno = 0,
.handler = sam_hsmci0_cardetect,
.handler = sam_sdmmc0_cardetect,
};
#endif
#ifdef CONFIG_SAMA5_HSMCI1
static int sam_hsmci1_cardetect(int irq, void *regs, FAR void *arg);
#ifdef CONFIG_SAMA5_SDMMC1
static int sam_sdmmc1_cardetect(int irq, void *regs, FAR void *arg);
static struct sam_hsmci_state_s g_hsmci1 =
static struct sam_sdmmc_state_s g_sdmmc1 =
{
.pincfg = PIO_MCI1_CD,
.irq = IRQ_MCI1_CD,
.pincfg = PIO_SDMMC1_CD,
.irq = IRQ_SDMMC1_CD,
.slotno = 1,
.handler = sam_hsmci1_cardetect,
.handler = sam_sdmmc1_cardetect,
};
#endif
@@ -127,11 +130,11 @@ static struct sam_hsmci_state_s g_hsmci1 =
* Name: sam_cardinserted_internal
*
* Description:
* Check if a card is inserted into the selected HSMCI slot
* Check if a card is inserted into the selected SDMMC slot
*
****************************************************************************/
bool sam_cardinserted_internal(struct sam_hsmci_state_s *state)
bool sam_cardinserted_internal(struct sam_sdmmc_state_s *state)
{
bool inserted;
@@ -143,14 +146,14 @@ bool sam_cardinserted_internal(struct sam_hsmci_state_s *state)
}
/****************************************************************************
* Name: sam_hsmci_cardetect, sam_hsmci0_cardetect, and sam_hsmci1_cardetect
* Name: sam_sdmmc_cardetect, sam_sdmmc0_cardetect, and sam_sdmmc1_cardetect
*
* Description:
* Card detect interrupt handlers
*
****************************************************************************/
static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state)
static int sam_sdmmc_cardetect(struct sam_sdmmc_state_s *state)
{
/* Get the current card insertion state */
@@ -160,59 +163,59 @@ static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state)
if (cd != state->cd)
{
/* Yes... remember that new state and inform the HSMCI driver */
/* Yes... remember that new state and inform the SDMMC driver */
state->cd = cd;
/* Report the new state to the SDIO driver */
sdio_mediachange(state->hsmci, cd);
sdio_mediachange(state->sdmmc, cd);
}
return OK;
}
#ifdef CONFIG_SAMA5_HSMCI0
static int sam_hsmci0_cardetect(int irq, void *regs, FAR void *arg)
#ifdef CONFIG_SAMA5_SDMMC0
static int sam_sdmmc0_cardetect(int irq, void *regs, FAR void *arg)
{
return sam_hsmci_cardetect(&g_hsmci0);
return sam_sdmmc_cardetect(&g_sdmmc0);
}
#endif
#ifdef CONFIG_SAMA5_HSMCI1
static int sam_hsmci1_cardetect(int irq, void *regs, FAR void *arg)
#ifdef CONFIG_SAMA5_SDMMC1
static int sam_sdmmc1_cardetect(int irq, void *regs, FAR void *arg)
{
return sam_hsmci_cardetect(&g_hsmci1);
return sam_sdmmc_cardetect(&g_sdmmc1);
}
#endif
/****************************************************************************
* Name: sam_hsmci_state
* Name: sam_sdmmc_state
*
* Description:
* Initialize HSMCI PIOs.
* Initialize SDMMC PIOs.
*
****************************************************************************/
static struct sam_hsmci_state_s *sam_hsmci_state(int slotno)
static struct sam_sdmmc_state_s *sam_sdmmc_state(int slotno)
{
struct sam_hsmci_state_s *state = NULL;
struct sam_sdmmc_state_s *state = NULL;
#ifdef CONFIG_SAMA5_HSMCI0
#ifdef CONFIG_SAMA5_HSMCI1
#ifdef CONFIG_SAMA5_SDMMC0
#ifdef CONFIG_SAMA5_SDMMC1
if (slotno == 0)
#endif
{
state = &g_hsmci0;
state = &g_sdmmc0;
}
#ifdef CONFIG_SAMA5_HSMCI1
#ifdef CONFIG_SAMA5_SDMMC1
else
#endif
#endif
#ifdef CONFIG_SAMA5_HSMCI1
#ifdef CONFIG_SAMA5_SDMMC1
{
state = &g_hsmci1;
state = &g_sdmmc1;
}
#endif
@@ -224,21 +227,24 @@ static struct sam_hsmci_state_s *sam_hsmci_state(int slotno)
****************************************************************************/
/****************************************************************************
* Name: sam_hsmci_initialize
* Name: sam_sdmmc_initialize
*
* Description:
* Perform architecture specific initialization
*
****************************************************************************/
int sam_hsmci_initialize(int slotno, int minor)
int sam_sdmmc_initialize(int slotno, int minor)
{
struct sam_hsmci_state_s *state;
struct sam_sdmmc_state_s *state;
int ret;
/* Get the static HSMI description */
mcinfo("Entry.\n");
mcinfo("slotno: %d\n", slotno);
state = sam_hsmci_state(slotno);
/* Get the static SDMMC description */
state = sam_sdmmc_state(slotno);
if (!state)
{
ferr("ERROR: No state for slotno %d\n", slotno);
@@ -253,8 +259,8 @@ int sam_hsmci_initialize(int slotno, int minor)
/* First, get an instance of the SDIO interface */
state->hsmci = sdio_initialize(slotno);
if (!state->hsmci)
state->sdmmc = sam_sdmmc_sdio_initialize(slotno);
if (!state->sdmmc)
{
ferr("ERROR: Failed to initialize SDIO slot %d\n", slotno);
return -ENODEV;
@@ -262,7 +268,7 @@ int sam_hsmci_initialize(int slotno, int minor)
/* Now bind the SDIO interface to the MMC/SD driver */
ret = mmcsd_slotinitialize(minor, state->hsmci);
ret = mmcsd_slotinitialize(minor, state->sdmmc);
if (ret != OK)
{
ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
@@ -274,10 +280,10 @@ int sam_hsmci_initialize(int slotno, int minor)
sam_pioirq(state->pincfg);
irq_attach(state->irq, state->handler, NULL);
/* Then inform the HSMCI driver if there is or is not a card in the slot. */
/* Then inform the SDMMC driver if there is or is not a card in the slot. */
state->cd = sam_cardinserted_internal(state);
sdio_mediachange(state->hsmci, state->cd);
sdio_mediachange(state->sdmmc, state->cd);
/* Enable card detect interrupts */
@@ -289,17 +295,17 @@ int sam_hsmci_initialize(int slotno, int minor)
* Name: sam_cardinserted
*
* Description:
* Check if a card is inserted into the selected HSMCI slot
* Check if a card is inserted into the selected SDMMC slot
*
****************************************************************************/
bool sam_cardinserted(int slotno)
{
struct sam_hsmci_state_s *state;
struct sam_sdmmc_state_s *state;
/* Get the HSMI description */
/* Get the SDMMC description */
state = sam_hsmci_state(slotno);
state = sam_sdmmc_state(slotno);
if (!state)
{
ferr("ERROR: No state for slotno %d\n", slotno);
@@ -315,7 +321,7 @@ bool sam_cardinserted(int slotno)
* Name: sam_writeprotected
*
* Description:
* Check if a card is inserted into the selected HSMCI slot
* Check if a card is inserted into the selected SDMMC slot
*
****************************************************************************/
@@ -326,4 +332,5 @@ bool sam_writeprotected(int slotno)
return false;
}
#endif /* HAVE_HSMCI */
#endif /* HAVE_SDMMC */
boards/arm/sama5/sama5d2-xult/src/sama5d2-xult.h
+118 -55
View File
@@ -42,7 +42,7 @@
/* Configuration ************************************************************/
#define HAVE_HSMCI 1
#define HAVE_SDMMC 1
#define HAVE_AT25 1
#define HAVE_NAND 1
#define HAVE_USBHOST 1
@@ -50,26 +50,26 @@
#define HAVE_USBMONITOR 1
#define HAVE_NETWORK 1
/* HSMCI */
/* SDMMC */
/* Can't support MMC/SD if the card interface(s) are not enable */
#if !defined(CONFIG_SAMA5_HSMCI0) && !defined(CONFIG_SAMA5_HSMCI1)
# undef HAVE_HSMCI
#if !defined(CONFIG_SAMA5_SDMMC) && !defined(CONFIG_SAMA5_SDMMC0)
# undef HAVE_SDMMC
#endif
/* Can't support MMC/SD features if mountpoints are disabled */
#if defined(HAVE_HSMCI) && defined(CONFIG_DISABLE_MOUNTPOINT)
#if defined(HAVE_SDMMC) && defined(CONFIG_DISABLE_MOUNTPOINT)
# warning Mountpoints disabled. No MMC/SD support
# undef HAVE_HSMCI
# undef HAVE_SDMCC
#endif
/* We need PIO interrupts on PIOD to support card detect interrupts */
#if defined(HAVE_HSMCI) && !defined(CONFIG_SAMA5_PIOD_IRQ)
# warning PIOD interrupts not enabled. No MMC/SD support.
# undef HAVE_HSMCI
#if defined(HAVE_SDMMC) && !defined(CONFIG_SAMA5_PIOA_IRQ)
# warning PIOA interrupts not enabled. No MMC/SD support.
# undef HAVE_SDMMC
#endif
/* NAND FLASH */
@@ -95,27 +95,27 @@
#endif
/* If we are going to mount the NAND, then they user must also have told
* us what to do with it by setting one of CONFIG_SAMA5D3XPLAINED_NAND_FTL or
* CONFIG_SAMA5D3XPLAINED_NAND_NXFFS.
* us what to do with it by setting one of CONFIG_SAMA5D2XULT_NAND_FTL or
* CONFIG_SAMA5D2XULT_NAND_NXFFS.
*/
#ifndef CONFIG_MTD
# undef CONFIG_SAMA5D3XPLAINED_NAND_NXFFS
# undef CONFIG_SAMA5D3XPLAINED_NAND_FTL
# undef CONFIG_SAMA5D2XULT_NAND_NXFFS
# undef CONFIG_SAMA5D2XULT_NAND_FTL
#endif
#if !defined(CONFIG_FS_NXFFS) || !defined(CONFIG_NXFFS_NAND)
# undef CONFIG_SAMA5D3XPLAINED_NAND_NXFFS
# undef CONFIG_SAMA5D2XULT_NAND_NXFFS
#endif
#if !defined(CONFIG_SAMA5D3XPLAINED_NAND_FTL) && !defined(CONFIG_SAMA5D3XPLAINED_NAND_NXFFS)
#if !defined(CONFIG_SAMA5D2XULT_NAND_FTL) && !defined(CONFIG_SAMA5D2XULT_NAND_NXFFS)
# undef HAVE_NAND
#endif
#if defined(CONFIG_SAMA5D3XPLAINED_NAND_FTL) && defined(CONFIG_SAMA5D3XPLAINED_NAND_NXFFS)
# warning Both CONFIG_SAMA5D3XPLAINED_NAND_FTL and CONFIG_SAMA5D3XPLAINED_NAND_NXFFS are set
# warning Ignoring CONFIG_SAMA5D3XPLAINED_NAND_NXFFS
# undef CONFIG_SAMA5D3XPLAINED_NAND_NXFFS
#if defined(CONFIG_SAMA5D2XULT_NAND_FTL) && defined(CONFIG_SAMA5D2XULT_NAND_NXFFS)
# warning Both CONFIG_SAMA5D2XULT_NAND_FTL and CONFIG_SAMA5D2XULT_NAND_NXFFS are set
# warning Ignoring CONFIG_SAMA5D2XULT_NAND_NXFFS
# undef CONFIG_SAMA5DXULT_NAND_NXFFS
#endif
/* AT25 Serial FLASH */
@@ -142,14 +142,14 @@
# undef CONFIG_SAMA5D3XPLAINED_AT25_NXFFS
#endif
#if !defined(CONFIG_SAMA5D3XPLAINED_AT25_FTL) && !defined(CONFIG_SAMA5D3XPLAINED_AT25_NXFFS)
#if !defined(CONFIG_SAMA5D2XULT_AT25_FTL) && !defined(CONFIG_SAMA5D2XULT_AT25_NXFFS)
# undef HAVE_AT25
#endif
#if defined(CONFIG_SAMA5D3XPLAINED_AT25_FTL) && defined(CONFIG_SAMA5D3XPLAINED_AT25_NXFFS)
# warning Both CONFIG_SAMA5D3XPLAINED_AT25_FTL and CONFIG_SAMA5D3XPLAINED_AT25_NXFFS are set
# warning Ignoring CONFIG_SAMA5D3XPLAINED_AT25_NXFFS
# undef CONFIG_SAMA5D3XPLAINED_AT25_NXFFS
#if defined(CONFIG_SAMA5D2XULT_AT25_FTL) && defined(CONFIG_SAMA5D2XULT_AT25_NXFFS)
# warning Both CONFIG_SAMA5D2XULT_AT25_FTL and CONFIG_SAMA5D2XULT_AT25_NXFFS are set
# warning Ignoring CONFIG_SAMA5D2XULT_AT25_NXFFS
# undef CONFIG_SAMA5D2XULT_AT25_NXFFS
#endif
/* Assign minor device numbers. For example, if we also use MINOR number 0
@@ -178,16 +178,25 @@
# define CONFIG_NSH_MMCSDMINOR 0
#endif
#ifdef HAVE_HSMCI
#ifdef HAVE_SDMMC
# define HSMCI0_SLOTNO 0
# define HSMCI1_SLOTNO 1
# ifdef CONFIG_SAMA5_HSMCI0
# define HSMCI0_MINOR CONFIG_NSH_MMCSDMINOR
# define HSMCI1_MINOR (CONFIG_NSH_MMCSDMINOR+1)
# if ( defined(CONFIG_SAMA5_SDMMC0) && defined(CONFIG_SAMA5_SDMMC1) )
# define SDMMC0_SLOTNO 0
# define SDMMC1_SLOTNO 1
# else
# define HSMCI1_MINOR CONFIG_NSH_MMCSDMINOR
# if ( defined(CONFIG_SAMA5_SDMMC0) )
# define SDMMC0_SLOTNO 0
# endif
# if ( defined(CONFIG_SAMA5_SDMMC1) )
# define SDMMC1_SLOTNO 0
# endif
# endif
# ifdef CONFIG_SAMA5_SDMMC0
# define SDMMC0_MINOR CONFIG_NSH_MMCSDMINOR
# define SDMMC1_MINOR (CONFIG_NSH_MMCSDMINOR+1)
# else
# define SDMMC1_MINOR CONFIG_NSH_MMCSDMINOR
# endif
#else
#endif
@@ -300,33 +309,51 @@
PIO_INT_BOTHEDGES | PIO_PORT_PIOB | PIO_PIN6)
#define IRQ_BTN_USER SAM_IRQ_PB6
/* HSMCI Card Slots *********************************************************/
/* The SAMA5D2-XULT provides a SD memory card slots:
* a full size SD card slot (J19)
/* SDMMC clocking
*
* The full size SD card slot connects via HSMCI0. The card detect discrete
* is available on PD17 (pulled high). The write protect discrete is tied to
* ground (via PP6) and not available to software. The slot supports 8-bit
* wide transfer mode, but the NuttX driver currently uses only the 4-bit
* wide transfer mode
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
* divided by (2*(CLKDIV+1)).
*
* PD17 MCI0_CD
* PD1 MCI0_DA0
* PD2 MCI0_DA1
* PD3 MCI0_DA2
* PD4 MCI0_DA3
* PD5 MCI0_DA4
* PD6 MCI0_DA5
* PD7 MCI0_DA6
* PD8 MCI0_DA7
* PD9 MCI0_CK
* PD0 MCI0_CDA
* MCI_SPEED = MCK / (2*(CLKDIV+1))
* CLKDIV = MCI / MCI_SPEED / 2 - 1
*
* Where CLKDIV has a range of 0-255.
*/
#define PIO_MCI0_CD (PIO_INPUT | PIO_CFG_DEFAULT | PIO_CFG_DEGLITCH | \
PIO_INT_BOTHEDGES | PIO_PORT_PIOA | PIO_PIN11)
#define IRQ_MCI0_CD SAM_IRQ_PA11
/* MCK = 96MHz, CLKDIV = 119, MCI_SPEED = 96MHz / 2 * (119+1) = 400 KHz */
#define SDMMC_INIT_CLKDIV (119 << SDMMC_MR_CLKDIV_SHIFT)
/* MCK = 96MHz, CLKDIV = 3, MCI_SPEED = 96MHz / 2 * (3+1) = 12 MHz */
#define SDMMC_MMCXFR_CLKDIV (3 << SDMMC_MR_CLKDIV_SHIFT)
/* MCK = 96MHz, CLKDIV = 1, MCI_SPEED = 96MHz / 2 * (1+1) = 24 MHz */
#define SDMMC_SDXFR_CLKDIV (1 << SDMMC_MR_CLKDIV_SHIFT)
#define SDMMC_SDWIDEXFR_CLKDIV SDMMC_SDXFR_CLKDIV
/* SDMMC Card Slots *********************************************************/
/* The SAMA5D2-XULT provides a SD memory card slot:
* a full size SD card slot (J19)
*
* The full size SD card slot connects via SDMMC1. The card detect discrete
* is available on PA30 (pulled high). The write protect discrete is tied to
* ground and not available to software. The slot only supports 4-bit
* wide transfer mode, and the NuttX driver currently uses only the 4-bit
* wide transfer mode.
*
* PA30 SDMMC1_CD
* PA18 SDMMC1_DAT0
* PA19 SDMMC1_DAT1
* PA20 SDMMC1_DAT2
* PA21 SDMMC1_DAT3
* PA22 SDMMC1_CK
* PA28 SDMMC1_CDA
*/
#define IRQ_SDMMC1_CD SAM_IRQ_PA30
/* USB Ports ****************************************************************/
@@ -414,6 +441,42 @@
int sam_bringup(void);
/****************************************************************************
* Name: sam_sdmmc_initialize
*
* Description:
* Initialize and configure one SDMMC slot
*
****************************************************************************/
#ifdef HAVE_SDMMC
int sam_sdmmc_initialize(int slotno, int minor);
#endif
/****************************************************************************
* Name: sam_cardinserted
*
* Description:
* Check if a card is inserted into the selected SDMMC slot
*
****************************************************************************/
#ifdef HAVE_SDMMC
bool sam_cardinserted(int slotno);
#endif
/****************************************************************************
* Name: sam_writeprotected
*
* Description:
* Check if the card in the MMCSD slot is write protected
*
****************************************************************************/
#ifdef HAVE_HSMCI
bool sam_writeprotected(int slotno);
#endif
/****************************************************************************
* Name: sam_usbinitialize
*
boards/arm/sama5/sama5d3x-ek/src/sama5d3x-ek.h
+8 -8
View File
@@ -171,8 +171,8 @@
/* AT24 Serial EEPROM
*
* A AT24C512 Serial EEPPROM was used for tested I2C. There are other I2C/TWI
* devices on-board, but the serial EEPROM is the simplest test.
* A AT24C512 Serial EEPPROM was used for tested I2C. There are other
* I2C/TWI devices on-board, but the serial EEPROM is the simplest test.
*
* There is, however, no AT24 EEPROM on board the SAMA5D3x-EK: The Serial
* EEPROM was mounted on an external adaptor board and connected to the
@@ -243,9 +243,9 @@
# define AT24_MINOR _AT24_MINOR
#endif
/* MMC/SD minor numbers: The NSH device minor extended is extended to support
* two devices. If CONFIG_NSH_MMCSDMINOR is zero, these will be: /dev/mmcsd0
* and /dev/mmcsd1.
/* MMC/SD minor numbers: The NSH device minor extended is extended to
* support two devices. If CONFIG_NSH_MMCSDMINOR is zero, these will be:
* /dev/mmcsd0 and /dev/mmcsd1.
*/
#ifndef CONFIG_NSH_MMCSDMINOR
@@ -450,7 +450,7 @@
* (2) a microSD memory card slot (J6 labeled MCI1).
*
* The full size SD card slot connects via HSMCI0. The card detect discrete
* is available on PB17 (pulled high). The write protect descrete is tied to
* is available on PB17 (pulled high). The write protect discrete is tied to
* ground (via PP6) and not available to software. The slot supports 8-bit
* wide transfer mode, but the NuttX driver currently uses only the 4-bit
* wide transfer mode
@@ -602,7 +602,7 @@
* (MICREL KSZ9021/31) operating at 10/100/1000 Mbps.
* The board supports RGMII interface mode. The Ethernet interface
* consists of 4 pairs of low voltage differential pair signals
* designated from GRX± and GTx± plus control signals for link
* designated from GRX and GTx plus control signals for link
* activity indicators. These signals can be used to connect to a
* 10/100/1000 BaseT RJ45 connector integrated on the main board.
*
@@ -688,7 +688,7 @@
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Functions
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
drivers/README.txt
+1 -1
View File
@@ -14,7 +14,7 @@ Files in this directory
dev_null.c and dev_zero.c
These files provide the standard /dev/null and /dev/zero devices. See
include/nuttx/drivers/driers.h for prototypes of functions that should
include/nuttx/drivers/drivers.h for prototypes of functions that should
be called if you want to register these devices (devnull_register()
and devzero_register()).