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boards/stm32h7: add support for mcuboot

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Add support for MCUBoot.
Two new configurations are added:
- mcuboot-loader: mcuboot-loader app used as a bootloader.
main_mcuboot_loader as entrypoint
- mcuboot-app: used as mcuboot agent app. Needs to be
signed manually through "imgtool sign --pad  --align 4 -v 0 -s
auto -H 0x200 --pad-header -S 0xc0000 nuttx.hex nuttx_sign.bin"

Signed-off-by: Andres Sanchez <tito97_sp@hotmail.com>
This commit is contained in:
Andres Sanchez
2022-08-23 23:46:47 +02:00
committed by Xiang Xiao
parent 204d143e9e
commit 64687e438a
12 changed files with 1174 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/stm32h7/Kconfig
+96
View File
@@ -357,6 +357,11 @@ config STM32H7_AXI_SRAM_CORRUPTION_WAR
AXI_TARG7_FN_MOD register. This will reduce the read issuing capability
of the SRAM to 1 at AXI interconnect level and avoid data corruption.
config STM32_HAVE_OTA_PARTITION
bool
default n
config STM32H7_PROGMEM
bool "Flash progmem support"
default n
@@ -364,6 +369,35 @@ config STM32H7_PROGMEM
Add progmem support, start block and end block options are provided to
obtain an uniform flash memory mapping.
menu "Application Image Configuration"
choice
prompt "Application Image Format"
default STM32_APP_FORMAT_LEGACY
---help---
Depending on the chosen 2nd stage bootloader, the application may
be required to be perform a specific startup routine. Furthermore,
the image binary must be formatted according to the definition from
the 2nd stage bootloader.
config STM32_APP_FORMAT_LEGACY
bool "Legacy format"
---help---
This is the legacy application image format.
config STM32_APP_FORMAT_MCUBOOT
bool "MCUboot-bootable format"
select STM32_HAVE_OTA_PARTITION
depends on EXPERIMENTAL
---help---
The MCUboot support of loading the firmware images.
comment "MCUboot support depends on CONFIG_EXPERIMENTAL"
depends on !EXPERIMENTAL
endchoice # Application Image Format
endmenu # Application Image Configuration
menu "STM32H7 Peripheral Selection"
# These "hidden" settings determine whether a peripheral option is available
@@ -5484,4 +5518,66 @@ endchoice
endmenu # FDCAN Driver
menu "Progmem MTD configuration"
if STM32_HAVE_OTA_PARTITION
comment "Application Image OTA Update support"
config STM32_PROGMEM_OTA_PARTITION
bool "MTD driver"
default n
select BCH
select MTD
select MTD_BYTE_WRITE
select MTD_PARTITION
select MTD_PROGMEM
select STM32H7_PROGMEM
---help---
Initialize an MTD driver for the Flash, which will
add an entry at /dev for application access from userspace.
if STM32_PROGMEM_OTA_PARTITION
config STM32_MCUBOOT_HEADER_SIZE
hex
default 0x200
depends on STM32_APP_FORMAT_MCUBOOT
config STM32_OTA_PRIMARY_SLOT_DEVPATH
string "Application image primary slot device path"
default "/dev/ota0"
config STM32_OTA_SECONDARY_SLOT_DEVPATH
string "Application image secondary slot device path"
default "/dev/ota1"
config STM32_OTA_SCRATCH_DEVPATH
string "Scratch partition device path"
default "/dev/otascratch"
config STM32_OTA_PRIMARY_SLOT_OFFSET
hex "MCUboot application image primary slot offset"
default "0x40000"
config STM32_OTA_SECONDARY_SLOT_OFFSET
hex "MCUboot application image secondary slot offset"
default "0x100000"
config STM32_OTA_SCRATCH_OFFSET
hex "MCUboot scratch partition offset"
default "0x1c0000"
config STM32_OTA_SLOT_SIZE
hex "MCUboot application image slot size (in bytes)"
default "0xc0000"
config STM32_OTA_SCRATCH_SIZE
hex "MCUboot scratch partition size (in bytes)"
default "0x40000"
endif #STM32_PROGMEM_OTA_PARTITION
endif #STM32_HAVE_OTA_PARTITION
endmenu # Progmem configuration
endif # ARCH_CHIP_STM32H7
boards/arm/stm32h7/nucleo-h743zi/README.txt
+12
View File
@@ -159,3 +159,15 @@ Configurations
This configuration provides a basic NuttShell configuration (NSH)
for the Nucleo-H743ZI. The default console is the VCOM on USART3.
MCUboot safe bootloader implementation
--------------------------------------
mcuboot:
This configuration provides a base implementation for mcuboot integration
in nuttx.
mcuboot-loader: Nuttx app-based bootloader.
mcuboot-app: Nuttx app with nsh as entrypoint.
boards/arm/stm32h7/nucleo-h743zi/configs/mcuboot-app/defconfig
+94
View File
@@ -0,0 +1,94 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STANDARD_SERIAL is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-h743zi"
CONFIG_ARCH_BOARD_NUCLEO_H743ZI=y
CONFIG_ARCH_CHIP="stm32h7"
CONFIG_ARCH_CHIP_STM32H743ZI=y
CONFIG_ARCH_CHIP_STM32H7=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=43103
CONFIG_BUILTIN=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_ETH0_PHY_LAN8742A=y
CONFIG_EXAMPLES_MCUBOOT_SLOT_CONFIRM=y
CONFIG_EXAMPLES_MCUBOOT_SWAP_TEST=y
CONFIG_EXAMPLES_MCUBOOT_UPDATE_AGENT=y
CONFIG_EXAMPLES_MCUBOOT_UPDATE_AGENT_DL_BUFFER_SIZE=4096
CONFIG_EXPERIMENTAL=y
CONFIG_FAT_LCNAMES=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBM=y
CONFIG_MM_REGIONS=4
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETUTILS_DISCOVER=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_IPIN=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_ETH_PKTSIZE=1500
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_IGMP=y
CONFIG_NET_LOOPBACK=y
CONFIG_NET_ROUTE=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_MOTD=y
CONFIG_NSH_MOTD_STRING="Wellcome to Nuttx from MCUboot, this is the FIRST firmware."
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SPI=y
CONFIG_START_DAY=28
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2021
CONFIG_STM32H7_ETHMAC=y
CONFIG_STM32H7_FLASH_OVERRIDE_I=y
CONFIG_STM32H7_PHYSR=31
CONFIG_STM32H7_PHYSR_100FD=0x0018
CONFIG_STM32H7_PHYSR_100HD=0x0008
CONFIG_STM32H7_PHYSR_10FD=0x0014
CONFIG_STM32H7_PHYSR_10HD=0x0004
CONFIG_STM32H7_PHYSR_ALTCONFIG=y
CONFIG_STM32H7_PHYSR_ALTMODE=0x001c
CONFIG_STM32H7_USART3=y
CONFIG_STM32_APP_FORMAT_MCUBOOT=y
CONFIG_STM32_PROGMEM_OTA_PARTITION=y
CONFIG_SYSTEM_DHCPC_RENEW=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART3_SERIAL_CONSOLE=y
boards/arm/stm32h7/nucleo-h743zi/configs/mcuboot-loader/defconfig
+68
View File
@@ -0,0 +1,68 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-h743zi"
CONFIG_ARCH_BOARD_NUCLEO_H743ZI=y
CONFIG_ARCH_CHIP="stm32h7"
CONFIG_ARCH_CHIP_STM32H743ZI=y
CONFIG_ARCH_CHIP_STM32H7=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=43103
CONFIG_BOOT_MCUBOOT=y
CONFIG_BUILTIN=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DRVR_INVALIDATE=y
CONFIG_DRVR_READAHEAD=y
CONFIG_DRVR_WRITEBUFFER=y
CONFIG_EXPERIMENTAL=y
CONFIG_FAT_LCNAMES=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INIT_ENTRYPOINT="mcuboot_loader_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBM=y
CONFIG_MCUBOOT_BOOTLOADER=y
CONFIG_MCUBOOT_ENABLE_LOGGING=y
CONFIG_MM_CIRCBUF=y
CONFIG_MM_IOB=y
CONFIG_MM_REGIONS=4
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LIBRARY=y
CONFIG_NSH_LINELEN=64
CONFIG_NSH_MOTD=y
CONFIG_NSH_MOTD_STRING="Wellcome to Nuttx MCUboot-Loader!"
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SPI=y
CONFIG_START_DAY=28
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2021
CONFIG_STM32H7_FLASH_OVERRIDE_I=y
CONFIG_STM32H7_USART3=y
CONFIG_STM32_APP_FORMAT_MCUBOOT=y
CONFIG_STM32_PROGMEM_OTA_PARTITION=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART3_SERIAL_CONSOLE=y
CONFIG_WQUEUE_NOTIFIER=y
boards/arm/stm32h7/nucleo-h743zi/scripts/Make.defs
+10 -1
View File
@@ -22,7 +22,16 @@ include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = flash.ld
ifeq ($(CONFIG_STM32_APP_FORMAT_MCUBOOT),y)
ifeq ($(CONFIG_MCUBOOT_BOOTLOADER),y)
LDSCRIPT = flash-mcuboot-loader.ld
else
LDSCRIPT = flash-mcuboot-app.ld
endif
else
LDSCRIPT = flash.ld
endif
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
boards/arm/stm32h7/nucleo-h743zi/scripts/flash-mcuboot-app.ld
+200
View File
@@ -0,0 +1,200 @@
/****************************************************************************
* boards/arm/stm32h7/nucleo-h743zi/scripts/flash-mcuboot-app.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32H743ZI has 2048Kb of main FLASH memory. The flash memory is
* partitioned into a User Flash memory and a System Flash memory. Each
* of these memories has two banks:
*
* 1) User Flash memory:
*
* Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each
* Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each
*
* 2) System Flash memory:
*
* Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector
* Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector
*
* 3) User option bytes for user configuration, only in Bank 1.
*
* In the STM32H743ZI, two different boot spaces can be selected through
* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
* BOOT_ADD1 option bytes:
*
* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
* ST programmed value: Flash memory at 0x0800:0000
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* TODO: Check next paragraph with nucleo schematics
*
* NuttX does not modify these option bytes. On the unmodified NUCLEO-H743ZI
* board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0800:0000 in FLASH.
*
* The STM32H743ZI also has 1024Kb of data SRAM.
* SRAM is split up into several blocks and into three power domains:
*
* 1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with
* 0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus
*
* 1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000
*
* The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit
* DTCM ports. The DTCM-RAM could be used for critical real-time
* data, such as interrupt service routines or stack / heap memory.
* Both DTCM-RAMs can be used in parallel (for load/store operations)
* thanks to the Cortex-M7 dual issue capability.
*
* 1.2) 64Kb of ITCM-RAM beginning at address 0x0000:0000
*
* This RAM is connected to ITCM 64-bit interface designed for
* execution of critical real-times routines by the CPU.
*
* 2) AXI SRAM (D1 domain) accessible by all system masters except BDMA
* through D1 domain AXI bus matrix
*
* 2.1) 512Kb of SRAM beginning at address 0x2400:0000
*
* 3) AHB SRAM (D2 domain) accessible by all system masters except BDMA
* through D2 domain AHB bus matrix
*
* 3.1) 128Kb of SRAM1 beginning at address 0x3000:0000
* 3.2) 128Kb of SRAM2 beginning at address 0x3002:0000
* 3.3) 32Kb of SRAM3 beginning at address 0x3004:0000
*
* SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000
*
* 4) AHB SRAM (D3 domain) accessible by most of system masters
* through D3 domain AHB bus matrix
*
* 4.1) 64Kb of SRAM4 beginning at address 0x3800:0000
* 4.1) 4Kb of backup RAM beginning at address 0x3880:0000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*/
MEMORY
{
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K
flash (rx) : ORIGIN = 0x08040200, LENGTH = 768K - 256K
dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH = 64K
sram (rwx) : ORIGIN = 0x24000000, LENGTH = 512K
sram1 (rwx) : ORIGIN = 0x30000000, LENGTH = 128K
sram2 (rwx) : ORIGIN = 0x30020000, LENGTH = 128K
sram3 (rwx) : ORIGIN = 0x30040000, LENGTH = 32K
sram4 (rwx) : ORIGIN = 0x38000000, LENGTH = 64K
bbram (rwx) : ORIGIN = 0x38800000, LENGTH = 4K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab :
{
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx :
{
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Emit the the D3 power domain section for locating BDMA data
*
* Static data with locate_data(".sram4") will be located
* at start of SRAM4; the rest of SRAM4 will be added to the heap.
*/
.sram4_reserve (NOLOAD) :
{
*(.sram4)
. = ALIGN(4);
_sram4_heap_start = ABSOLUTE(.);
} > sram4
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
boards/arm/stm32h7/nucleo-h743zi/scripts/flash-mcuboot-loader.ld
+200
View File
@@ -0,0 +1,200 @@
/****************************************************************************
* boards/arm/stm32h7/nucleo-h743zi/scripts/flash-mcuboot-laoder.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32H743ZI has 2048Kb of main FLASH memory. The flash memory is
* partitioned into a User Flash memory and a System Flash memory. Each
* of these memories has two banks:
*
* 1) User Flash memory:
*
* Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each
* Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each
*
* 2) System Flash memory:
*
* Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector
* Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector
*
* 3) User option bytes for user configuration, only in Bank 1.
*
* In the STM32H743ZI, two different boot spaces can be selected through
* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
* BOOT_ADD1 option bytes:
*
* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
* ST programmed value: Flash memory at 0x0800:0000
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* TODO: Check next paragraph with nucleo schematics
*
* NuttX does not modify these option bytes. On the unmodified NUCLEO-H743ZI
* board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0800:0000 in FLASH.
*
* The STM32H743ZI also has 1024Kb of data SRAM.
* SRAM is split up into several blocks and into three power domains:
*
* 1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with
* 0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus
*
* 1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000
*
* The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit
* DTCM ports. The DTCM-RAM could be used for critical real-time
* data, such as interrupt service routines or stack / heap memory.
* Both DTCM-RAMs can be used in parallel (for load/store operations)
* thanks to the Cortex-M7 dual issue capability.
*
* 1.2) 64Kb of ITCM-RAM beginning at address 0x0000:0000
*
* This RAM is connected to ITCM 64-bit interface designed for
* execution of critical real-times routines by the CPU.
*
* 2) AXI SRAM (D1 domain) accessible by all system masters except BDMA
* through D1 domain AXI bus matrix
*
* 2.1) 512Kb of SRAM beginning at address 0x2400:0000
*
* 3) AHB SRAM (D2 domain) accessible by all system masters except BDMA
* through D2 domain AHB bus matrix
*
* 3.1) 128Kb of SRAM1 beginning at address 0x3000:0000
* 3.2) 128Kb of SRAM2 beginning at address 0x3002:0000
* 3.3) 32Kb of SRAM3 beginning at address 0x3004:0000
*
* SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000
*
* 4) AHB SRAM (D3 domain) accessible by most of system masters
* through D3 domain AHB bus matrix
*
* 4.1) 64Kb of SRAM4 beginning at address 0x3800:0000
* 4.1) 4Kb of backup RAM beginning at address 0x3880:0000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*/
MEMORY
{
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K
flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K
dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH = 64K
sram (rwx) : ORIGIN = 0x24000000, LENGTH = 512K
sram1 (rwx) : ORIGIN = 0x30000000, LENGTH = 128K
sram2 (rwx) : ORIGIN = 0x30020000, LENGTH = 128K
sram3 (rwx) : ORIGIN = 0x30040000, LENGTH = 32K
sram4 (rwx) : ORIGIN = 0x38000000, LENGTH = 64K
bbram (rwx) : ORIGIN = 0x38800000, LENGTH = 4K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab :
{
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx :
{
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Emit the the D3 power domain section for locating BDMA data
*
* Static data with locate_data(".sram4") will be located
* at start of SRAM4; the rest of SRAM4 will be added to the heap.
*/
.sram4_reserve (NOLOAD) :
{
*(.sram4)
. = ALIGN(4);
_sram4_heap_start = ABSOLUTE(.);
} > sram4
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
boards/arm/stm32h7/nucleo-h743zi/src/Makefile
+8
View File
@@ -76,6 +76,10 @@ ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += stm32_appinitialize.c
endif
ifeq ($(CONFIG_STM32H7_PROGMEM),y)
CSRCS += stm32_progmem.c
endif
ifeq ($(CONFIG_WL_NRF24L01),y)
CSRCS += stm32_nrf24l01.c
endif
@@ -92,4 +96,8 @@ ifeq ($(CONFIG_BOARDCTL_RESET),y)
CSRCS += stm32_reset.c
endif
ifeq ($(CONFIG_BOARDCTL_BOOT_IMAGE),y)
CSRCS += stm32_boot_image.c
endif
include $(TOPDIR)/boards/Board.mk
boards/arm/stm32h7/nucleo-h743zi/src/nucleo-h743zi.h
+33 -4
View File
@@ -36,10 +36,12 @@
/* Configuration ************************************************************/
#define HAVE_PROC 1
#define HAVE_USBDEV 1
#define HAVE_USBHOST 1
#define HAVE_USBMONITOR 1
#define HAVE_PROC 1
#define HAVE_USBDEV 1
#define HAVE_USBHOST 1
#define HAVE_USBMONITOR 1
#define HAVE_MTDCONFIG 1
#define HAVE_PROGMEM_CHARDEV 1
/* Can't support USB host or device features if USB OTG FS is not enabled */
@@ -78,6 +80,19 @@
# undef HAVE_USBMONITOR
#endif
#if !defined(CONFIG_STM32H7_PROGMEM) || !defined(CONFIG_MTD_PROGMEM)
# undef HAVE_PROGMEM_CHARDEV
#endif
/* This is the on-chip progmem memory driver minor number */
#define PROGMEM_MTD_MINOR 0
/* flash */
#if defined(CONFIG_MMCSD)
# define FLASH_BASED_PARAMS
#endif
/* procfs File System */
#ifdef CONFIG_FS_PROCFS
@@ -351,4 +366,18 @@ int stm32_pca9635_initialize(void);
int stm32_pwm_setup(void);
#endif
/****************************************************************************
* Name: stm32_mtd_initialize
*
* Description:
* Initialize MTD drivers.
*
****************************************************************************/
#ifdef CONFIG_MTD
#ifdef HAVE_PROGMEM_CHARDEV
int stm32_progmem_init(void);
#endif /* HAVE_PROGMEM_CHARDEV */
#endif
#endif /* __BOARDS_ARM_STM32H7_NUCLEO_H743ZI_SRC_NUCLEO_H743ZI_H */
boards/arm/stm32h7/nucleo-h743zi/src/stm32_boot_image.c
+186
View File
@@ -0,0 +1,186 @@
/****************************************************************************
* boards/arm/stm32h7/nucleo-h743zi/src/stm32_boot_image.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <stdio.h>
#include <fcntl.h>
#include <sys/boardctl.h>
#include <nuttx/irq.h>
#include <nuttx/cache.h>
#include "nvic.h"
#include "arm_internal.h"
#include "barriers.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure represents the first two entries on NVIC vector table */
struct arm_vector_table
{
uint32_t spr; /* Stack pointer on reset */
uint32_t reset; /* Pointer to reset exception handler */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static void cleanup_arm_nvic(void);
#ifdef CONFIG_ARMV7M_SYSTICK
static void systick_disable(void);
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: cleanup_arm_nvic
*
* Description:
* Acknowledge and disable all interrupts in NVIC
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
static void cleanup_arm_nvic(void)
{
int i;
/* Allow any pending interrupts to be recognized */
ARM_ISB();
cpsid();
/* Disable all interrupts */
for (i = 0; i < NR_IRQS; i += 32)
{
putreg32(0xffffffff, NVIC_IRQ_CLEAR(i));
}
/* Clear all pending interrupts */
for (i = 0; i < NR_IRQS; i += 32)
{
putreg32(0xffffffff, NVIC_IRQ_CLRPEND(i));
}
}
#ifdef CONFIG_ARMV7M_SYSTICK
/****************************************************************************
* Name: systick_disable
*
* Description:
* Disable the SysTick system timer
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
static void systick_disable(void)
{
putreg32(0, NVIC_SYSTICK_CTRL);
putreg32(NVIC_SYSTICK_RELOAD_MASK, NVIC_SYSTICK_RELOAD);
putreg32(0, NVIC_SYSTICK_CURRENT);
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_boot_image
*
* Description:
* This entry point is called by bootloader to jump to application image.
*
****************************************************************************/
int board_boot_image(FAR const char *path, uint32_t hdr_size)
{
static struct arm_vector_table vt;
int fd;
ssize_t bytes;
fd = open(path, O_RDONLY | O_CLOEXEC);
if (fd < 0)
{
syslog(LOG_ERR, "Failed to open %s with: %d", path, fd);
return fd;
}
bytes = pread(fd, &vt, sizeof(vt), hdr_size);
if (bytes != sizeof(vt))
{
syslog(LOG_ERR, "Failed to read ARM vector table: %d", bytes);
return bytes < 0 ? bytes : -1;
}
#ifdef CONFIG_ARMV7M_SYSTICK
systick_disable();
#endif
cleanup_arm_nvic();
#ifdef CONFIG_ARMV7M_DCACHE
up_disable_dcache();
#endif
#ifdef CONFIG_ARMV7M_ICACHE
up_disable_icache();
#endif
#ifdef CONFIG_ARM_MPU
mpu_control(false, false, false);
#endif
/* Set main and process stack pointers */
__asm__ __volatile__("\tmsr msp, %0\n" : : "r" (vt.spr));
setcontrol(0x00);
ARM_ISB();
((void (*)(void))vt.reset)();
return 0;
}
boards/arm/stm32h7/nucleo-h743zi/src/stm32_bringup.c
+10
View File
@@ -323,5 +323,15 @@ int stm32_bringup(void)
}
#endif
#ifdef CONFIG_MTD
#ifdef HAVE_PROGMEM_CHARDEV
ret = stm32_progmem_init();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to initialize MTD progmem: %d\n", ret);
}
#endif /* HAVE_PROGMEM_CHARDEV */
#endif /* CONFIG_MTD */
return OK;
}
boards/arm/stm32h7/nucleo-h743zi/src/stm32_progmem.c
+257
View File
@@ -0,0 +1,257 @@
/****************************************************************************
* boards/arm/stm32h7/nucleo-h743zi/src/stm32_progmem.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/mount.h>
#include <stdbool.h>
#include <stdlib.h>
#include <stdio.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/progmem.h>
#include <nuttx/drivers/drivers.h>
#include <nuttx/fs/ioctl.h>
#include <nuttx/kmalloc.h>
#include <nuttx/mtd/mtd.h>
#ifdef CONFIG_BCH
#include <nuttx/drivers/drivers.h>
#endif
#include <stm32.h>
#include "nucleo-h743zi.h"
#include <stm32_flash.h>
#ifdef HAVE_PROGMEM_CHARDEV
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0]))
#define PARTITION_LABEL_LEN 16
/* Configuration ************************************************************/
/* Make sure that support for MTD partitions is enabled */
#ifdef CONFIG_MTD
#ifndef CONFIG_MTD_PARTITION
# error "CONFIG_MTD_PARTITION is required"
#endif
#endif
/****************************************************************************
* Private Types
****************************************************************************/
#if defined(CONFIG_STM32_PROGMEM_OTA_PARTITION)
struct ota_partition_s
{
uint32_t offset; /* Partition offset from the beginning of MTD */
uint32_t size; /* Partition size in bytes */
const char *devpath; /* Partition device path */
};
#endif
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
#if defined(CONFIG_STM32_PROGMEM_OTA_PARTITION)
static struct mtd_dev_s *progmem_alloc_mtdpart(uint32_t mtd_offset,
uint32_t mtd_size);
static int init_ota_partitions(void);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
static FAR struct mtd_dev_s *g_progmem_mtd;
#if defined(CONFIG_STM32_PROGMEM_OTA_PARTITION)
static const struct ota_partition_s g_ota_partition_table[] =
{
{
.offset = CONFIG_STM32_OTA_PRIMARY_SLOT_OFFSET,
.size = CONFIG_STM32_OTA_SLOT_SIZE,
.devpath = CONFIG_STM32_OTA_PRIMARY_SLOT_DEVPATH
},
{
.offset = CONFIG_STM32_OTA_SECONDARY_SLOT_OFFSET,
.size = CONFIG_STM32_OTA_SLOT_SIZE,
.devpath = CONFIG_STM32_OTA_SECONDARY_SLOT_DEVPATH
},
{
.offset = CONFIG_STM32_OTA_SCRATCH_OFFSET,
.size = CONFIG_STM32_OTA_SCRATCH_SIZE,
.devpath = CONFIG_STM32_OTA_SCRATCH_DEVPATH
}
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
#if defined(CONFIG_STM32_PROGMEM_OTA_PARTITION)
/****************************************************************************
* Name: sam_progmem_alloc_mtdpart
*
* Description:
* Allocate an MTD partition from FLASH.
*
* Input Parameters:
* mtd_offset - MTD Partition offset from the base address in FLASH.
* mtd_size - Size for the MTD partition.
*
* Returned Value:
* MTD partition data pointer on success, NULL on failure.
*
****************************************************************************/
static struct mtd_dev_s *progmem_alloc_mtdpart(uint32_t mtd_offset,
uint32_t mtd_size)
{
uint32_t blocks;
ssize_t startblock;
ASSERT((mtd_offset % up_progmem_pagesize(0)) == 0);
ASSERT((mtd_size % up_progmem_pagesize(0)) == 0);
finfo("\tMTD offset = 0x%"PRIx32"\n", mtd_offset);
finfo("\tMTD size = 0x%"PRIx32"\n", mtd_size);
startblock = up_progmem_getpage(mtd_offset + up_progmem_getaddress(0));
if (startblock < 0)
{
return NULL;
}
blocks = mtd_size / up_progmem_pagesize(0);
return mtd_partition(g_progmem_mtd, startblock, blocks);
}
/****************************************************************************
* Name: init_ota_partitions
*
* Description:
* Initialize partitions that are dedicated to firmware OTA update.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
static int init_ota_partitions(void)
{
int i;
struct mtd_dev_s *mtd;
int ret = 0;
char path[PARTITION_LABEL_LEN + 1];
for (i = 0; i < ARRAYSIZE(g_ota_partition_table); ++i)
{
const struct ota_partition_s *part = &g_ota_partition_table[i];
mtd = progmem_alloc_mtdpart(part->offset, part->size);
strncpy(path, (char *)part->devpath, PARTITION_LABEL_LEN);
path[PARTITION_LABEL_LEN] = '\0';
finfo("INFO: [label]: %s\n", path);
finfo("INFO: [offset]: 0x%08" PRIx32 "\n", part->offset);
finfo("INFO: [size]: 0x%08" PRIx32 "\n", part->size);
if (!mtd)
{
ferr("ERROR: Failed to create MTD partition\n");
ret = -1;
}
ret = register_mtddriver(path, mtd, 0777, NULL);
if (ret < 0)
{
ferr("ERROR: Failed to register MTD @ %s\n", path);
ret = -1;
}
}
return ret;
}
#endif /* CONFIG_STM32_PROGMEM_OTA_PARTITION */
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_progmem_init
*
* Initialize Progmem partition. Read partition information, and use
* these data for creating MTD.
*
* Input Parameters:
* None
*
* Returned Value:
* 0 if success or a negative value if fail.
*
****************************************************************************/
int stm32_progmem_init(void)
{
int ret = 0;
g_progmem_mtd = progmem_initialize();
if (g_progmem_mtd == NULL)
{
ferr("ERROR: Failed to get progmem flash MTD\n");
ret = -EIO;
}
#ifdef CONFIG_STM32_PROGMEM_OTA_PARTITION
ret = init_ota_partitions();
if (ret < 0)
{
ferr("ERROR: Failed to create OTA partition from MTD\n");
ret = -EIO;
}
#endif
return ret;
}
#endif /* HAVE_PROGMEM_CHARDEV */