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Merge remote-tracking branch 'origin/master' into photon

Browse Source
This commit is contained in:
Gregory Nutt
2017-04-23 10:16:54 -06:00
parent e1a4e88a55 ca7d88f6bb
commit 62966d915c
61 changed files with 440 additions and 333 deletions
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arch/arm/src/c5471/c5471_ethernet.c
+1 -1
View File
@@ -2364,7 +2364,7 @@ static void c5471_reset(struct c5471_driver_s *priv)
static void c5471_macassign(struct c5471_driver_s *priv)
{
struct net_driver_s *dev = &priv->c_dev;
uint8_t *mptr = dev->d_mac.ether_addr_octet;
uint8_t *mptr = dev->d_mac.ether.ether_addr_octet;
register uint32_t tmp;
ninfo("MAC: %0x:%0x:%0x:%0x:%0x:%0x\n",
arch/arm/src/common/up_udelay.c
+1 -1
View File
@@ -59,7 +59,7 @@
* Description:
* Delay inline for the requested number of microseconds. NOTE: Because
* of all of the setup, several microseconds will be lost before the actual
* timing looop begins. Thus, the delay will always be a few microseconds
* timing loop begins. Thus, the delay will always be a few microseconds
* longer than requested.
*
* *** NOT multi-tasking friendly ***
arch/arm/src/kinetis/kinetis_enet.c
+2 -2
View File
@@ -1125,7 +1125,7 @@ static int kinetis_ifup(struct net_driver_s *dev)
{
FAR struct kinetis_driver_s *priv =
(FAR struct kinetis_driver_s *)dev->d_private;
uint8_t *mac = dev->d_mac.ether_addr_octet;
uint8_t *mac = dev->d_mac.ether.ether_addr_octet;
uint32_t regval;
int ret;
@@ -2144,7 +2144,7 @@ int kinetis_netinitialize(int intf)
uidl = getreg32(KINETIS_SIM_UIDL);
uidml = getreg32(KINETIS_SIM_UIDML);
mac = priv->dev.d_mac.ether_addr_octet;
mac = priv->dev.d_mac.ether.ether_addr_octet;
uidml |= 0x00000200;
uidml &= 0x0000FEFF;
arch/arm/src/lpc11xx/Kconfig
+1 -1
View File
@@ -222,7 +222,7 @@ config CAN_SAM
The bus is sampled 3 times (recommended for low to medium speed buses to spikes on the bus-line).
config CAN_LOOPBACK
bool "CAN looopback mode"
bool "CAN loopback mode"
default n
---help---
Enable CAN loopback mode
arch/arm/src/lpc17xx/Kconfig
+1 -1
View File
@@ -589,7 +589,7 @@ config CAN_SAM
The bus is sampled 3 times (recommended for low to medium speed buses to spikes on the bus-line).
config CAN_LOOPBACK
bool "CAN looopback mode"
bool "CAN loopback mode"
default n
---help---
Enable CAN loopback mode
arch/arm/src/lpc17xx/lpc17_ethernet.c
+6 -6
View File
@@ -1591,16 +1591,16 @@ static int lpc17_ifup(struct net_driver_s *dev)
/* Configure the MAC station address */
regval = (uint32_t)priv->lp_dev.d_mac.ether_addr_octet[5] << 8 |
(uint32_t)priv->lp_dev.d_mac.ether_addr_octet[4];
regval = (uint32_t)priv->lp_dev.d_mac.ether.ether_addr_octet[5] << 8 |
(uint32_t)priv->lp_dev.d_mac.ether.ether_addr_octet[4];
lpc17_putreg(regval, LPC17_ETH_SA0);
regval = (uint32_t)priv->lp_dev.d_mac.ether_addr_octet[3] << 8 |
(uint32_t)priv->lp_dev.d_mac.ether_addr_octet[2];
regval = (uint32_t)priv->lp_dev.d_mac.ether.ether_addr_octet[3] << 8 |
(uint32_t)priv->lp_dev.d_mac.ether.ether_addr_octet[2];
lpc17_putreg(regval, LPC17_ETH_SA1);
regval = (uint32_t)priv->lp_dev.d_mac.ether_addr_octet[1] << 8 |
(uint32_t)priv->lp_dev.d_mac.ether_addr_octet[0];
regval = (uint32_t)priv->lp_dev.d_mac.ether.ether_addr_octet[1] << 8 |
(uint32_t)priv->lp_dev.d_mac.ether.ether_addr_octet[0];
lpc17_putreg(regval, LPC17_ETH_SA2);
#ifdef CONFIG_NET_ICMPv6
arch/arm/src/lpc43xx/lpc43_ethernet.c
+9 -9
View File
@@ -3535,22 +3535,22 @@ static void lpc43_macaddress(FAR struct lpc43_ethmac_s *priv)
ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
dev->d_mac.ether.ether_addr_octet[0], dev->d_mac.ether.ether_addr_octet[1],
dev->d_mac.ether.ether_addr_octet[2], dev->d_mac.ether.ether_addr_octet[3],
dev->d_mac.ether.ether_addr_octet[4], dev->d_mac.ether.ether_addr_octet[5]);
/* Set the MAC address high register */
regval = ((uint32_t)dev->d_mac.ether_addr_octet[5] << 8) |
(uint32_t)dev->d_mac.ether_addr_octet[4];
regval = ((uint32_t)dev->d_mac.ether.ether_addr_octet[5] << 8) |
(uint32_t)dev->d_mac.ether.ether_addr_octet[4];
lpc43_putreg(regval, LPC43_ETH_MACA0HI);
/* Set the MAC address low register */
regval = ((uint32_t)dev->d_mac.ether_addr_octet[3] << 24) |
((uint32_t)dev->d_mac.ether_addr_octet[2] << 16) |
((uint32_t)dev->d_mac.ether_addr_octet[1] << 8) |
(uint32_t)dev->d_mac.ether_addr_octet[0];
regval = ((uint32_t)dev->d_mac.ether.ether_addr_octet[3] << 24) |
((uint32_t)dev->d_mac.ether.ether_addr_octet[2] << 16) |
((uint32_t)dev->d_mac.ether.ether_addr_octet[1] << 8) |
(uint32_t)dev->d_mac.ether.ether_addr_octet[0];
lpc43_putreg(regval, LPC43_ETH_MACA0LO);
}
arch/arm/src/sam34/Kconfig
+35 -1
View File
@@ -572,7 +572,6 @@ config SAM34_TWIS
bool
default n
config SAM34_TWIM0
bool "Two-wire Master Interface 0 (TWIM0)"
default n
@@ -1142,6 +1141,41 @@ config SAM34_SPI_REGDEBUG
endmenu # AT91SAM3/4 SPI device driver options
endif # SAM34_SPI0 || SAM34_SPI1
if SAM34_TWIM
menu "AT91SAM3/4 TWI master device driver options"
config SAM34_TWIM0_FREQUENCY
int "TWI0 Frequency"
default 100000
depends on SAM34_TWIM0
config SAM34_TWIM1_FREQUENCY
int "TWI1 Frequency"
default 100000
depends on SAM34_TWIM1
config SAM34_TWIM2_FREQUENCY
int "TWI2 Frequency"
default 100000
depends on SAM34_TWIM2
config SAM34_TWIM3_FREQUENCY
int "TWI3 Frequency"
default 100000
depends on SAM34_TWIM3
config SAM34_TWI_REGDEBUG
bool "TWI register level debug"
depends on DEBUG_I2C_INFO
default n
---help---
Output detailed register-level TWI device debug information.
Very invasive! Requires also CONFIG_DEBUG_I2C_INFO.
endmenu # TWI device driver options
endif # SAM34_TWIM
menu "AT91SAM3/4 EMAC device driver options"
depends on SAM34_EMAC
arch/arm/src/sam34/sam_emac.c
+9 -9
View File
@@ -3416,20 +3416,20 @@ static void sam_macaddress(struct sam_emac_s *priv)
ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
dev->d_mac.ether.ether_addr_octet[0], dev->d_mac.ether.ether_addr_octet[1],
dev->d_mac.ether.ether_addr_octet[2], dev->d_mac.ether.ether_addr_octet[3],
dev->d_mac.ether.ether_addr_octet[4], dev->d_mac.ether.ether_addr_octet[5]);
/* Set the MAC address */
regval = (uint32_t)dev->d_mac.ether_addr_octet[0] |
(uint32_t)dev->d_mac.ether_addr_octet[1] << 8 |
(uint32_t)dev->d_mac.ether_addr_octet[2] << 16 |
(uint32_t)dev->d_mac.ether_addr_octet[3] << 24;
regval = (uint32_t)dev->d_mac.ether.ether_addr_octet[0] |
(uint32_t)dev->d_mac.ether.ether_addr_octet[1] << 8 |
(uint32_t)dev->d_mac.ether.ether_addr_octet[2] << 16 |
(uint32_t)dev->d_mac.ether.ether_addr_octet[3] << 24;
sam_putreg(priv, SAM_EMAC_SAB1, regval);
regval = (uint32_t)dev->d_mac.ether_addr_octet[4] |
(uint32_t)dev->d_mac.ether_addr_octet[5] << 8;
regval = (uint32_t)dev->d_mac.ether.ether_addr_octet[4] |
(uint32_t)dev->d_mac.ether.ether_addr_octet[5] << 8;
sam_putreg(priv, SAM_EMAC_SAT1, regval);
}
arch/arm/src/sam34/sam_twi.c
+16 -14
View File
@@ -71,19 +71,21 @@
#include "sam_gpio.h"
#include "sam_twi.h"
#if defined(CONFIG_SAM34_TWI0) || defined(CONFIG_SAM34_TWI1)
/* REVISIT: Missing support for TWI2 master */
#if defined(CONFIG_SAM34_TWIM0) || defined(CONFIG_SAM34_TWIM1)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ***************************************************************/
#ifndef CONFIG_SAM34_TWI0_FREQUENCY
# define CONFIG_SAM34_TWI0_FREQUENCY 100000
#ifndef CONFIG_SAM34_TWIM0_FREQUENCY
# define CONFIG_SAM34_TWIM0_FREQUENCY 100000
#endif
#ifndef CONFIG_SAM34_TWI1_FREQUENCY
# define CONFIG_SAM34_TWI1_FREQUENCY 100000
#ifndef CONFIG_SAM34_TWIM1_FREQUENCY
# define CONFIG_SAM34_TWIM1_FREQUENCY 100000
#endif
#ifndef CONFIG_DEBUG_I2C_INFO
@@ -187,11 +189,11 @@ static void twi_hw_initialize(struct twi_dev_s *priv, unsigned int pid,
* Private Data
****************************************************************************/
#ifdef CONFIG_SAM34_TWI0
#ifdef CONFIG_SAM34_TWIM0
static struct twi_dev_s g_twi0;
#endif
#ifdef CONFIG_SAM34_TWI1
#ifdef CONFIG_SAM34_TWIM1
static struct twi_dev_s g_twi1;
#endif
@@ -430,7 +432,7 @@ static void twi_wakeup(struct twi_dev_s *priv, int result)
*
****************************************************************************/
static int twi_interrupt(int irq, FAR void *context, FAR void *arg);
static int twi_interrupt(int irq, FAR void *context, FAR void *arg)
{
struct twi_dev_s *priv = (struct twi_dev_s *)arg;
struct i2c_msg_s *msg;
@@ -901,7 +903,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
flags = enter_critical_section();
#ifdef CONFIG_SAM34_TWI0
#ifdef CONFIG_SAM34_TWIM0
if (bus == 0)
{
/* Set up TWI0 register base address and IRQ number */
@@ -922,18 +924,18 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
/* Select the TWI frequency, and peripheral ID */
frequency = CONFIG_SAM34_TWI0_FREQUENCY;
frequency = CONFIG_SAM34_TWIM0_FREQUENCY;
pid = SAM_PID_TWI0;
}
else
#endif
#ifdef CONFIG_SAM34_TWI1
#ifdef CONFIG_SAM34_TWIM1
if (bus == 1)
{
/* Set up TWI1 register base address and IRQ number */
priv = &g_twi1;
priv->base = SAM_TWI0_BASE;
priv->base = SAM_TWI1_BASE;
priv->irq = SAM_IRQ_TWI1;
priv->twi = 1;
@@ -948,7 +950,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
/* Select the TWI frequency, and peripheral ID */
frequency = CONFIG_SAMA5_TWI1_FREQUENCY;
frequency = CONFIG_SAM34_TWIM1_FREQUENCY;
pid = SAM_PID_TWI1;
}
else
@@ -1029,4 +1031,4 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
return OK;
}
#endif /* CONFIG_SAM34_TWI0 || CONFIG_SAM34_TWI1 */
#endif /* CONFIG_SAM34_TWIM0 || CONFIG_SAM34_TWIM1 */
arch/arm/src/sama5/sam_emaca.c
+9 -9
View File
@@ -3458,20 +3458,20 @@ static void sam_macaddress(struct sam_emac_s *priv)
ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
dev->d_mac.ether.ether_addr_octet[0], dev->d_mac.ether.ether_addr_octet[1],
dev->d_mac.ether.ether_addr_octet[2], dev->d_mac.ether.ether_addr_octet[3],
dev->d_mac.ether.ether_addr_octet[4], dev->d_mac.ether.ether_addr_octet[5]);
/* Set the MAC address */
regval = (uint32_t)dev->d_mac.ether_addr_octet[0] |
(uint32_t)dev->d_mac.ether_addr_octet[1] << 8 |
(uint32_t)dev->d_mac.ether_addr_octet[2] << 16 |
(uint32_t)dev->d_mac.ether_addr_octet[3] << 24;
regval = (uint32_t)dev->d_mac.ether.ether_addr_octet[0] |
(uint32_t)dev->d_mac.ether.ether_addr_octet[1] << 8 |
(uint32_t)dev->d_mac.ether.ether_addr_octet[2] << 16 |
(uint32_t)dev->d_mac.ether.ether_addr_octet[3] << 24;
sam_putreg(priv, SAM_EMAC_SA1B, regval);
regval = (uint32_t)dev->d_mac.ether_addr_octet[4] |
(uint32_t)dev->d_mac.ether_addr_octet[5] << 8;
regval = (uint32_t)dev->d_mac.ether.ether_addr_octet[4] |
(uint32_t)dev->d_mac.ether.ether_addr_octet[5] << 8;
sam_putreg(priv, SAM_EMAC_SA1T, regval);
}
arch/arm/src/sama5/sam_emacb.c
+9 -9
View File
@@ -4106,20 +4106,20 @@ static void sam_macaddress(struct sam_emac_s *priv)
ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
dev->d_mac.ether.ether_addr_octet[0], dev->d_mac.ether.ether_addr_octet[1],
dev->d_mac.ether.ether_addr_octet[2], dev->d_mac.ether.ether_addr_octet[3],
dev->d_mac.ether.ether_addr_octet[4], dev->d_mac.ether.ether_addr_octet[5]);
/* Set the MAC address */
regval = (uint32_t)dev->d_mac.ether_addr_octet[0] |
(uint32_t)dev->d_mac.ether_addr_octet[1] << 8 |
(uint32_t)dev->d_mac.ether_addr_octet[2] << 16 |
(uint32_t)dev->d_mac.ether_addr_octet[3] << 24;
regval = (uint32_t)dev->d_mac.ether.ether_addr_octet[0] |
(uint32_t)dev->d_mac.ether.ether_addr_octet[1] << 8 |
(uint32_t)dev->d_mac.ether.ether_addr_octet[2] << 16 |
(uint32_t)dev->d_mac.ether.ether_addr_octet[3] << 24;
sam_putreg(priv, SAM_EMAC_SAB1_OFFSET, regval);
regval = (uint32_t)dev->d_mac.ether_addr_octet[4] |
(uint32_t)dev->d_mac.ether_addr_octet[5] << 8;
regval = (uint32_t)dev->d_mac.ether.ether_addr_octet[4] |
(uint32_t)dev->d_mac.ether.ether_addr_octet[5] << 8;
sam_putreg(priv, SAM_EMAC_SAT1_OFFSET, regval);
}
arch/arm/src/sama5/sam_gmac.c
+9 -9
View File
@@ -3506,20 +3506,20 @@ static void sam_macaddress(struct sam_gmac_s *priv)
ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
dev->d_mac.ether.ether_addr_octet[0], dev->d_mac.ether.ether_addr_octet[1],
dev->d_mac.ether.ether_addr_octet[2], dev->d_mac.ether.ether_addr_octet[3],
dev->d_mac.ether.ether_addr_octet[4], dev->d_mac.ether.ether_addr_octet[5]);
/* Set the MAC address */
regval = (uint32_t)dev->d_mac.ether_addr_octet[0] |
(uint32_t)dev->d_mac.ether_addr_octet[1] << 8 |
(uint32_t)dev->d_mac.ether_addr_octet[2] << 16 |
(uint32_t)dev->d_mac.ether_addr_octet[3] << 24;
regval = (uint32_t)dev->d_mac.ether.ether_addr_octet[0] |
(uint32_t)dev->d_mac.ether.ether_addr_octet[1] << 8 |
(uint32_t)dev->d_mac.ether.ether_addr_octet[2] << 16 |
(uint32_t)dev->d_mac.ether.ether_addr_octet[3] << 24;
sam_putreg(priv, SAM_GMAC_SAB1, regval);
regval = (uint32_t)dev->d_mac.ether_addr_octet[4] |
(uint32_t)dev->d_mac.ether_addr_octet[5] << 8;
regval = (uint32_t)dev->d_mac.ether.ether_addr_octet[4] |
(uint32_t)dev->d_mac.ether.ether_addr_octet[5] << 8;
sam_putreg(priv, SAM_GMAC_SAT1, regval);
}
arch/arm/src/samv7/sam_emac.c
+13 -13
View File
@@ -4668,20 +4668,20 @@ static void sam_macaddress(struct sam_emac_s *priv)
ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
dev->d_mac.ether.ether_addr_octet[0], dev->d_mac.ether.ether_addr_octet[1],
dev->d_mac.ether.ether_addr_octet[2], dev->d_mac.ether.ether_addr_octet[3],
dev->d_mac.ether.ether_addr_octet[4], dev->d_mac.ether.ether_addr_octet[5]);
/* Set the MAC address */
regval = (uint32_t)dev->d_mac.ether_addr_octet[0] |
(uint32_t)dev->d_mac.ether_addr_octet[1] << 8 |
(uint32_t)dev->d_mac.ether_addr_octet[2] << 16 |
(uint32_t)dev->d_mac.ether_addr_octet[3] << 24;
regval = (uint32_t)dev->d_mac.ether.ether_addr_octet[0] |
(uint32_t)dev->d_mac.ether.ether_addr_octet[1] << 8 |
(uint32_t)dev->d_mac.ether.ether_addr_octet[2] << 16 |
(uint32_t)dev->d_mac.ether.ether_addr_octet[3] << 24;
sam_putreg(priv, SAM_EMAC_SAB1_OFFSET, regval);
regval = (uint32_t)dev->d_mac.ether_addr_octet[4] |
(uint32_t)dev->d_mac.ether_addr_octet[5] << 8;
regval = (uint32_t)dev->d_mac.ether.ether_addr_octet[4] |
(uint32_t)dev->d_mac.ether.ether_addr_octet[5] << 8;
sam_putreg(priv, SAM_EMAC_SAT1_OFFSET, regval);
}
@@ -5160,13 +5160,13 @@ int sam_emac_setmacaddr(int intf, uint8_t mac[6])
/* Copy the MAC address into the device structure */
dev = &priv->dev;
memcpy(dev->d_mac.ether_addr_octet, mac, 6);
memcpy(dev->d_mac.ether.ether_addr_octet, mac, 6);
ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
dev->d_mac.ether.ether_addr_octet[0], dev->d_mac.ether.ether_addr_octet[1],
dev->d_mac.ether.ether_addr_octet[2], dev->d_mac.ether.ether_addr_octet[3],
dev->d_mac.ether.ether_addr_octet[4], dev->d_mac.ether.ether_addr_octet[5]);
return OK;
}
arch/arm/src/stm32/stm32_eth.c
+9 -9
View File
@@ -3674,22 +3674,22 @@ static void stm32_macaddress(FAR struct stm32_ethmac_s *priv)
ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
dev->d_mac.ether.ether_addr_octet[0], dev->d_mac.ether.ether_addr_octet[1],
dev->d_mac.ether.ether_addr_octet[2], dev->d_mac.ether.ether_addr_octet[3],
dev->d_mac.ether.ether_addr_octet[4], dev->d_mac.ether.ether_addr_octet[5]);
/* Set the MAC address high register */
regval = ((uint32_t)dev->d_mac.ether_addr_octet[5] << 8) |
(uint32_t)dev->d_mac.ether_addr_octet[4];
regval = ((uint32_t)dev->d_mac.ether.ether_addr_octet[5] << 8) |
(uint32_t)dev->d_mac.ether.ether_addr_octet[4];
stm32_putreg(regval, STM32_ETH_MACA0HR);
/* Set the MAC address low register */
regval = ((uint32_t)dev->d_mac.ether_addr_octet[3] << 24) |
((uint32_t)dev->d_mac.ether_addr_octet[2] << 16) |
((uint32_t)dev->d_mac.ether_addr_octet[1] << 8) |
(uint32_t)dev->d_mac.ether_addr_octet[0];
regval = ((uint32_t)dev->d_mac.ether.ether_addr_octet[3] << 24) |
((uint32_t)dev->d_mac.ether.ether_addr_octet[2] << 16) |
((uint32_t)dev->d_mac.ether.ether_addr_octet[1] << 8) |
(uint32_t)dev->d_mac.ether.ether_addr_octet[0];
stm32_putreg(regval, STM32_ETH_MACA0LR);
}
arch/arm/src/stm32f7/stm32_ethernet.c
+9 -9
View File
@@ -3780,22 +3780,22 @@ static void stm32_macaddress(struct stm32_ethmac_s *priv)
ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
dev->d_mac.ether.ether_addr_octet[0], dev->d_mac.ether.ether_addr_octet[1],
dev->d_mac.ether.ether_addr_octet[2], dev->d_mac.ether.ether_addr_octet[3],
dev->d_mac.ether.ether_addr_octet[4], dev->d_mac.ether.ether_addr_octet[5]);
/* Set the MAC address high register */
regval = ((uint32_t)dev->d_mac.ether_addr_octet[5] << 8) |
(uint32_t)dev->d_mac.ether_addr_octet[4];
regval = ((uint32_t)dev->d_mac.ether.ether_addr_octet[5] << 8) |
(uint32_t)dev->d_mac.ether.ether_addr_octet[4];
stm32_putreg(regval, STM32_ETH_MACA0HR);
/* Set the MAC address low register */
regval = ((uint32_t)dev->d_mac.ether_addr_octet[3] << 24) |
((uint32_t)dev->d_mac.ether_addr_octet[2] << 16) |
((uint32_t)dev->d_mac.ether_addr_octet[1] << 8) |
(uint32_t)dev->d_mac.ether_addr_octet[0];
regval = ((uint32_t)dev->d_mac.ether.ether_addr_octet[3] << 24) |
((uint32_t)dev->d_mac.ether.ether_addr_octet[2] << 16) |
((uint32_t)dev->d_mac.ether.ether_addr_octet[1] << 8) |
(uint32_t)dev->d_mac.ether.ether_addr_octet[0];
stm32_putreg(regval, STM32_ETH_MACA0LR);
}
arch/arm/src/tiva/lm3s_ethernet.c
+8 -8
View File
@@ -1389,14 +1389,14 @@ static int tiva_ifup(struct net_driver_s *dev)
/* Program the hardware with it's MAC address (for filtering) */
regval = (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[3] << 24 |
(uint32_t)priv->ld_dev.d_mac.ether_addr_octet[2] << 16 |
(uint32_t)priv->ld_dev.d_mac.ether_addr_octet[1] << 8 |
(uint32_t)priv->ld_dev.d_mac.ether_addr_octet[0];
regval = (uint32_t)priv->ld_dev.d_mac.ether.ether_addr_octet[3] << 24 |
(uint32_t)priv->ld_dev.d_mac.ether.ether_addr_octet[2] << 16 |
(uint32_t)priv->ld_dev.d_mac.ether.ether_addr_octet[1] << 8 |
(uint32_t)priv->ld_dev.d_mac.ether.ether_addr_octet[0];
tiva_ethout(priv, TIVA_MAC_IA0_OFFSET, regval);
regval = (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[5] << 8 |
(uint32_t)priv->ld_dev.d_mac.ether_addr_octet[4];
regval = (uint32_t)priv->ld_dev.d_mac.ether.ether_addr_octet[5] << 8 |
(uint32_t)priv->ld_dev.d_mac.ether.ether_addr_octet[4];
tiva_ethout(priv, TIVA_MAC_IA1_OFFSET, regval);
/* Set and activate a timer process */
@@ -1696,13 +1696,13 @@ static inline int tiva_ethinitialize(int intf)
priv->ld_txpoll = wd_create(); /* Create periodic poll timer */
priv->ld_txtimeout = wd_create(); /* Create TX timeout timer */
#ifdef CONFIG_TIVA_BOARDMAC
/* If the board can provide us with a MAC address, get the address
* from the board now. The MAC will not be applied until tiva_ifup()
* is called (and the MAC can be overwritten with a netdev ioctl call).
*/
#ifdef CONFIG_TIVA_BOARDMAC
tiva_ethernetmac(&priv->ld_dev.d_mac);
tiva_ethernetmac(&priv->ld_dev.d_mac.ether);
#endif
/* Perform minimal, one-time initialization -- just reset the controller and
arch/arm/src/tiva/tm4c_ethernet.c
+10 -10
View File
@@ -3755,22 +3755,22 @@ static void tiva_macaddress(FAR struct tiva_ethmac_s *priv)
ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
dev->d_mac.ether.ether_addr_octet[0], dev->d_mac.ether.ether_addr_octet[1],
dev->d_mac.ether.ether_addr_octet[2], dev->d_mac.ether.ether_addr_octet[3],
dev->d_mac.ether.ether_addr_octet[4], dev->d_mac.ether.ether_addr_octet[5]);
/* Set the MAC address high register */
regval = ((uint32_t)dev->d_mac.ether_addr_octet[5] << 8) |
(uint32_t)dev->d_mac.ether_addr_octet[4];
regval = ((uint32_t)dev->d_mac.ether.ether_addr_octet[5] << 8) |
(uint32_t)dev->d_mac.ether.ether_addr_octet[4];
tiva_putreg(regval, TIVA_EMAC_ADDR0H);
/* Set the MAC address low register */
regval = ((uint32_t)dev->d_mac.ether_addr_octet[3] << 24) |
((uint32_t)dev->d_mac.ether_addr_octet[2] << 16) |
((uint32_t)dev->d_mac.ether_addr_octet[1] << 8) |
(uint32_t)dev->d_mac.ether_addr_octet[0];
regval = ((uint32_t)dev->d_mac.ether.ether_addr_octet[3] << 24) |
((uint32_t)dev->d_mac.ether.ether_addr_octet[2] << 16) |
((uint32_t)dev->d_mac.ether.ether_addr_octet[1] << 8) |
(uint32_t)dev->d_mac.ether.ether_addr_octet[0];
tiva_putreg(regval, TIVA_EMAC_ADDR0L);
}
@@ -4056,7 +4056,7 @@ int tiva_ethinitialize(int intf)
* is called (and the MAC can be overwritten with a netdev ioctl call).
*/
tiva_ethernetmac(&priv->dev.d_mac);
tiva_ethernetmac(&priv->dev.d_mac.ether);
#endif
/* Enable power and clocking to the Ethernet MAC
arch/avr/src/common/up_udelay.c
+1 -1
View File
@@ -75,7 +75,7 @@
* Description:
* Delay inline for the requested number of microseconds. NOTE: Because
* of all of the setup, several microseconds will be lost before the actual
* timing looop begins. Thus, the delay will always be a few microseconds
* timing loop begins. Thus, the delay will always be a few microseconds
* longer than requested.
*
* *** NOT multi-tasking friendly ***
arch/hc/src/common/up_udelay.c
+1 -1
View File
@@ -75,7 +75,7 @@
* Description:
* Delay inline for the requested number of microseconds. NOTE: Because
* of all of the setup, several microseconds will be lost before the actual
* timing looop begins. Thus, the delay will always be a few microseconds
* timing loop begins. Thus, the delay will always be a few microseconds
* longer than requested.
*
* *** NOT multi-tasking friendly ***
arch/hc/src/m9s12/m9s12_ethernet.c
+1 -1
View File
@@ -781,7 +781,7 @@ int emac_initialize(int intf)
* the device and/or calling emac_ifdown().
*/
/* Read the MAC address from the hardware into priv->d_dev.d_mac.ether_addr_octet */
/* Read the MAC address from the hardware into priv->d_dev.d_mac.ether.ether_addr_octet */
/* Register the device with the OS so that socket IOCTLs can be performed */
arch/mips/src/common/up_udelay.c
+1 -1
View File
@@ -75,7 +75,7 @@
* Description:
* Delay inline for the requested number of microseconds. NOTE: Because
* of all of the setup, several microseconds will be lost before the actual
* timing looop begins. Thus, the delay will always be a few microseconds
* timing loop begins. Thus, the delay will always be a few microseconds
* longer than requested.
*
* *** NOT multi-tasking friendly ***
arch/mips/src/pic32mx/pic32mx-ethernet.c
+12 -12
View File
@@ -2216,29 +2216,29 @@ static int pic32mx_ifup(struct net_driver_s *dev)
*/
#if 0
regval = (uint32_t)priv->pd_dev.d_mac.ether_addr_octet[5] << 8 |
(uint32_t)priv->pd_dev.d_mac.ether_addr_octet[4];
regval = (uint32_t)priv->pd_dev.d_mac.ether.ether_addr_octet[5] << 8 |
(uint32_t)priv->pd_dev.d_mac.ether.ether_addr_octet[4];
pic32mx_putreg(regval, PIC32MX_EMAC1_SA0);
regval = (uint32_t)priv->pd_dev.d_mac.ether_addr_octet[3] << 8 |
(uint32_t)priv->pd_dev.d_mac.ether_addr_octet[2];
regval = (uint32_t)priv->pd_dev.d_mac.ether.ether_addr_octet[3] << 8 |
(uint32_t)priv->pd_dev.d_mac.ether.ether_addr_octet[2];
pic32mx_putreg(regval, PIC32MX_EMAC1_SA1);
regval = (uint32_t)priv->pd_dev.d_mac.ether_addr_octet[1] << 8 |
(uint32_t)priv->pd_dev.d_mac.ether_addr_octet[0];
regval = (uint32_t)priv->pd_dev.d_mac.ether.ether_addr_octet[1] << 8 |
(uint32_t)priv->pd_dev.d_mac.ether.ether_addr_octet[0];
pic32mx_putreg(regval, PIC32MX_EMAC1_SA2);
#else
regval = pic32mx_getreg(PIC32MX_EMAC1_SA0);
priv->pd_dev.d_mac.ether_addr_octet[4] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether_addr_octet[5] = (uint32_t)((regval >> 8) & 0xff);
priv->pd_dev.d_mac.ether.ether_addr_octet[4] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether.ether_addr_octet[5] = (uint32_t)((regval >> 8) & 0xff);
regval = pic32mx_getreg(PIC32MX_EMAC1_SA1);
priv->pd_dev.d_mac.ether_addr_octet[2] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether_addr_octet[3] = (uint32_t)((regval >> 8) & 0xff);
priv->pd_dev.d_mac.ether.ether_addr_octet[2] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether.ether_addr_octet[3] = (uint32_t)((regval >> 8) & 0xff);
regval = pic32mx_getreg(PIC32MX_EMAC1_SA2);
priv->pd_dev.d_mac.ether_addr_octet[0] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether_addr_octet[1] = (uint32_t)((regval >> 8) & 0xff);
priv->pd_dev.d_mac.ether.ether_addr_octet[0] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether.ether_addr_octet[1] = (uint32_t)((regval >> 8) & 0xff);
#endif
/* Continue Ethernet Controller Initialization ****************************/
arch/mips/src/pic32mz/pic32mz-ethernet.c
+15 -15
View File
@@ -2243,34 +2243,34 @@ static int pic32mz_ifup(struct net_driver_s *dev)
*/
#if 0
regval = (uint32_t)priv->pd_dev.d_mac.ether_addr_octet[5] << 8 |
(uint32_t)priv->pd_dev.d_mac.ether_addr_octet[4];
regval = (uint32_t)priv->pd_dev.d_mac.ether.ether_addr_octet[5] << 8 |
(uint32_t)priv->pd_dev.d_mac.ether.ether_addr_octet[4];
pic32mz_putreg(regval, PIC32MZ_EMAC1_SA0);
regval = (uint32_t)priv->pd_dev.d_mac.ether_addr_octet[3] << 8 |
(uint32_t)priv->pd_dev.d_mac.ether_addr_octet[2];
regval = (uint32_t)priv->pd_dev.d_mac.ether.ether_addr_octet[3] << 8 |
(uint32_t)priv->pd_dev.d_mac.ether.ether_addr_octet[2];
pic32mz_putreg(regval, PIC32MZ_EMAC1_SA1);
regval = (uint32_t)priv->pd_dev.d_mac.ether_addr_octet[1] << 8 |
(uint32_t)priv->pd_dev.d_mac.ether_addr_octet[0];
regval = (uint32_t)priv->pd_dev.d_mac.ether.ether_addr_octet[1] << 8 |
(uint32_t)priv->pd_dev.d_mac.ether.ether_addr_octet[0];
pic32mz_putreg(regval, PIC32MZ_EMAC1_SA2);
#else
regval = pic32mz_getreg(PIC32MZ_EMAC1_SA0);
priv->pd_dev.d_mac.ether_addr_octet[4] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether_addr_octet[5] = (uint32_t)((regval >> 8) & 0xff);
priv->pd_dev.d_mac.ether.ether_addr_octet[4] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether.ether_addr_octet[5] = (uint32_t)((regval >> 8) & 0xff);
regval = pic32mz_getreg(PIC32MZ_EMAC1_SA1);
priv->pd_dev.d_mac.ether_addr_octet[2] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether_addr_octet[3] = (uint32_t)((regval >> 8) & 0xff);
priv->pd_dev.d_mac.ether.ether_addr_octet[2] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether.ether_addr_octet[3] = (uint32_t)((regval >> 8) & 0xff);
regval = pic32mz_getreg(PIC32MZ_EMAC1_SA2);
priv->pd_dev.d_mac.ether_addr_octet[0] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether_addr_octet[1] = (uint32_t)((regval >> 8) & 0xff);
priv->pd_dev.d_mac.ether.ether_addr_octet[0] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether.ether_addr_octet[1] = (uint32_t)((regval >> 8) & 0xff);
ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
dev->d_mac.ether.ether_addr_octet[0], dev->d_mac.ether.ether_addr_octet[1],
dev->d_mac.ether.ether_addr_octet[2], dev->d_mac.ether.ether_addr_octet[3],
dev->d_mac.ether.ether_addr_octet[4], dev->d_mac.ether.ether_addr_octet[5]);
#endif
/* Continue Ethernet Controller Initialization ****************************/
arch/misoc/src/common/misoc_net.c
+2 -2
View File
@@ -833,7 +833,7 @@ static int misoc_net_ifup(FAR struct net_driver_s *dev)
/* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
/* Instantiate the MAC address from priv->misoc_net_dev.d_mac.ether_addr_octet */
/* Instantiate the MAC address from priv->misoc_net_dev.d_mac.ether.ether_addr_octet */
#ifdef CONFIG_NET_ICMPv6
/* Set up IPv6 multicast address filtering */
@@ -1182,7 +1182,7 @@ int misoc_net_initialize(int intf)
*/
/* Read the MAC address from the hardware into
* priv->misoc_net_dev.d_mac.ether_addr_octet
* priv->misoc_net_dev.d_mac.ether.ether_addr_octet
*/
/* Register the device with the OS so that socket IOCTLs can be performed */
arch/misoc/src/common/misoc_udelay.c
+1 -1
View File
@@ -59,7 +59,7 @@
* Description:
* Delay inline for the requested number of microseconds. NOTE: Because
* of all of the setup, several microseconds will be lost before the actual
* timing looop begins. Thus, the delay will always be a few microseconds
* timing loop begins. Thus, the delay will always be a few microseconds
* longer than requested.
*
* *** NOT multi-tasking friendly ***
arch/renesas/src/common/up_udelay.c
+1 -1
View File
@@ -75,7 +75,7 @@
* Description:
* Delay inline for the requested number of microseconds. NOTE: Because
* of all of the setup, several microseconds will be lost before the actual
* timing looop begins. Thus, the delay will always be a few microseconds
* timing loop begins. Thus, the delay will always be a few microseconds
* longer than requested.
*
* *** NOT multi-tasking friendly ***
arch/sim/src/up_netdriver.c
+2 -2
View File
@@ -198,7 +198,7 @@ void netdriver_loop(void)
* up_comparemac will always return 0.
*/
is_ours = (up_comparemac(eth->dest, &g_sim_dev.d_mac) == 0);
is_ours = (up_comparemac(eth->dest, &g_sim_dev.d_mac.ether) == 0);
#ifdef CONFIG_NET_PKT
/* When packet sockets are enabled, feed the frame into the packet
@@ -359,7 +359,7 @@ int netdriver_init(void)
int netdriver_setmacaddr(unsigned char *macaddr)
{
(void)memcpy(g_sim_dev.d_mac.ether_addr_octet, macaddr, IFHWADDRLEN);
(void)memcpy(g_sim_dev.d_mac.ether.ether_addr_octet, macaddr, IFHWADDRLEN);
return 0;
}
arch/x86/src/common/up_udelay.c
+1 -1
View File
@@ -75,7 +75,7 @@
* Description:
* Delay inline for the requested number of microseconds. NOTE: Because
* of all of the setup, several microseconds will be lost before the actual
* timing looop begins. Thus, the delay will always be a few microseconds
* timing loop begins. Thus, the delay will always be a few microseconds
* longer than requested.
*
* *** NOT multi-tasking friendly ***
arch/xtensa/src/common/xtensa_udelay.c
+1 -1
View File
@@ -59,7 +59,7 @@
* Description:
* Delay inline for the requested number of microseconds. NOTE: Because
* of all of the setup, several microseconds will be lost before the actual
* timing looop begins. Thus, the delay will always be a few microseconds
* timing loop begins. Thus, the delay will always be a few microseconds
* longer than requested.
*
* *** NOT multi-tasking friendly ***
arch/z16/src/common/up_udelay.c
+1 -1
View File
@@ -77,7 +77,7 @@
* Description:
* Delay inline for the requested number of microseconds. NOTE: Because
* of all of the setup, several microseconds will be lost before the actual
* timing looop begins. Thus, the delay will always be a few microseconds
* timing loop begins. Thus, the delay will always be a few microseconds
* longer than requested.
*
* *** NOT multi-tasking friendly ***
arch/z80/src/common/up_udelay.c
+1 -1
View File
@@ -77,7 +77,7 @@
* Description:
* Delay inline for the requested number of microseconds. NOTE: Because
* of all of the setup, several microseconds will be lost before the actual
* timing looop begins. Thus, the delay will always be a few microseconds
* timing loop begins. Thus, the delay will always be a few microseconds
* longer than requested.
*
* *** NOT multi-tasking friendly ***
arch/z80/src/ez80/ez80_emac.c
+10 -10
View File
@@ -1999,9 +1999,9 @@ static int ez80emac_ifup(FAR struct net_driver_s *dev)
int ret;
ninfo("Bringing up: MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
dev->d_mac.ether.ether_addr_octet[0], dev->d_mac.ether.ether_addr_octet[1],
dev->d_mac.ether.ether_addr_octet[2], dev->d_mac.ether.ether_addr_octet[3],
dev->d_mac.ether.ether_addr_octet[4], dev->d_mac.ether.ether_addr_octet[5]);
ninfo(" IP %d.%d.%d.%d\n",
dev->d_ipaddr >> 24, (dev->d_ipaddr >> 16) & 0xff,
(dev->d_ipaddr >> 8) & 0xff, dev->d_ipaddr & 0xff);
@@ -2028,12 +2028,12 @@ static int ez80emac_ifup(FAR struct net_driver_s *dev)
/* Set the MAC address */
outp(EZ80_EMAC_STAD_0, priv->dev.d_mac.ether_addr_octet[0]);
outp(EZ80_EMAC_STAD_1, priv->dev.d_mac.ether_addr_octet[1]);
outp(EZ80_EMAC_STAD_2, priv->dev.d_mac.ether_addr_octet[2]);
outp(EZ80_EMAC_STAD_3, priv->dev.d_mac.ether_addr_octet[3]);
outp(EZ80_EMAC_STAD_4, priv->dev.d_mac.ether_addr_octet[4]);
outp(EZ80_EMAC_STAD_5, priv->dev.d_mac.ether_addr_octet[5]);
outp(EZ80_EMAC_STAD_0, priv->dev.d_mac.ether.ether_addr_octet[0]);
outp(EZ80_EMAC_STAD_1, priv->dev.d_mac.ether.ether_addr_octet[1]);
outp(EZ80_EMAC_STAD_2, priv->dev.d_mac.ether.ether_addr_octet[2]);
outp(EZ80_EMAC_STAD_3, priv->dev.d_mac.ether.ether_addr_octet[3]);
outp(EZ80_EMAC_STAD_4, priv->dev.d_mac.ether.ether_addr_octet[4]);
outp(EZ80_EMAC_STAD_5, priv->dev.d_mac.ether.ether_addr_octet[5]);
/* Enable/disable promiscuous mode */
@@ -2542,7 +2542,7 @@ int up_netinitialize(void)
priv->txpoll = wd_create(); /* Create periodic poll timer */
priv->txtimeout = wd_create(); /* Create TX timeout timer */
/* Read the MAC address from the hardware into priv->dev.d_mac.ether_addr_octet */
/* Read the MAC address from the hardware into priv->dev.d_mac.ether.ether_addr_octet */
/* Register the device with the OS so that socket IOCTLs can be performed */
drivers/net/cs89x0.c
+1 -1
View File
@@ -1006,7 +1006,7 @@ int cs89x0_initialize(FAR const cs89x0_driver_s *cs89x0, int devno)
cs89x0->cs_txpoll = wd_create(); /* Create periodic poll timer */
cs89x0->cs_txtimeout = wd_create(); /* Create TX timeout timer */
/* Read the MAC address from the hardware into cs89x0->cs_dev.d_mac.ether_addr_octet */
/* Read the MAC address from the hardware into cs89x0->cs_dev.d_mac.ether.ether_addr_octet */
/* Register the device with the OS so that socket IOCTLs can be performed */
drivers/net/dm90x0.c
+1 -1
View File
@@ -1955,7 +1955,7 @@ int dm9x_initialize(void)
/* Read the MAC address */
mptr = g_dm9x[0].dm_dev.d_mac.ether_addr_octet;
mptr = g_dm9x[0].dm_dev.d_mac.ether.ether_addr_octet;
for (i = 0, j = DM9X_PAB0; i < ETHER_ADDR_LEN; i++, j++)
{
mptr[i] = getreg(j);
drivers/net/enc28j60.c
+6 -6
View File
@@ -2440,12 +2440,12 @@ static void enc_setmacaddr(FAR struct enc_driver_s *priv)
* MAADR6 MAC Address Byte 6 (MAADR<7:0>)
*/
enc_wrbreg(priv, ENC_MAADR1, priv->dev.d_mac.ether_addr_octet[0]);
enc_wrbreg(priv, ENC_MAADR2, priv->dev.d_mac.ether_addr_octet[1]);
enc_wrbreg(priv, ENC_MAADR3, priv->dev.d_mac.ether_addr_octet[2]);
enc_wrbreg(priv, ENC_MAADR4, priv->dev.d_mac.ether_addr_octet[3]);
enc_wrbreg(priv, ENC_MAADR5, priv->dev.d_mac.ether_addr_octet[4]);
enc_wrbreg(priv, ENC_MAADR6, priv->dev.d_mac.ether_addr_octet[5]);
enc_wrbreg(priv, ENC_MAADR1, priv->dev.d_mac.ether.ether_addr_octet[0]);
enc_wrbreg(priv, ENC_MAADR2, priv->dev.d_mac.ether.ether_addr_octet[1]);
enc_wrbreg(priv, ENC_MAADR3, priv->dev.d_mac.ether.ether_addr_octet[2]);
enc_wrbreg(priv, ENC_MAADR4, priv->dev.d_mac.ether.ether_addr_octet[3]);
enc_wrbreg(priv, ENC_MAADR5, priv->dev.d_mac.ether.ether_addr_octet[4]);
enc_wrbreg(priv, ENC_MAADR6, priv->dev.d_mac.ether.ether_addr_octet[5]);
}
/****************************************************************************
drivers/net/encx24j600.c
+3 -3
View File
@@ -2591,7 +2591,7 @@ static void enc_pwrsave(FAR struct enc_driver_s *priv)
static void enc_ldmacaddr(FAR struct enc_driver_s *priv)
{
uint16_t regval;
uint8_t *mac = priv->dev.d_mac.ether_addr_octet;
uint8_t *mac = priv->dev.d_mac.ether.ether_addr_octet;
ninfo("Using ENCX24J600's built in MAC address\n");
@@ -2629,12 +2629,12 @@ static void enc_ldmacaddr(FAR struct enc_driver_s *priv)
static void enc_setmacaddr(FAR struct enc_driver_s *priv)
{
uint8_t *mac = priv->dev.d_mac.ether_addr_octet;
uint8_t *mac = priv->dev.d_mac.ether.ether_addr_octet;
struct ether_addr zmac;
memset(&zmac, 0, sizeof(zmac));
if (memcmp(&priv->dev.d_mac, &zmac, sizeof(zmac)) == 0)
if (memcmp(&priv->dev.d_mac.ether, &zmac, sizeof(zmac)) == 0)
{
/* No user defined MAC address. Read it from the device. */
drivers/net/ftmac100.c
+4 -4
View File
@@ -1185,9 +1185,9 @@ static int ftmac100_ifup(struct net_driver_s *dev)
ftmac100_init(priv);
/* Instantiate the MAC address from priv->ft_dev.d_mac.ether_addr_octet */
/* Instantiate the MAC address from priv->ft_dev.d_mac.ether.ether_addr_octet */
ftmac100_set_mac(priv, priv->ft_dev.d_mac.ether_addr_octet);
ftmac100_set_mac(priv, priv->ft_dev.d_mac.ether.ether_addr_octet);
#ifdef CONFIG_NET_ICMPv6
/* Set up IPv6 multicast address filtering */
@@ -1566,9 +1566,9 @@ int ftmac100_initialize(int intf)
*/
ftmac100_reset(priv);
/* Read the MAC address from the hardware into priv->ft_dev.d_mac.ether_addr_octet */
/* Read the MAC address from the hardware into priv->ft_dev.d_mac.ether.ether_addr_octet */
memcpy(priv->ft_dev.d_mac.ether_addr_octet, (void *)(CONFIG_FTMAC100_MAC0_ENV_ADDR), 6);
memcpy(priv->ft_dev.d_mac.ether.ether_addr_octet, (void *)(CONFIG_FTMAC100_MAC0_ENV_ADDR), 6);
/* Register the device with the OS so that socket IOCTLs can be performed */
drivers/net/skeleton.c
+2 -2
View File
@@ -803,7 +803,7 @@ static int skel_ifup(FAR struct net_driver_s *dev)
/* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
/* Instantiate the MAC address from priv->sk_dev.d_mac.ether_addr_octet */
/* Instantiate the MAC address from priv->sk_dev.d_mac.ether.ether_addr_octet */
#ifdef CONFIG_NET_ICMPv6
/* Set up IPv6 multicast address filtering */
@@ -1187,7 +1187,7 @@ int skel_initialize(int intf)
* the device and/or calling skel_ifdown().
*/
/* Read the MAC address from the hardware into priv->sk_dev.d_mac.ether_addr_octet */
/* Read the MAC address from the hardware into priv->sk_dev.d_mac.ether.ether_addr_octet */
/* Register the device with the OS so that socket IOCTLs can be performed */
drivers/net/tun.c
+1 -1
View File
@@ -631,7 +631,7 @@ static int tun_ifup(struct net_driver_s *dev)
/* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
/* Instantiate the MAC address from priv->dev.d_mac.ether_addr_octet */
/* Instantiate the MAC address from priv->dev.d_mac.ether.ether_addr_octet */
#ifdef CONFIG_NET_ICMPv6
/* Set up IPv6 multicast address filtering */
include/nuttx/net/ieee802154.h
+138
View File
@@ -0,0 +1,138 @@
/****************************************************************************
* include/nuttx/net/ieee802154.h
*
* Copyright (C) 2017, Gregory Nutt, all rights reserved
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Derives from Contiki:
*
* Copyright (c) 2008, Swedish Institute of Computer Science.
* All rights reserved.
* Authors: Adam Dunkels <adam@sics.se>
* Nicolas Tsiftes <nvt@sics.se>
* Niclas Finne <nfi@sics.se>
* Mathilde Durvy <mdurvy@cisco.com>
* Julien Abeille <jabeille@cisco.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************/
#ifndef __INCLUDE_NUTTX_NET_IEEE802154_H
#define __INCLUDE_NUTTX_NET_IEEE802154_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#ifdef CONFIG_NET_6LOWPAN
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* By default, a 2-byte Rime address is used for the IEEE802.15.4 MAC
* device's link layer address. If CONFIG_NET_6LOWPAN_RIMEADDR_EXTENDED
* is selected, then an 8-byte Rime address will be used.
*/
#ifdef CONFIG_NET_6LOWPAN_RIMEADDR_EXTENDED
# define NET_6LOWPAN_RIMEADDR_SIZE 8
#else
# define NET_6LOWPAN_RIMEADDR_SIZE 2
#endif
/* Frame format definitions *************************************************/
/* These are some definitions of element values used in the FCF. See the
* IEEE802.15.4 spec for details.
*/
#define FRAME802154_FRAMETYPE_SHIFT (0) /* Bits 0-2: Frame type */
#define FRAME802154_FRAMETYPE_MASK (7 << FRAME802154_FRAMETYPE_SHIFT)
#define FRAME802154_SECENABLED_SHIFT (3) /* Bit 3: Security enabled */
#define FRAME802154_FRAMEPENDING_SHIFT (4) /* Bit 4: Frame pending */
#define FRAME802154_ACKREQUEST_SHIFT (5) /* Bit 5: ACK request */
#define FRAME802154_PANIDCOMP_SHIFT (6) /* Bit 6: PANID compression */
/* Bits 7-9: Reserved */
#define FRAME802154_DSTADDR_SHIFT (2) /* Bits 10-11: Dest address mode */
#define FRAME802154_DSTADDR_MASK (3 << FRAME802154_DSTADDR_SHIFT)
#define FRAME802154_VERSION_SHIFT (4) /* Bit 12-13: Frame version */
#define FRAME802154_VERSION_MASK (3 << FRAME802154_VERSION_SHIFT)
#define FRAME802154_SRCADDR_SHIFT (6) /* Bits 14-15: Source address mode */
#define FRAME802154_SRCADDR_MASK (3 << FRAME802154_SRCADDR_SHIFT)
/* Unshifted values for use in struct frame802154_fcf_s */
#define FRAME802154_BEACONFRAME (0)
#define FRAME802154_DATAFRAME (1)
#define FRAME802154_ACKFRAME (2)
#define FRAME802154_CMDFRAME (3)
#define FRAME802154_BEACONREQ (7)
#define FRAME802154_IEEERESERVED (0)
#define FRAME802154_NOADDR (0) /* Only valid for ACK or Beacon frames */
#define FRAME802154_SHORTADDRMODE (2)
#define FRAME802154_LONGADDRMODE (3)
#define FRAME802154_NOBEACONS 0x0f
#define FRAME802154_BROADCASTADDR 0xffff
#define FRAME802154_BROADCASTPANDID 0xffff
#define FRAME802154_IEEE802154_2003 (0)
#define FRAME802154_IEEE802154_2006 (1)
#define FRAME802154_SECURITY_LEVEL_NONE (0)
#define FRAME802154_SECURITY_LEVEL_128 (3)
/* This maximum size of an IEEE802.15.4 frame. Certain, non-standard
* devices may exceed this value, however.
*/
#define SIXLOWPAN_MAC_STDFRAME 127
/****************************************************************************
* Public Types
****************************************************************************/
/* Rime address representation */
struct rimeaddr_s
{
uint8_t u8[NET_6LOWPAN_RIMEADDR_SIZE];
};
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#endif /* CONFIG_NET_6LOWPAN */
#endif /* __INCLUDE_NUTTX_NET_IEEE802154_H */
include/nuttx/net/netdev.h
+21 -5
View File
@@ -56,12 +56,16 @@
#include <net/ethernet.h>
#include <arpa/inet.h>
#include <nuttx/net/netconfig.h>
#include <nuttx/net/ip.h>
#ifdef CONFIG_NET_IGMP
# include <nuttx/net/igmp.h>
#endif
#include <nuttx/net/netconfig.h>
#include <nuttx/net/ip.h>
#ifdef CONFIG_NET_6LOWPAN
# include <nuttx/net/ieee802154.h>
#endif
/****************************************************************************
* Pre-processor Definitions
@@ -207,10 +211,22 @@ struct net_driver_s
#endif
#endif
#ifdef CONFIG_NET_ETHERNET
/* Ethernet device identity */
#if defined(CONFIG_NET_ETHERNET) || defined(CONFIG_NET_6LOWPAN)
/* Link layer address */
struct ether_addr d_mac; /* Device MAC address */
union
{
#ifdef CONFIG_NET_ETHERNET
/* Ethernet device identity */
struct ether_addr ether; /* Device Ethernet MAC address */
#endif
#ifdef CONFIG_NET_6LOWPAN
/* The address assigned to an IEEE 802.15.4 radio. */
struct rimeaddr_s ieee802154; /* IEEE 802.15.4 Radio address */
#endif
} d_mac;
#endif
/* Network identity */
include/nuttx/net/sixlowpan.h
+3 -75
View File
@@ -56,6 +56,7 @@
#include <nuttx/clock.h>
#include <nuttx/drivers/iob.h>
#include <nuttx/net/netdev.h>
#include <nuttx/net/ieee802154.h>
#ifdef CONFIG_NET_6LOWPAN
@@ -63,17 +64,6 @@
* Pre-processor Definitions
****************************************************************************/
/* By default, a 2-byte Rime address is used for the IEEE802.15.4 MAC
* device's link layer address. If CONFIG_NET_6LOWPAN_RIMEADDR_EXTENDED
* is selected, then an 8-byte Rime address will be used.
*/
#ifdef CONFIG_NET_6LOWPAN_RIMEADDR_EXTENDED
# define NET_6LOWPAN_RIMEADDR_SIZE 8
#else
# define NET_6LOWPAN_RIMEADDR_SIZE 2
#endif
/* Frame format definitions *************************************************/
/* Fragment header.
*
@@ -108,49 +98,6 @@
#define RIME_HC1_HC_UDP_PORTS 4 /* 8 bit */
#define RIME_HC1_HC_UDP_CHKSUM 5 /* 16 bit */
/* These are some definitions of element values used in the FCF. See the
* IEEE802.15.4 spec for details.
*/
#define FRAME802154_FRAMETYPE_SHIFT (0) /* Bits 0-2: Frame type */
#define FRAME802154_FRAMETYPE_MASK (7 << FRAME802154_FRAMETYPE_SHIFT)
#define FRAME802154_SECENABLED_SHIFT (3) /* Bit 3: Security enabled */
#define FRAME802154_FRAMEPENDING_SHIFT (4) /* Bit 4: Frame pending */
#define FRAME802154_ACKREQUEST_SHIFT (5) /* Bit 5: ACK request */
#define FRAME802154_PANIDCOMP_SHIFT (6) /* Bit 6: PANID compression */
/* Bits 7-9: Reserved */
#define FRAME802154_DSTADDR_SHIFT (2) /* Bits 10-11: Dest address mode */
#define FRAME802154_DSTADDR_MASK (3 << FRAME802154_DSTADDR_SHIFT)
#define FRAME802154_VERSION_SHIFT (4) /* Bit 12-13: Frame version */
#define FRAME802154_VERSION_MASK (3 << FRAME802154_VERSION_SHIFT)
#define FRAME802154_SRCADDR_SHIFT (6) /* Bits 14-15: Source address mode */
#define FRAME802154_SRCADDR_MASK (3 << FRAME802154_SRCADDR_SHIFT)
/* Unshifted values for use in struct frame802154_fcf_s */
#define FRAME802154_BEACONFRAME (0)
#define FRAME802154_DATAFRAME (1)
#define FRAME802154_ACKFRAME (2)
#define FRAME802154_CMDFRAME (3)
#define FRAME802154_BEACONREQ (7)
#define FRAME802154_IEEERESERVED (0)
#define FRAME802154_NOADDR (0) /* Only valid for ACK or Beacon frames */
#define FRAME802154_SHORTADDRMODE (2)
#define FRAME802154_LONGADDRMODE (3)
#define FRAME802154_NOBEACONS 0x0f
#define FRAME802154_BROADCASTADDR 0xffff
#define FRAME802154_BROADCASTPANDID 0xffff
#define FRAME802154_IEEE802154_2003 (0)
#define FRAME802154_IEEE802154_2006 (1)
#define FRAME802154_SECURITY_LEVEL_NONE (0)
#define FRAME802154_SECURITY_LEVEL_128 (3)
/* Min and Max compressible UDP ports - HC06 */
#define SIXLOWPAN_UDP_4_BIT_PORT_MIN 0xf0b0
@@ -261,12 +208,6 @@
#define SIXLOWPAN_FRAG1_HDR_LEN 4
#define SIXLOWPAN_FRAGN_HDR_LEN 5
/* This maximum size of an IEEE802.15.4 frame. Certain, non-standard
* devices may exceed this value, however.
*/
#define SIXLOWPAN_MAC_STDFRAME 127
/* Address compressibility test macros **************************************/
/* Check whether we can compress the IID in address 'a' to 16 bits. This is
@@ -389,13 +330,6 @@
* Public Types
****************************************************************************/
/* Rime address representation */
struct rimeaddr_s
{
uint8_t u8[NET_6LOWPAN_RIMEADDR_SIZE];
};
/* The device structure for IEEE802.15.4 MAC network device differs from the
* standard Ethernet MAC device structure. The main reason for this
* difference is that fragmentation must be supported.
@@ -432,9 +366,7 @@ struct rimeaddr_s
* 2. i_dsn must be set to a random value. After that, it will be managed
* by the network.
*
* 3. i_nodeaddr must be set after the MAC is assigned an address.
*
* 4. On a TX poll, the IEEE802.15.4 MAC driver should provide its driver
* 3. On a TX poll, the IEEE802.15.4 MAC driver should provide its driver
* structure with i_framelist set to NULL. At the conclusion of the
* poll, if there are frames to be sent, they will have been added to
* the i_framelist. The non-empty frame list at the conclusion of the
@@ -449,7 +381,7 @@ struct rimeaddr_s
* After sending each frame, the driver must return the IOB to the pool
* of free IOBs using the FROM_IOB_FREE() macro.
*
* 5. When receiving data both buffers must be provided:
* 4. When receiving data both buffers must be provided:
*
* The IEEE802.15.4 MAC driver should receive the frame data directly
* into the payload area of an IOB structure. That IOB structure may be
@@ -510,10 +442,6 @@ struct ieee802154_driver_s
uint16_t i_panid;
/* i_node_addr. The address assigned to this node. */
struct rimeaddr_s i_nodeaddr;
/* i_dsn. The sequence number in the range 0x00-0xff added to the
* transmitted data or MAC command frame. The default is a random value
* within that range.
net/arp/arp_arpin.c
+2 -2
View File
@@ -124,8 +124,8 @@ void arp_arpin(FAR struct net_driver_s *dev)
arp->ah_opcode = HTONS(ARP_REPLY);
memcpy(arp->ah_dhwaddr, arp->ah_shwaddr, ETHER_ADDR_LEN);
memcpy(arp->ah_shwaddr, dev->d_mac.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(eth->src, dev->d_mac.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(arp->ah_shwaddr, dev->d_mac.ether.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(eth->src, dev->d_mac.ether.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(eth->dest, arp->ah_dhwaddr, ETHER_ADDR_LEN);
arp->ah_dipaddr[0] = arp->ah_sipaddr[0];
net/arp/arp_format.c
+2 -2
View File
@@ -90,8 +90,8 @@ void arp_format(FAR struct net_driver_s *dev, in_addr_t ipaddr)
memset(eth->dest, 0xff, ETHER_ADDR_LEN);
memset(arp->ah_dhwaddr, 0x00, ETHER_ADDR_LEN);
memcpy(eth->src, dev->d_mac.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(arp->ah_shwaddr, dev->d_mac.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(eth->src, dev->d_mac.ether.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(arp->ah_shwaddr, dev->d_mac.ether.ether_addr_octet, ETHER_ADDR_LEN);
net_ipv4addr_hdrcopy(arp->ah_dipaddr, &ipaddr);
net_ipv4addr_hdrcopy(arp->ah_sipaddr, &dev->d_ipaddr);
net/arp/arp_out.c
+1 -1
View File
@@ -249,7 +249,7 @@ void arp_out(FAR struct net_driver_s *dev)
/* Finish populating the Ethernet header */
memcpy(peth->src, dev->d_mac.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(peth->src, dev->d_mac.ether.ether_addr_octet, ETHER_ADDR_LEN);
peth->type = HTONS(ETHTYPE_IP);
dev->d_len += ETH_HDRLEN;
}
net/icmpv6/icmpv6_advertise.c
+2 -2
View File
@@ -139,7 +139,7 @@ void icmpv6_advertise(FAR struct net_driver_s *dev,
* REVISIT: What if the link layer is not Ethernet?
*/
memcpy(adv->tgtlladdr, &dev->d_mac, IFHWADDRLEN);
memcpy(adv->tgtlladdr, &dev->d_mac.ether, IFHWADDRLEN);
/* Calculate the checksum over both the ICMP header and payload */
@@ -166,7 +166,7 @@ void icmpv6_advertise(FAR struct net_driver_s *dev,
FAR struct eth_hdr_s *eth = ETHBUF;
memcpy(eth->dest, eth->src, ETHER_ADDR_LEN);
memcpy(eth->src, dev->d_mac.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(eth->src, dev->d_mac.ether.ether_addr_octet, ETHER_ADDR_LEN);
/* Set the IPv6 Ethernet type */
net/icmpv6/icmpv6_autoconfig.c
+1 -1
View File
@@ -402,7 +402,7 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
lladdr[0] = HTONS(0xfe80); /* 10-bit address + 6 zeroes */
memset(&lladdr[1], 0, 4 * sizeof(uint16_t)); /* 64 more zeroes */
memcpy(&lladdr[5], dev->d_mac.ether_addr_octet,
memcpy(&lladdr[5], dev->d_mac.ether.ether_addr_octet,
sizeof(struct ether_addr)); /* 48-bit Ethernet address */
ninfo("lladdr=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
net/icmpv6/icmpv6_radvertise.c
+2 -2
View File
@@ -176,7 +176,7 @@ void icmpv6_radvertise(FAR struct net_driver_s *dev)
srcaddr = &adv->srcaddr;
srcaddr->opttype = ICMPv6_OPT_SRCLLADDR;
srcaddr->optlen = 1;
memcpy(srcaddr->srclladdr, &dev->d_mac.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(srcaddr->srclladdr, &dev->d_mac.ether.ether_addr_octet, ETHER_ADDR_LEN);
/* Set up the MTU option */
@@ -228,7 +228,7 @@ void icmpv6_radvertise(FAR struct net_driver_s *dev)
FAR struct eth_hdr_s *eth = ETHBUF;
memcpy(eth->dest, g_ipv6_ethallnodes.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(eth->src, dev->d_mac.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(eth->src, dev->d_mac.ether.ether_addr_octet, ETHER_ADDR_LEN);
/* Set the IPv6 Ethernet type */
net/icmpv6/icmpv6_rsolicit.c
+2 -2
View File
@@ -137,7 +137,7 @@ void icmpv6_rsolicit(FAR struct net_driver_s *dev)
* REVISIT: What if the link layer is not Ethernet?
*/
memcpy(sol->srclladdr, dev->d_mac.ether_addr_octet, sizeof(net_ipv6addr_t));
memcpy(sol->srclladdr, dev->d_mac.ether.ether_addr_octet, sizeof(net_ipv6addr_t));
/* Calculate the checksum over both the ICMP header and payload */
@@ -162,7 +162,7 @@ void icmpv6_rsolicit(FAR struct net_driver_s *dev)
/* Move our source Ethernet addresses into the Ethernet header */
memcpy(eth->src, dev->d_mac.ether_addr_octet, ETHER_ADDR_LEN);
memcpy(eth->src, dev->d_mac.ether.ether_addr_octet, ETHER_ADDR_LEN);
/* Set the IPv6 Ethernet type */

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