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https://github.com/apache/nuttx.git
synced 2026-05-16 13:56:00 +08:00
PIC32MZ: Add logic to configure peripheral pins for the selecte UARTs
This commit is contained in:
Gregory Nutt
@@ -73,8 +73,8 @@
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* extract one or the other.
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*/
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#define PPS_OUTPUT_REGADDR(a,b) (b)
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#define PPS_OTUPUT_REVAL(a,b) (a)
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#define PPS_OUTPUT_REGADDR(a,b) ((uintptr_t)(b))
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#define PPS_OUTPUT_REGVAL(a,b) ((uint32_t(a))
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/********************************************************************************************
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* Public Types
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@@ -79,13 +79,13 @@
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# define PIC32MZ_U4RXR_OFFSET 0x1480
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# define PIC32MZ_U5RXR_OFFSET 0x1488
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# define PIC32MZ_U6RXR_OFFSET 0x1490
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#define PIC32MZ_UnTSR_OFFSET(n) (0x1464 + ((n << 3)) /* n=1..6 */
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# define PIC32MZ_U1TSR_OFFSET 0x146c
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# define PIC32MZ_U2TSR_OFFSET 0x1474
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# define PIC32MZ_U3TSR_OFFSET 0x147c
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# define PIC32MZ_U4TSR_OFFSET 0x1484
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# define PIC32MZ_U5TSR_OFFSET 0x148c
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# define PIC32MZ_U6TSR_OFFSET 0x1494
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#define PIC32MZ_UnCTSR_OFFSET(n) (0x1464 + ((n << 3)) /* n=1..6 */
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# define PIC32MZ_U1CTSR_OFFSET 0x146c
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# define PIC32MZ_U2CTSR_OFFSET 0x1474
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# define PIC32MZ_U3CTSR_OFFSET 0x147c
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# define PIC32MZ_U4CTSR_OFFSET 0x1484
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# define PIC32MZ_U5CTSR_OFFSET 0x148c
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# define PIC32MZ_U6CTSR_OFFSET 0x1494
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#define PIC32MZ_SDInR_OFFSET(n) (0x1490 + 12*(n)) /* n=1..6 */
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# define PIC32MZ_SDI1R_OFFSET 0x149c
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# define PIC32MZ_SDI2R_OFFSET 0x14a8
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@@ -208,13 +208,13 @@
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# define PIC32MZ_U4RXR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U4RXR_OFFSET)
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# define PIC32MZ_U5RXR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U5RXR_OFFSET)
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# define PIC32MZ_U6RXR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U6RXR_OFFSET)
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#define PIC32MZ_UnTSR(n) (PIC32MZ_IOPORT_K1BASE+PIC32MZ_UnTSR_OFFSET(n)
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# define PIC32MZ_U1TSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U1TSR_OFFSET)
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# define PIC32MZ_U2TSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U2TSR_OFFSET)
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# define PIC32MZ_U3TSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U3TSR_OFFSET)
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# define PIC32MZ_U4TSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U4TSR_OFFSET)
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# define PIC32MZ_U5TSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U5TSR_OFFSET)
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# define PIC32MZ_U6TSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U6TSR_OFFSET)
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#define PIC32MZ_UnCTSR(n) (PIC32MZ_IOPORT_K1BASE+PIC32MZ_UnCTSR_OFFSET(n)
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# define PIC32MZ_U1CTSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U1CTSR_OFFSET)
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# define PIC32MZ_U2CTSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U2CTSR_OFFSET)
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# define PIC32MZ_U3CTSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U3CTSR_OFFSET)
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# define PIC32MZ_U4CTSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U4CTSR_OFFSET)
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# define PIC32MZ_U5CTSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U5CTSR_OFFSET)
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# define PIC32MZ_U6CTSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U6CTSR_OFFSET)
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#define PIC32MZ_SDInR(n) (PIC32MZ_IOPORT_K1BASE+PIC32MZ_SDInR_OFFSET(n))
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# define PIC32MZ_SDI1R (PIC32MZ_IOPORT_K1BASE+PIC32MZ_SDI1R_OFFSET)
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# define PIC32MZ_SDI2R (PIC32MZ_IOPORT_K1BASE+PIC32MZ_SDI2R_OFFSET)
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@@ -43,13 +43,15 @@
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#include <debug.h>
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#include <arch/irq.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "up_internal.h"
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#include "pic32mz-config.h"
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#include "chip/pic32mz-uart.h"
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#include "chip/pic32mz-pps.h"
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#include <arch/board/board.h>
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/******************************************************************************
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* Pre-processor Definitions
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@@ -321,14 +323,151 @@ void pic32mz_uartconfigure(uintptr_t uart_base, uint32_t baudrate,
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*
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******************************************************************************/
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#ifdef HAVE_SERIAL_CONSOLE
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void pic32mz_consoleinit(void)
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{
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#ifdef HAVE_UART_DEVICE
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/* Setup up pin selection registers for all configured UARTs. The board.h
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* header file must provide these definitions to select the correct pin
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* configuration for each enabled UARt.
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*/
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#ifdef CONFIG_PIC32MZ_UART1
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/* Configure UART1 RX (input) and TX (output) pins */
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putreg32(BOARD_U1RX_PPS, PIC32MZ_U1RXR);
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putreg32(PPS_OUTPUT_REGVAL(BOARD_U1TX_PPS),
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PPS_OUTPUT_REGADDR(BOARD_U1TX_PPS));
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#ifdef CONFIG_UART1_OFLOWCONTROL
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/* Configure the UART1 CTS input pin */
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putreg32(BOARD_U1CTS_PPS, PIC32MZ_U1CTSR);
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#endif
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#ifdef CONFIG_UART1_IFLOWCONTROL
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/* Configure the UART1 RTS output pin */
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putreg32(PPS_OUTPUT_REGVAL(BOARD_U1RTS_PPS),
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PPS_OUTPUT_REGADDR(BOARD_U1RTS_PPS));
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#endif /* CONFIG_UART1_IFLOWCONTROL */
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#endif /* CONFIG_PIC32MZ_UART1 */
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#ifdef CONFIG_PIC32MZ_UART2
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/* Configure UART2 RX (input) and TX (output) pins */
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putreg32(BOARD_U2RX_PPS, PIC32MZ_U2RXR);
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putreg32(PPS_OUTPUT_REGVAL(BOARD_U2TX_PPS),
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PPS_OUTPUT_REGADDR(BOARD_U2TX_PPS));
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#ifdef CONFIG_UART2_OFLOWCONTROL
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/* Configure the UART2 CTS input pin */
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putreg32(BOARD_U2CTS_PPS, PIC32MZ_U2CTSR);
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#endif
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#ifdef CONFIG_UART2_IFLOWCONTROL
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/* Configure the UART2 RTS output pin */
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putreg32(PPS_OUTPUT_REGVAL(BOARD_U2RTS_PPS),
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PPS_OUTPUT_REGADDR(BOARD_U2RTS_PPS));
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#endif /* CONFIG_UART2_IFLOWCONTROL */
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#endif /* CONFIG_PIC32MZ_UART2 */
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#ifdef CONFIG_PIC32MZ_UART3
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/* Configure UART3 RX (input) and TX (output) pins */
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putreg32(BOARD_U3RX_PPS, PIC32MZ_U3RXR);
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putreg32(PPS_OUTPUT_REGVAL(BOARD_U3TX_PPS),
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PPS_OUTPUT_REGADDR(BOARD_U3TX_PPS));
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#ifdef CONFIG_UART3_OFLOWCONTROL
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/* Configure the UART3 CTS input pin */
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putreg32(BOARD_U3CTS_PPS, PIC32MZ_U3CTSR);
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#endif
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#ifdef CONFIG_UART3_IFLOWCONTROL
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/* Configure the UART3 RTS output pin */
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putreg32(PPS_OUTPUT_REGVAL(BOARD_U3RTS_PPS),
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PPS_OUTPUT_REGADDR(BOARD_U3RTS_PPS));
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#endif /* CONFIG_UART3_IFLOWCONTROL */
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#endif /* CONFIG_PIC32MZ_UART3 */
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#ifdef CONFIG_PIC32MZ_UART4
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/* Configure UART4 RX (input) and TX (output) pins */
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putreg32(BOARD_U4RX_PPS, PIC32MZ_U4RXR);
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putreg32(PPS_OUTPUT_REGVAL(BOARD_U4TX_PPS),
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PPS_OUTPUT_REGADDR(BOARD_U4TX_PPS));
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#ifdef CONFIG_UART4_OFLOWCONTROL
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/* Configure the UART4 CTS input pin */
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putreg32(BOARD_U4CTS_PPS, PIC32MZ_U4CTSR);
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#endif
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#ifdef CONFIG_UART4_IFLOWCONTROL
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/* Configure the UART4 RTS output pin */
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putreg32(PPS_OUTPUT_REGVAL(BOARD_U4RTS_PPS),
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PPS_OUTPUT_REGADDR(BOARD_U4RTS_PPS));
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#endif /* CONFIG_UART4_IFLOWCONTROL */
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#endif /* CONFIG_PIC32MZ_UART4 */
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#ifdef CONFIG_PIC32MZ_UART5
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/* Configure UART5 RX (input) and TX (output) pins */
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putreg32(BOARD_U5RX_PPS, PIC32MZ_U5RXR);
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putreg32(PPS_OUTPUT_REGVAL(BOARD_U5TX_PPS),
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PPS_OUTPUT_REGADDR(BOARD_U5TX_PPS));
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#ifdef CONFIG_UART5_OFLOWCONTROL
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/* Configure the UART5 CTS input pin */
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putreg32(BOARD_U5CTS_PPS, PIC32MZ_U5CTSR);
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#endif
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#ifdef CONFIG_UART5_IFLOWCONTROL
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/* Configure the UART5 RTS output pin */
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putreg32(PPS_OUTPUT_REGVAL(BOARD_U5RTS_PPS),
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PPS_OUTPUT_REGADDR(BOARD_U5RTS_PPS));
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#endif /* CONFIG_UART5_IFLOWCONTROL */
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#endif /* CONFIG_PIC32MZ_UART5 */
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#ifdef CONFIG_PIC32MZ_UART6
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/* Configure UART6 RX (input) and TX (output) pins */
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putreg32(BOARD_U6RX_PPS, PIC32MZ_U6RXR);
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putreg32(PPS_OUTPUT_REGVAL(BOARD_U6TX_PPS),
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PPS_OUTPUT_REGADDR(BOARD_U6TX_PPS));
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#ifdef CONFIG_UART6_OFLOWCONTROL
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/* Configure the UART6 CTS input pin */
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putreg32(BOARD_U6CTS_PPS, PIC32MZ_U6CTSR);
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#endif
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#ifdef CONFIG_UART6_IFLOWCONTROL
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/* Configure the UART6 RTS output pin */
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putreg32(PPS_OUTPUT_REGVAL(BOARD_U6RTS_PPS),
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PPS_OUTPUT_REGADDR(BOARD_U6RTS_PPS));
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#endif /* CONFIG_UART6_IFLOWCONTROL */
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#endif /* CONFIG_PIC32MZ_UART6 */
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#ifdef HAVE_SERIAL_CONSOLE
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/* Configure the console uart */
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pic32mz_uartconfigure(PIC32MZ_CONSOLE_BASE, PIC32MZ_CONSOLE_BAUD,
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PIC32MZ_CONSOLE_PARITY, PIC32MZ_CONSOLE_BITS,
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PIC32MZ_CONSOLE_2STOP);
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#endif /* HAVE_SERIAL_CONSOLE */
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#endif /* HAVE_UART_DEVICE */
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}
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#endif
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/******************************************************************************
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* Name: up_lowputc
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@@ -33,6 +33,14 @@ Key features of the PIC32MZ Starter Kit include;
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The PIC32MZ starter kit comes complete with a LAN8740 PHY daughter board.
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Testing was performed with the following additional hardware:
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- Microchip PIC32MZ Embedded Connectivity (EC) Adapter Board (AC320006)
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that allows connection of the PIC32MZEC Starter Kit to the Microchip
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Multimedia Expansion Board (MEB, DM320005) or PIC32 I/O Expansion Board
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(DM320002). These were previously used with the PIC32MX bringup.
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- Microchip Multimedia Expansion Board II (MEB II, DM320005-2).
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Contents
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========
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@@ -102,7 +110,44 @@ Creating Compatible NuttX HEX files
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Serial Console
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==============
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To be provided
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The Microchip PIC32MZ Embedded Connectivity (EC) Adapter Board (AC320006)
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brings out UART signals as follows:
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JP7 redirects J1 U3_TX to either J2 SOSCO/RC14 or U1_TX:
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Adapter
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-----------------------------------------------------------------------
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JP7, Pin 1: J2 Pin 32, SOSCO/RC14
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Pin 2: J1 Pin 17, U3_TX
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Pin 3: J2 Pin 90, U1_TX
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PIC32MZ Starter Kit
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-----------------------------------------------------------------------
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J1 Pin 17, SOSCO/RC14 PIC32MZ SOSCO/RPC14/T1CK/RC14
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RPC14 supports U1RX, U4RX, and U3TX
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JP8 redirects J1 RB3/AN3/SDO4/WIFI_SDI to either J2 AN3/SDO4/WIFI_SDI or U3_RX:
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Adapter PIC32MZ Starter Kit
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---------------------------------------------- -------------------------
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JP8, Pin 1: J2, Pin 66, AN3/SDO4/WIFI_SDI
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Pin 2: J1, Pin 105, RB3/AN3/SDO4/WIFI_SDI
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Pin 3: J2, Pin 88, U3_RX
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PIC32MZ Starter Kit
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-----------------------------------------------------------------------
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J1, Pin 105, AN3/C2INA/RPB3/RB3
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RPB3 supports U3RX, U1TX, and U5TX
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Thus UART1 or UART3 could be used as a serial console if only the
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PIC32MZEC Adapter Board is connected.
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The default serial configuration here in these configurations is UART1
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using RPC14 and RPB3. That UART selection can be change by running 'make
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menuconfig'. The UART pin selections would need to be changed by editing
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configs/pc32mz-starterkit/include/board.h.
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LEDs and Buttons
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================
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@@ -214,6 +214,17 @@
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* are grounded when pressed.
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*/
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/* UARTS ********************************************************************/
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/* If the PIC32MZEC Adaptor Board is connected, then UART1 signals are
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* available at these locations on the adaptor board:
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*
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* JP7 Pin 2: RPC14
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* JP8 Pin 2: RPB3
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*/
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#define BOARD_U1RX_PPS U1RXR_RPC14
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#define BOARD_U1TX_PPS U1TX_RPB3R
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/****************************************************************************
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* Public Types
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****************************************************************************/
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