mirror of
https://github.com/apache/nuttx.git
synced 2026-06-09 02:44:53 +08:00
Merged nuttx/nuttx into master
This commit is contained in:
Aleksandr Vyhovanec
@@ -1,4 +1,4 @@
|
||||
NuttX TODO List (Last updated November 19, 2016)
|
||||
NuttX TODO List (Last updated November 22, 2016)
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
This file summarizes known NuttX bugs, limitations, inconsistencies with
|
||||
@@ -10,7 +10,7 @@ issues related to each board port.
|
||||
nuttx/:
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||||
|
||||
(13) Task/Scheduler (sched/)
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||||
(2) SMP
|
||||
(1) SMP
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||||
(1) Memory Management (mm/)
|
||||
(1) Power Management (drivers/pm)
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||||
(3) Signals (sched/signal, arch/)
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||||
@@ -336,43 +336,6 @@ o SMP
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Priority: High. spinlocks, and hence SMP, will not work on such systems
|
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without this change.
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||||
Title: DEADLOCK SCENARIO WITH up_cpu_pause().
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||||
Description: I think there is a possibilty for a hang in up_cpu_pause().
|
||||
Suppose this situation:
|
||||
|
||||
- CPU1 is in a critical section and has the g_cpu_irqlock
|
||||
spinlock.
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||||
- CPU0 takes an interrupt and attempts to enter the critical
|
||||
section. It spins waiting on g_cpu_irqlock with interrupt
|
||||
disabled.
|
||||
- CPU1 calls up_cpu_pause() to pause operation on CPU1. This
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||||
will issue an inter-CPU interrupt to CPU0
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||||
- But interrupts are disabled. What will happen? I think
|
||||
that this is a deadlock: Interrupts will stay disabled on
|
||||
CPU0 because it is spinning in the interrupt handler;
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||||
up_cpu_pause() will hang becuase the inter-CPU interrupt
|
||||
is pending.
|
||||
|
||||
Are inter-CPU interrupts maskable in the same way as other
|
||||
interrupts? If the are not-maskable, then we must also handle
|
||||
them as nested interrupts in some fashion.
|
||||
|
||||
A work-around might be to check the state of other-CPU
|
||||
interrupt handler inside the spin loop of up_cpu_pause().
|
||||
Having the other CPU spinning and waiting for up_cpu_pause()
|
||||
provided that (1) the pending interrupt can be cleared, and
|
||||
(2) leave_critical_section() is not called prior to the point
|
||||
where up_cpu_resume() is called, and (3) up_cpu_resume() is
|
||||
smart enough to know that it should not attempt to resume a
|
||||
non-paused CPU.
|
||||
|
||||
This would require some kind of information about each
|
||||
interrupt handler: In an interrupt, waiting for spinlock,
|
||||
have spinlock, etc.
|
||||
|
||||
Status: Open
|
||||
Priority: Medium-High. I don't know for certain that this is a problem but it seems like it could
|
||||
|
||||
o Memory Management (mm/)
|
||||
^^^^^^^^^^^^^^^^^^^^^^^
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||||
|
||||
|
||||
@@ -48,9 +48,35 @@
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||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Spinlock states */
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||||
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||||
#define SP_UNLOCKED 0 /* The Un-locked state */
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||||
#define SP_LOCKED 1 /* The Locked state */
|
||||
|
||||
/* Memory barriers for use with NuttX spinlock logic
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||||
*
|
||||
* Data Memory Barrier (DMB) acts as a memory barrier. It ensures that all
|
||||
* explicit memory accesses that appear in program order before the DMB
|
||||
* instruction are observed before any explicit memory accesses that appear
|
||||
* in program order after the DMB instruction. It does not affect the
|
||||
* ordering of any other instructions executing on the processor
|
||||
*
|
||||
* dmb st - Data memory barrier. Wait for stores to complete.
|
||||
*
|
||||
* Data Synchronization Barrier (DSB) acts as a special kind of memory
|
||||
* barrier. No instruction in program order after this instruction executes
|
||||
* until this instruction completes. This instruction completes when: (1) All
|
||||
* explicit memory accesses before this instruction complete, and (2) all
|
||||
* Cache, Branch predictor and TLB maintenance operations before this
|
||||
* instruction complete.
|
||||
*
|
||||
* dsb sy - Data syncrhonization barrier. Assures that the CPU waits until
|
||||
* all memory accesses are complete
|
||||
*/
|
||||
|
||||
#define SP_DSB(n) __asm__ __volatile__ ("dsb sy" : : : "memory")
|
||||
#define SP_DMB(n) __asm__ __volatile__ ("dmb st" : : : "memory")
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
@@ -53,6 +53,7 @@
|
||||
|
||||
#include "up_arch.h"
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||||
#include "sched/sched.h"
|
||||
#include "irq/irq.h"
|
||||
#include "up_internal.h"
|
||||
|
||||
/****************************************************************************
|
||||
@@ -345,10 +346,21 @@ static void _up_assert(int errorcode)
|
||||
|
||||
if (CURRENT_REGS || this_task()->pid == 0)
|
||||
{
|
||||
/* Disable interrupts on this CPU */
|
||||
|
||||
(void)up_irq_save();
|
||||
|
||||
for (; ; )
|
||||
{
|
||||
#ifdef CONFIG_SMP
|
||||
/* Try (again) to stop activity on other CPUs */
|
||||
|
||||
(void)spin_trylock(&g_cpu_irqlock);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_LEDS
|
||||
/* FLASH LEDs a 2Hz */
|
||||
|
||||
board_autoled_on(LED_PANIC);
|
||||
up_mdelay(250);
|
||||
board_autoled_off(LED_PANIC);
|
||||
|
||||
@@ -55,6 +55,20 @@
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/* These spinlocks are used in the SMP configuration in order to implement
|
||||
* up_cpu_pause(). The protocol for CPUn to pause CPUm is as follows
|
||||
*
|
||||
* 1. The up_cpu_pause() implementation on CPUn locks both g_cpu_wait[m]
|
||||
* and g_cpu_paused[m]. CPUn then waits spinning on g_cpu_paused[m].
|
||||
* 2. CPUm receives the interrupt it (1) unlocks g_cpu_paused[m] and
|
||||
* (2) locks g_cpu_wait[m]. The first unblocks CPUn and the second
|
||||
* blocks CPUm in the interrupt handler.
|
||||
*
|
||||
* When CPUm resumes, CPUn unlocks g_cpu_wait[m] and the interrupt handler
|
||||
* on CPUm continues. CPUm must, of course, also then unlock g_cpu_wait[m]
|
||||
* so that it will be ready for the next pause operation.
|
||||
*/
|
||||
|
||||
static volatile spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS];
|
||||
static volatile spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS];
|
||||
|
||||
@@ -62,6 +76,92 @@ static volatile spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS];
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_cpu_pausereq
|
||||
*
|
||||
* Description:
|
||||
* Return true if a pause request is pending for this CPU.
|
||||
*
|
||||
* Input Parameters:
|
||||
* cpu - The index of the CPU to be queried
|
||||
*
|
||||
* Returned Value:
|
||||
* true = a pause request is pending.
|
||||
* false = no pasue request is pending.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
bool up_cpu_pausereq(int cpu)
|
||||
{
|
||||
return spin_islocked(&g_cpu_paused[cpu]);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_cpu_paused
|
||||
*
|
||||
* Description:
|
||||
* Handle a pause request from another CPU. Normally, this logic is
|
||||
* executed from interrupt handling logic within the architecture-specific
|
||||
* However, it is sometimes necessary necessary to perform the pending
|
||||
* pause operation in other contexts where the interrupt cannot be taken
|
||||
* in order to avoid deadlocks.
|
||||
*
|
||||
* This function performs the following operations:
|
||||
*
|
||||
* 1. It saves the current task state at the head of the current assigned
|
||||
* task list.
|
||||
* 2. It waits on a spinlock, then
|
||||
* 3. Returns from interrupt, restoring the state of the new task at the
|
||||
* head of the ready to run list.
|
||||
*
|
||||
* Input Parameters:
|
||||
* cpu - The index of the CPU to be paused
|
||||
*
|
||||
* Returned Value:
|
||||
* On success, OK is returned. Otherwise, a negated errno value indicating
|
||||
* the nature of the failure is returned.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int up_cpu_paused(int cpu)
|
||||
{
|
||||
FAR struct tcb_s *tcb = this_task();
|
||||
|
||||
/* Update scheduler parameters */
|
||||
|
||||
sched_suspend_scheduler(tcb);
|
||||
|
||||
/* Save the current context at CURRENT_REGS into the TCB at the head
|
||||
* of the assigned task list for this CPU.
|
||||
*/
|
||||
|
||||
up_savestate(tcb->xcp.regs);
|
||||
|
||||
/* Wait for the spinlock to be released */
|
||||
|
||||
spin_unlock(&g_cpu_paused[cpu]);
|
||||
spin_lock(&g_cpu_wait[cpu]);
|
||||
|
||||
/* Restore the exception context of the tcb at the (new) head of the
|
||||
* assigned task list.
|
||||
*/
|
||||
|
||||
tcb = this_task();
|
||||
|
||||
/* Reset scheduler parameters */
|
||||
|
||||
sched_resume_scheduler(tcb);
|
||||
|
||||
/* Then switch contexts. Any necessary address environment changes
|
||||
* will be made when the interrupt returns.
|
||||
*/
|
||||
|
||||
up_restorestate(tcb->xcp.regs);
|
||||
spin_unlock(&g_cpu_wait[cpu]);
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_pause_handler
|
||||
*
|
||||
@@ -84,40 +184,19 @@ static volatile spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS];
|
||||
|
||||
int arm_pause_handler(int irq, FAR void *context)
|
||||
{
|
||||
FAR struct tcb_s *tcb = this_task();
|
||||
int cpu = up_cpu_index();
|
||||
int cpu = this_cpu();
|
||||
|
||||
/* Update scheduler parameters */
|
||||
|
||||
sched_suspend_scheduler(tcb);
|
||||
|
||||
/* Save the current context at CURRENT_REGS into the TCB at the head of the
|
||||
* assigned task list for this CPU.
|
||||
/* Check for false alarms. Such false could occur as a consequence of
|
||||
* some deadlock breaking logic that might have already serviced the SG2
|
||||
* interrupt by calling up_cpu_paused(). If the pause event has already
|
||||
* been processed then g_cpu_paused[cpu] will not be locked.
|
||||
*/
|
||||
|
||||
up_savestate(tcb->xcp.regs);
|
||||
if (spin_islocked(&g_cpu_paused[cpu]))
|
||||
{
|
||||
return up_cpu_paused(cpu);
|
||||
}
|
||||
|
||||
/* Wait for the spinlock to be released */
|
||||
|
||||
spin_unlock(&g_cpu_paused[cpu]);
|
||||
spin_lock(&g_cpu_wait[cpu]);
|
||||
|
||||
/* Restore the exception context of the tcb at the (new) head of the
|
||||
* assigned task list.
|
||||
*/
|
||||
|
||||
tcb = this_task();
|
||||
|
||||
/* Reset scheduler parameters */
|
||||
|
||||
sched_resume_scheduler(tcb);
|
||||
|
||||
/* Then switch contexts. Any necessary address environment changes will
|
||||
* be made when the interrupt returns.
|
||||
*/
|
||||
|
||||
up_restorestate(tcb->xcp.regs);
|
||||
spin_unlock(&g_cpu_wait[cpu]);
|
||||
return OK;
|
||||
}
|
||||
|
||||
@@ -134,7 +213,7 @@ int arm_pause_handler(int irq, FAR void *context)
|
||||
* CPU.
|
||||
*
|
||||
* Input Parameters:
|
||||
* cpu - The index of the CPU to be stopped/
|
||||
* cpu - The index of the CPU to be stopped
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure.
|
||||
|
||||
@@ -153,6 +153,18 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
|
||||
CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver;
|
||||
CURRENT_REGS[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
/* In an SMP configuration, the interrupt disable logic also
|
||||
* involves spinlocks that are configured per the TCB irqcount
|
||||
* field. This is logically equivalent to enter_critical_section().
|
||||
* The matching call to leave_critical_section() will be
|
||||
* performed in up_sigdeliver().
|
||||
*/
|
||||
|
||||
DEBUGASSERT(tcb->irqcount < INT16_MAX);
|
||||
tcb->irqcount++;
|
||||
#endif
|
||||
|
||||
/* And make sure that the saved context in the TCB is the same
|
||||
* as the interrupt return context.
|
||||
*/
|
||||
@@ -183,6 +195,19 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
|
||||
|
||||
tcb->xcp.regs[REG_PC] = (uint32_t)up_sigdeliver;
|
||||
tcb->xcp.regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
/* In an SMP configuration, the interrupt disable logic also
|
||||
* involves spinlocks that are configured per the TCB irqcount
|
||||
* field. This is logically equivalent to enter_critical_section();
|
||||
* The matching leave_critical_section will be performed in
|
||||
* The matching call to leave_critical_section() will be performed
|
||||
* in up_sigdeliver().
|
||||
*/
|
||||
|
||||
DEBUGASSERT(tcb->irqcount < INT16_MAX);
|
||||
tcb->irqcount++;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/armv7-a/arm_sigdeliver.c
|
||||
*
|
||||
* Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -103,18 +103,27 @@ void up_sigdeliver(void)
|
||||
|
||||
/* Then restore the task interrupt state */
|
||||
|
||||
up_irq_restore(regs[REG_CPSR]);
|
||||
leave_critical_section(regs[REG_CPSR]);
|
||||
|
||||
/* Deliver the signals */
|
||||
/* Deliver the signal */
|
||||
|
||||
sigdeliver(rtcb);
|
||||
|
||||
/* Output any debug messages BEFORE restoring errno (because they may
|
||||
* alter errno), then disable interrupts again and restore the original
|
||||
* errno that is needed by the user logic (it is probably EINTR).
|
||||
*
|
||||
* REVISIT: In SMP mode up_irq_save() probably only disables interrupts
|
||||
* on the local CPU. We do not want to call enter_critical_section()
|
||||
* here, however, because we don't want this state to stick after the
|
||||
* call to up_fullcontextrestore().
|
||||
*
|
||||
* I would prefer that all interrupts are disabled when
|
||||
* up_fullcontextrestore() is called, but that may not be necessary.
|
||||
*/
|
||||
|
||||
sinfo("Resuming\n");
|
||||
|
||||
(void)up_irq_save();
|
||||
rtcb->pterrno = saved_errno;
|
||||
|
||||
|
||||
@@ -513,7 +513,6 @@
|
||||
* NMRR registers. For the simple case where TEX[2:0] = 0b000, the control
|
||||
* is as follows:
|
||||
*
|
||||
*
|
||||
* MEMORY INNER OUTER OUTER SHAREABLE
|
||||
* C B TYPE CACHEABILITY CACHEABILITY ATTRIBUTE
|
||||
* - - ---------- ------------- ------------ -----------------
|
||||
|
||||
@@ -50,6 +50,7 @@
|
||||
#include "task/task.h"
|
||||
#include "sched/sched.h"
|
||||
#include "group/group.h"
|
||||
#include "irq/irq.h"
|
||||
#include "up_internal.h"
|
||||
|
||||
/****************************************************************************
|
||||
@@ -140,11 +141,14 @@ void _exit(int status)
|
||||
{
|
||||
struct tcb_s *tcb;
|
||||
|
||||
/* Disable interrupts. They will be restored when the next
|
||||
* task is started.
|
||||
/* Disable interrupts. They will be restored when the next task is
|
||||
* started.
|
||||
*/
|
||||
|
||||
(void)up_irq_save();
|
||||
#ifdef CONFIG_SMP
|
||||
(void)spin_trylock(&g_cpu_irqlock);
|
||||
#endif
|
||||
|
||||
sinfo("TCB=%p exiting\n", this_task());
|
||||
|
||||
@@ -177,4 +181,3 @@ void _exit(int status)
|
||||
|
||||
up_fullcontextrestore(tcb->xcp.regs);
|
||||
}
|
||||
|
||||
|
||||
@@ -269,8 +269,9 @@ config LPC43_SSP1
|
||||
default n
|
||||
|
||||
config LPC43_TMR0
|
||||
bool "ADC1"
|
||||
bool "Timer 0"
|
||||
default n
|
||||
select LPC43_TIMER
|
||||
|
||||
config LPC43_TMR1
|
||||
bool "Timer 1"
|
||||
@@ -279,10 +280,17 @@ config LPC43_TMR1
|
||||
config LPC43_TMR2
|
||||
bool "Timer 2"
|
||||
default n
|
||||
select LPC43_TIMER
|
||||
|
||||
config LPC43_TMR3
|
||||
bool "Timer 3"
|
||||
default n
|
||||
select LPC43_TIMER
|
||||
|
||||
config LPC43_TIMER
|
||||
bool
|
||||
default n
|
||||
select ARCH_HAVE_EXTCLK
|
||||
|
||||
config LPC43_USART0
|
||||
bool "USART0"
|
||||
|
||||
@@ -154,6 +154,10 @@ CHIP_CSRCS += lpc43_ssp.c
|
||||
endif
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_LPC43_TIMER),y)
|
||||
CHIP_CSRCS += lpc43_timer.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_LPC43_RIT),y)
|
||||
CHIP_CSRCS += lpc43_rit.c
|
||||
endif
|
||||
@@ -196,4 +200,4 @@ CHIP_CSRCS += lpc43_usb0dev.c
|
||||
endif
|
||||
endif
|
||||
|
||||
-include chip/spifi/src/Make.defs
|
||||
-include chip/spifi/src/Make.defs
|
||||
|
||||
@@ -42,10 +42,14 @@
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
#define TMR_RVALUE_MASK (0xffffffff)
|
||||
|
||||
/* Register offsets *****************************************************************/
|
||||
|
||||
#define LPC43_TMR_IR_OFFSET 0x0000 /* Interrupt Register */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,100 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/sam34/lpc43_tc.h
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* Alan Carvalho de Assis <acassis@gmail.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_LPC43_TMR_H
|
||||
#define __ARCH_ARM_SRC_LPC43_TMR_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "chip/lpc43_timer.h"
|
||||
#include "chip/lpc43_ccu.h"
|
||||
|
||||
#ifdef CONFIG_TIMER
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: lpc43_tmrinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the timer. The timer is initialized and
|
||||
* registers as 'devpath. The initial state of the timer is
|
||||
* disabled.
|
||||
*
|
||||
* Input Parameters:
|
||||
* devpath - The full path to the timer. This should be of the form
|
||||
* /dev/timer0
|
||||
* irq - irq associated with the timer
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_LPC43_TMR0) || defined(CONFIG_LPC43_TMR1) || \
|
||||
defined(CONFIG_LPC43_TMR2) || defined(CONFIG_LPC43_TMR3)
|
||||
void lpc43_tmrinitialize(FAR const char *devpath, int irq);
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* CONFIG_TIMER */
|
||||
#endif /* __ARCH_ARM_SRC_LPC43_TMR_H */
|
||||
@@ -125,7 +125,7 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
|
||||
FAR struct timer_status_s *status);
|
||||
static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
|
||||
uint32_t timeout);
|
||||
static void sam34_sethandler(FAR struct timer_lowerhalf_s *lower,
|
||||
static void sam34_setcallback(FAR struct timer_lowerhalf_s *lower,
|
||||
tccb_t callback, FAR void *arg);
|
||||
static int sam34_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
|
||||
unsigned long arg);
|
||||
@@ -137,12 +137,12 @@ static int sam34_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
|
||||
|
||||
static const struct timer_ops_s g_tcops =
|
||||
{
|
||||
.start = sam34_start,
|
||||
.stop = sam34_stop,
|
||||
.getstatus = sam34_getstatus,
|
||||
.settimeout = sam34_settimeout,
|
||||
.sethandler = sam34_sethandler,
|
||||
.ioctl = sam34_ioctl,
|
||||
.start = sam34_start,
|
||||
.stop = sam34_stop,
|
||||
.getstatus = sam34_getstatus,
|
||||
.settimeout = sam34_settimeout,
|
||||
.setcallback = sam34_setcallback,
|
||||
.ioctl = sam34_ioctl,
|
||||
};
|
||||
|
||||
/* "Lower half" driver state */
|
||||
@@ -513,8 +513,8 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void sam34_sethandler(FAR struct timer_lowerhalf_s *lower,
|
||||
tccb_t callback, FAR void *arg)
|
||||
static void sam34_setcallback(FAR struct timer_lowerhalf_s *lower,
|
||||
tccb_t callback, FAR void *arg)
|
||||
{
|
||||
FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
|
||||
irqstate_t flags;
|
||||
|
||||
@@ -381,6 +381,7 @@
|
||||
|
||||
/* AHB2 peripheral reset register */
|
||||
|
||||
#define RCC_AHB1ENR_GPIOEN(port) (1 << port)
|
||||
#define RCC_AHB2RSTR_GPIOARST (1 << 0) /* Bit 0: IO port A reset */
|
||||
#define RCC_AHB2RSTR_GPIOBRST (1 << 1) /* Bit 1: IO port B reset */
|
||||
#define RCC_AHB2RSTR_GPIOCRST (1 << 2) /* Bit 2: IO port C reset */
|
||||
|
||||
@@ -0,0 +1,153 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/stm32l4/stm32l4_dumpgpio.c
|
||||
*
|
||||
* Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
|
||||
* Author: Sebastien Lorquet <sebastien@lorquet.fr>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/* Output debug info even if debug output is not selected. */
|
||||
|
||||
#undef CONFIG_DEBUG_INFO
|
||||
#define CONFIG_DEBUG_INFO 1
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/irq.h>
|
||||
|
||||
#include "up_arch.h"
|
||||
#include "chip.h"
|
||||
#include "stm32l4_gpio.h"
|
||||
#include "stm32l4_rcc.h"
|
||||
|
||||
#ifdef CONFIG_DEBUG_FEATURES
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
/* Port letters for prettier debug output */
|
||||
|
||||
static const char g_portchar[STM32L4_NPORTS] =
|
||||
{
|
||||
#if STM32L4_NPORTS > 11
|
||||
# error "Additional support required for this number of GPIOs"
|
||||
#elif STM32L4_NPORTS > 10
|
||||
'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J', 'K'
|
||||
#elif STM32L4_NPORTS > 9
|
||||
'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J'
|
||||
#elif STM32L4_NPORTS > 8
|
||||
'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I'
|
||||
#elif STM32L4_NPORTS > 7
|
||||
'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H'
|
||||
#elif STM32L4_NPORTS > 6
|
||||
'A', 'B', 'C', 'D', 'E', 'F', 'G'
|
||||
#elif STM32L4_NPORTS > 5
|
||||
'A', 'B', 'C', 'D', 'E', 'F'
|
||||
#elif STM32L4_NPORTS > 4
|
||||
'A', 'B', 'C', 'D', 'E'
|
||||
#elif STM32L4_NPORTS > 3
|
||||
'A', 'B', 'C', 'D'
|
||||
#elif STM32L4_NPORTS > 2
|
||||
'A', 'B', 'C'
|
||||
#elif STM32L4_NPORTS > 1
|
||||
'A', 'B'
|
||||
#elif STM32L4_NPORTS > 0
|
||||
'A'
|
||||
#else
|
||||
# error "Bad number of GPIOs"
|
||||
#endif
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Function: stm32l4_dumpgpio
|
||||
*
|
||||
* Description:
|
||||
* Dump all GPIO registers associated with the provided base address
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int stm32l4_dumpgpio(uint32_t pinset, const char *msg)
|
||||
{
|
||||
irqstate_t flags;
|
||||
uint32_t base;
|
||||
unsigned int port;
|
||||
|
||||
/* Get the base address associated with the GPIO port */
|
||||
|
||||
port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
|
||||
base = g_gpiobase[port];
|
||||
|
||||
/* The following requires exclusive access to the GPIO registers */
|
||||
|
||||
flags = enter_critical_section();
|
||||
|
||||
DEBUGASSERT(port < STM32L4_NPORTS);
|
||||
|
||||
_info("GPIO%c pinset: %08x base: %08x -- %s\n",
|
||||
g_portchar[port], pinset, base, msg);
|
||||
|
||||
if ((getreg32(STM32L4_RCC_AHB1ENR) & RCC_AHB1ENR_GPIOEN(port)) != 0)
|
||||
{
|
||||
_info(" MODE: %08x OTYPE: %04x OSPEED: %08x PUPDR: %08x\n",
|
||||
getreg32(base + STM32L4_GPIO_MODER_OFFSET),
|
||||
getreg32(base + STM32L4_GPIO_OTYPER_OFFSET),
|
||||
getreg32(base + STM32L4_GPIO_OSPEED_OFFSET),
|
||||
getreg32(base + STM32L4_GPIO_PUPDR_OFFSET));
|
||||
_info(" IDR: %04x ODR: %04x BSRR: %08x LCKR: %04x\n",
|
||||
getreg32(base + STM32L4_GPIO_IDR_OFFSET),
|
||||
getreg32(base + STM32L4_GPIO_ODR_OFFSET),
|
||||
getreg32(base + STM32L4_GPIO_BSRR_OFFSET),
|
||||
getreg32(base + STM32L4_GPIO_LCKR_OFFSET));
|
||||
_info(" AFRH: %08x AFRL: %08x\n",
|
||||
getreg32(base + STM32L4_GPIO_AFRH_OFFSET),
|
||||
getreg32(base + STM32L4_GPIO_AFRL_OFFSET));
|
||||
}
|
||||
else
|
||||
{
|
||||
_info(" GPIO%c not enabled: AHB1ENR: %08x\n",
|
||||
g_portchar[port], getreg32(STM32L4_RCC_AHB1ENR));
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
return OK;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_DEBUG_FEATURES */
|
||||
|
||||
@@ -195,11 +195,44 @@
|
||||
|
||||
struct xcptcontext
|
||||
{
|
||||
#ifndef CONFIG_DISABLE_SIGNALS
|
||||
/* The following function pointer is non-NULL if there are pending signals
|
||||
* to be processed.
|
||||
*/
|
||||
|
||||
void *sigdeliver; /* Actual type is sig_deliver_t */
|
||||
|
||||
/* These additional register save locations are used to implement the
|
||||
* signal delivery trampoline.
|
||||
*/
|
||||
|
||||
uint32_t saved_epc; /* Trampoline PC */
|
||||
uint32_t saved_int_ctx; /* Interrupt context with interrupts disabled. */
|
||||
|
||||
# ifdef CONFIG_BUILD_KERNEL
|
||||
/* This is the saved address to use when returning from a user-space
|
||||
* signal handler.
|
||||
*/
|
||||
|
||||
uint32_t sigreturn;
|
||||
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BUILD_KERNEL
|
||||
/* The following array holds information needed to return from each nested
|
||||
* system call.
|
||||
*/
|
||||
|
||||
uint8_t nsyscalls;
|
||||
struct xcpt_syscall_s syscall[CONFIG_SYS_NNEST];
|
||||
|
||||
#endif
|
||||
|
||||
/* Register save area */
|
||||
|
||||
uint32_t regs[XCPTCONTEXT_REGS];
|
||||
};
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* __ARCH_MISOC_INCLUDE_LM32_IRQ_H */
|
||||
|
||||
@@ -63,6 +63,16 @@
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/****************************************************************************
|
||||
* Name: misoc_timer_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize and start the system timer.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void misoc_timer_initialize(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_serialinit
|
||||
*
|
||||
|
||||
@@ -205,13 +205,13 @@ static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
|
||||
|
||||
static struct misoc_dev_s g_uart1priv =
|
||||
{
|
||||
.uartbase = CSR_UART_BASE,
|
||||
.irq = UART_INTERRUPT,
|
||||
.rxtx_addr = CSR_UART_RXTX_ADDR,
|
||||
.rxempty_addr = CSR_UART_RXEMPTY_ADDR,
|
||||
.txfull_addr = CSR_UART_TXFULL_ADDR,
|
||||
.ev_status_addr = CSR_UART_EV_STATUS_ADDR,
|
||||
.ev_pending_addr = CSR_UART_EV_PENDING_ADDR,
|
||||
.uartbase = CSR_UART_BASE,
|
||||
.irq = UART_INTERRUPT,
|
||||
.rxtx_addr = CSR_UART_RXTX_ADDR,
|
||||
.rxempty_addr = CSR_UART_RXEMPTY_ADDR,
|
||||
.txfull_addr = CSR_UART_TXFULL_ADDR,
|
||||
.ev_status_addr = CSR_UART_EV_STATUS_ADDR,
|
||||
.ev_pending_addr = CSR_UART_EV_PENDING_ADDR,
|
||||
.ev_enable_addr = CSR_UART_EV_ENABLE_ADDR,
|
||||
};
|
||||
|
||||
@@ -312,16 +312,9 @@ static void misoc_shutdown(struct uart_dev_s *dev)
|
||||
static int misoc_attach(struct uart_dev_s *dev)
|
||||
{
|
||||
struct misoc_dev_s *priv = (struct misoc_dev_s *)dev->priv;
|
||||
uint32_t im;
|
||||
|
||||
irq_attach(priv->irq, misoc_uart_interrupt);
|
||||
|
||||
/* enable interrupt */
|
||||
/* TODO: move that somewhere proper ! */
|
||||
|
||||
im = irq_getmask();
|
||||
im |= (1 << UART_INTERRUPT);
|
||||
irq_setmask(im);
|
||||
(void)irq_attach(priv->irq, misoc_uart_interrupt);
|
||||
up_enable_irq(priv->irq);
|
||||
|
||||
return OK;
|
||||
}
|
||||
@@ -339,14 +332,8 @@ static int misoc_attach(struct uart_dev_s *dev)
|
||||
static void misoc_detach(struct uart_dev_s *dev)
|
||||
{
|
||||
struct misoc_dev_s *priv = (struct misoc_dev_s *)dev->priv;
|
||||
uint32_t im;
|
||||
|
||||
/* TODO: move that somewhere proper */
|
||||
|
||||
im = irq_getmask();
|
||||
im &= ~(1 << UART_INTERRUPT);
|
||||
irq_setmask(im);
|
||||
|
||||
up_disable_irq(priv->irq);
|
||||
irq_detach(priv->irq);
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,151 @@
|
||||
/****************************************************************************
|
||||
* arch/risc-v/src/nr5m100/nr5_timerisr.c
|
||||
*
|
||||
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Modified for MISOC:
|
||||
*
|
||||
* Copyright (C) 2016 Ramtin Amin. All rights reserved.
|
||||
* Author: Ramtin Amin <keytwo@gmail.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <time.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/irq.h>
|
||||
#include <arch/board/board.h>
|
||||
#include <arch/board/generated/csr.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "misoc.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* The desired timer interrupt frequency is provided by the definition
|
||||
* CLOCKS_PER_SEC (see include/time.h). CLOCKS_PER_SEC defines the desired
|
||||
* number of system clock ticks per second. That value is a user
|
||||
* configurable setting based on CONFIG_USEC_PER_TICK. It defaults to 100
|
||||
* (100 ticks per second = 10 MS interval).
|
||||
*
|
||||
* Given the timer input frequency (Finput). The timer correct reload
|
||||
* value is:
|
||||
*
|
||||
* reload = Finput / CLOCKS_PER_SEC
|
||||
*/
|
||||
|
||||
#define SYSTICK_RELOAD ((SYSTEM_CLOCK_FREQUENCY / CLOCKS_PER_SEC) - 1)
|
||||
|
||||
/* The size of the reload field is 30 bits. Verify that the reload value
|
||||
* will fit in the reload register.
|
||||
*/
|
||||
|
||||
#if SYSTICK_RELOAD > 0x3fffffff
|
||||
# error SYSTICK_RELOAD exceeds the range of the RELOAD register
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Function: up_timerisr
|
||||
*
|
||||
* Description:
|
||||
* The timer ISR will perform a variety of services for various portions
|
||||
* of the systems.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int up_timerisr(int irq, void *context)
|
||||
{
|
||||
/* Clear event pending */
|
||||
|
||||
timer0_ev_pending_write(timer0_ev_pending_read());
|
||||
|
||||
/* Process timer interrupt */
|
||||
|
||||
sched_process_timer();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Function: up_timer_initialize
|
||||
*
|
||||
* Description:
|
||||
* This function is called during start-up to initialize
|
||||
* the timer interrupt.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void misoc_timer_initialize(void)
|
||||
{
|
||||
/* Clear event pending */
|
||||
|
||||
timer0_ev_pending_write(timer0_ev_pending_read());
|
||||
|
||||
/* Disable timer*/
|
||||
|
||||
timer0_en_write(0);
|
||||
|
||||
/* Setup the timer reload register to generate interrupts at the rate of
|
||||
* CLOCKS_PER_SEC.
|
||||
*/
|
||||
|
||||
timer0_reload_write(SYSTICK_RELOAD);
|
||||
timer0_load_write(SYSTICK_RELOAD);
|
||||
|
||||
/* Enable timer */
|
||||
|
||||
timer0_en_write(1);
|
||||
|
||||
/* Attach the timer interrupt vector */
|
||||
|
||||
(void)irq_attach(TIMER0_INTERRUPT, up_timerisr);
|
||||
|
||||
/* And enable the timer interrupt */
|
||||
|
||||
up_enable_irq(TIMER0_INTERRUPT);
|
||||
|
||||
/* Enable IRQ of the timer core */
|
||||
|
||||
timer0_ev_enable_write(1);
|
||||
}
|
||||
@@ -39,7 +39,7 @@ HEAD_ASRC = lm32_vectors.S
|
||||
CMN_ASRCS =
|
||||
CMN_CSRCS = misoc_lowputs.c misoc_serial.c misoc_mdelay.c
|
||||
CMN_CSRCS += misoc_modifyreg8.c misoc_modifyreg16.c misoc_modifyreg32.c
|
||||
CMN_CSRCS += misoc_puts.c misoc_udelay.c
|
||||
CMN_CSRCS += misoc_puts.c misoc_udelay.c misoc_timerisr.c
|
||||
|
||||
CHIP_ASRCS = lm32_syscall.S
|
||||
|
||||
@@ -49,3 +49,4 @@ CHIP_CSRCS += lm32_doirq.c lm32_dumpstate.c lm32_exit.c lm32_idle.c
|
||||
CHIP_CSRCS += lm32_initialize.c lm32_initialstate.c lm32_interruptcontext.c
|
||||
CHIP_CSRCS += lm32_irq.c lm32_releasepending.c lm32_releasestack.c
|
||||
CHIP_CSRCS += lm32_stackframe.c lm32_swint.c lm32_unblocktask.c
|
||||
CHIP_CSRCS += lm32_reprioritizertr.c lm32_schedulesigaction.c lm32_sigdeliver.c
|
||||
|
||||
@@ -57,16 +57,17 @@
|
||||
* logic.
|
||||
*/
|
||||
|
||||
#define STACK_COLOR 0xdeadbeef
|
||||
#define INTSTACK_COLOR 0xdeadbeef
|
||||
#define HEAP_COLOR 'h'
|
||||
#define STACK_COLOR 0xdeadbeef
|
||||
#define INTSTACK_COLOR 0xdeadbeef
|
||||
#define HEAP_COLOR 'h'
|
||||
|
||||
/* In the LM32 model, the state is copied from the stack to the TCB, but
|
||||
* only a referenced is passed to get the state from the TCB.
|
||||
*/
|
||||
|
||||
#define up_savestate(regs) lm32_copystate(regs, (uint32_t*)g_current_regs)
|
||||
#define up_restorestate(regs) (g_current_regs = regs)
|
||||
#define up_savestate(regs) lm32_copystate(regs, (uint32_t*)g_current_regs)
|
||||
#define up_copystate(rega,regb) lm32_copystate(rega, regb)
|
||||
#define up_restorestate(regs) (g_current_regs = regs)
|
||||
|
||||
/* Determine which (if any) console driver to use. If a console is enabled
|
||||
* and no other console device is specified, then a serial console is
|
||||
|
||||
@@ -72,7 +72,9 @@ void up_initialize(void)
|
||||
|
||||
/* Initialize the serial driver */
|
||||
|
||||
#warning REVISIT: Here you should all misoc_serial_initialize(). That initializes the entire serial driver, a part of the operation is the uart initialization.
|
||||
|
||||
misoc_serial_initialize();
|
||||
|
||||
/* Initialize the system timer */
|
||||
|
||||
misoc_timer_initialize();
|
||||
}
|
||||
|
||||
@@ -101,7 +101,7 @@ void up_initial_state(struct tcb_s *tcb)
|
||||
|
||||
/* Initial state of IE: Interrupts enabled */
|
||||
|
||||
xcp->regs[REG_INT_CTX] = 1;
|
||||
xcp->regs[REG_INT_CTX] = 2;
|
||||
|
||||
/* If this task is running PIC, then set the PIC base register to the
|
||||
* address of the allocated D-Space region.
|
||||
|
||||
@@ -0,0 +1,203 @@
|
||||
/****************************************************************************
|
||||
* arch/misoc/src/lm32/lm32_reprioritizertr.c
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <sched.h>
|
||||
#include <syscall.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/sched.h>
|
||||
|
||||
#include "sched/sched.h"
|
||||
#include "group/group.h"
|
||||
#include "lm32.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_reprioritize_rtr
|
||||
*
|
||||
* Description:
|
||||
* Called when the priority of a running or
|
||||
* ready-to-run task changes and the reprioritization will
|
||||
* cause a context switch. Two cases:
|
||||
*
|
||||
* 1) The priority of the currently running task drops and the next
|
||||
* task in the ready to run list has priority.
|
||||
* 2) An idle, ready to run task's priority has been raised above the
|
||||
* the priority of the current, running task and it now has the
|
||||
* priority.
|
||||
*
|
||||
* Inputs:
|
||||
* tcb: The TCB of the task that has been reprioritized
|
||||
* priority: The new task priority
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
|
||||
{
|
||||
/* Verify that the caller is sane */
|
||||
|
||||
if (tcb->task_state < FIRST_READY_TO_RUN_STATE ||
|
||||
tcb->task_state > LAST_READY_TO_RUN_STATE
|
||||
#if SCHED_PRIORITY_MIN > 0
|
||||
|| priority < SCHED_PRIORITY_MIN
|
||||
#endif
|
||||
#if SCHED_PRIORITY_MAX < UINT8_MAX
|
||||
|| priority > SCHED_PRIORITY_MAX
|
||||
#endif
|
||||
)
|
||||
{
|
||||
PANIC();
|
||||
}
|
||||
else
|
||||
{
|
||||
struct tcb_s *rtcb = this_task();
|
||||
bool switch_needed;
|
||||
|
||||
sinfo("TCB=%p PRI=%d\n", tcb, priority);
|
||||
|
||||
/* Remove the tcb task from the ready-to-run list.
|
||||
* sched_removereadytorun will return true if we just
|
||||
* remove the head of the ready to run list.
|
||||
*/
|
||||
|
||||
switch_needed = sched_removereadytorun(tcb);
|
||||
|
||||
/* Setup up the new task priority */
|
||||
|
||||
tcb->sched_priority = (uint8_t)priority;
|
||||
|
||||
/* Return the task to the specified blocked task list.
|
||||
* sched_addreadytorun will return true if the task was
|
||||
* added to the new list. We will need to perform a context
|
||||
* switch only if the EXCLUSIVE or of the two calls is non-zero
|
||||
* (i.e., one and only one the calls changes the head of the
|
||||
* ready-to-run list).
|
||||
*/
|
||||
|
||||
switch_needed ^= sched_addreadytorun(tcb);
|
||||
|
||||
/* Now, perform the context switch if one is needed */
|
||||
|
||||
if (switch_needed)
|
||||
{
|
||||
/* If we are going to do a context switch, then now is the right
|
||||
* time to add any pending tasks back into the ready-to-run list.
|
||||
* task list now
|
||||
*/
|
||||
|
||||
if (g_pendingtasks.head)
|
||||
{
|
||||
sched_mergepending();
|
||||
}
|
||||
|
||||
/* Update scheduler parameters */
|
||||
|
||||
sched_suspend_scheduler(rtcb);
|
||||
|
||||
/* Are we in an interrupt handler? */
|
||||
|
||||
if (g_current_regs)
|
||||
{
|
||||
/* Yes, then we have to do things differently.
|
||||
* Just copy the g_current_regs into the OLD rtcb.
|
||||
*/
|
||||
|
||||
up_savestate(rtcb->xcp.regs);
|
||||
|
||||
/* Restore the exception context of the rtcb at the (new) head
|
||||
* of the ready-to-run task list.
|
||||
*/
|
||||
|
||||
rtcb = this_task();
|
||||
|
||||
/* Update scheduler parameters */
|
||||
|
||||
sched_resume_scheduler(rtcb);
|
||||
|
||||
/* Then switch contexts. Any necessary address environment
|
||||
* changes will be made when the interrupt returns.
|
||||
*/
|
||||
|
||||
up_restorestate(rtcb->xcp.regs);
|
||||
}
|
||||
|
||||
/* No, then we will need to perform the user context switch */
|
||||
|
||||
else
|
||||
{
|
||||
/* Switch context to the context of the task at the head of the
|
||||
* ready to run list.
|
||||
*/
|
||||
|
||||
struct tcb_s *nexttcb = this_task();
|
||||
|
||||
#ifdef CONFIG_ARCH_ADDRENV
|
||||
/* Make sure that the address environment for the previously
|
||||
* running task is closed down gracefully (data caches dump,
|
||||
* MMU flushed) and set up the address environment for the new
|
||||
* thread at the head of the ready-to-run list.
|
||||
*/
|
||||
|
||||
(void)group_addrenv(nexttcb);
|
||||
#endif
|
||||
/* Update scheduler parameters */
|
||||
|
||||
sched_resume_scheduler(nexttcb);
|
||||
|
||||
/* Then switch contexts */
|
||||
|
||||
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
|
||||
|
||||
/* up_switchcontext forces a context switch to the task at the
|
||||
* head of the ready-to-run list. It does not 'return' in the
|
||||
* normal sense. When it does return, it is because the blocked
|
||||
* task is again ready to run and has execution priority.
|
||||
*/
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,207 @@
|
||||
/****************************************************************************
|
||||
* arch/misoc/src/lm32/lm32_schedulesigaction.c
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Modified for MISOC:
|
||||
*
|
||||
* Copyright (C) 2016 Ramtin Amin. All rights reserved.
|
||||
* Author: Ramtin Amin <keytwo@gmail.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <sched.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/irq.h>
|
||||
#include <nuttx/arch.h>
|
||||
#include <arch/lm32/irq.h>
|
||||
|
||||
#include "sched/sched.h"
|
||||
#include "lm32.h"
|
||||
|
||||
#ifndef CONFIG_DISABLE_SIGNALS
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_schedule_sigaction
|
||||
*
|
||||
* Description:
|
||||
* This function is called by the OS when one or more
|
||||
* signal handling actions have been queued for execution.
|
||||
* The architecture specific code must configure things so
|
||||
* that the 'igdeliver' callback is executed on the thread
|
||||
* specified by 'tcb' as soon as possible.
|
||||
*
|
||||
* This function may be called from interrupt handling logic.
|
||||
*
|
||||
* This operation should not cause the task to be unblocked
|
||||
* nor should it cause any immediate execution of sigdeliver.
|
||||
* Typically, a few cases need to be considered:
|
||||
*
|
||||
* (1) This function may be called from an interrupt handler
|
||||
* During interrupt processing, all xcptcontext structures
|
||||
* should be valid for all tasks. That structure should
|
||||
* be modified to invoke sigdeliver() either on return
|
||||
* from (this) interrupt or on some subsequent context
|
||||
* switch to the recipient task.
|
||||
* (2) If not in an interrupt handler and the tcb is NOT
|
||||
* the currently executing task, then again just modify
|
||||
* the saved xcptcontext structure for the recipient
|
||||
* task so it will invoke sigdeliver when that task is
|
||||
* later resumed.
|
||||
* (3) If not in an interrupt handler and the tcb IS the
|
||||
* currently executing task -- just call the signal
|
||||
* handler now.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
|
||||
{
|
||||
irqstate_t flags;
|
||||
uint32_t int_ctx;
|
||||
|
||||
sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
|
||||
|
||||
/* Make sure that interrupts are disabled */
|
||||
|
||||
flags = enter_critical_section();
|
||||
|
||||
/* Refuse to handle nested signal actions */
|
||||
|
||||
if (!tcb->xcp.sigdeliver)
|
||||
{
|
||||
/* First, handle some special cases when the signal is
|
||||
* being delivered to the currently executing task.
|
||||
*/
|
||||
|
||||
sinfo("rtcb=0x%p g_current_regs=0x%p\n",
|
||||
this_task(), g_current_regs);
|
||||
|
||||
if (tcb == this_task())
|
||||
{
|
||||
/* CASE 1: We are not in an interrupt handler and
|
||||
* a task is signalling itself for some reason.
|
||||
*/
|
||||
|
||||
if (!g_current_regs)
|
||||
{
|
||||
/* In this case just deliver the signal now. */
|
||||
|
||||
sigdeliver(tcb);
|
||||
}
|
||||
|
||||
/* CASE 2: We are in an interrupt handler AND the
|
||||
* interrupted task is the same as the one that
|
||||
* must receive the signal, then we will have to modify
|
||||
* the return state as well as the state in the TCB.
|
||||
*
|
||||
* Hmmm... there looks like a latent bug here: The following
|
||||
* logic would fail in the strange case where we are in an
|
||||
* interrupt handler, the thread is signalling itself, but
|
||||
* a context switch to another task has occurred so that
|
||||
* g_current_regs does not refer to the thread of this_task()!
|
||||
*/
|
||||
|
||||
else
|
||||
{
|
||||
/* Save the return EPC and STATUS registers. These will be
|
||||
* restored by the signal trampoline after the signals have
|
||||
* been delivered.
|
||||
*/
|
||||
|
||||
tcb->xcp.sigdeliver = sigdeliver;
|
||||
tcb->xcp.saved_epc = g_current_regs[REG_EPC];
|
||||
|
||||
/* Then set up to vector to the trampoline with interrupts
|
||||
* disabled
|
||||
*/
|
||||
|
||||
g_current_regs[REG_EPC] = (uint32_t)up_sigdeliver;
|
||||
g_current_regs[REG_INT_CTX] = 0;
|
||||
|
||||
|
||||
/* And make sure that the saved context in the TCB
|
||||
* is the same as the interrupt return context.
|
||||
*/
|
||||
|
||||
up_savestate(tcb->xcp.regs);
|
||||
|
||||
sinfo("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
|
||||
tcb->xcp.saved_epc, tcb->xcp.saved_status,
|
||||
g_current_regs[REG_EPC], g_current_regs[REG_STATUS]);
|
||||
}
|
||||
}
|
||||
|
||||
/* Otherwise, we are (1) signaling a task is not running
|
||||
* from an interrupt handler or (2) we are not in an
|
||||
* interrupt handler and the running task is signalling
|
||||
* some non-running task.
|
||||
*/
|
||||
|
||||
else
|
||||
{
|
||||
/* Save the return EPC and STATUS registers. These will be
|
||||
* restored by the signal trampoline after the signals have
|
||||
* been delivered.
|
||||
*/
|
||||
|
||||
tcb->xcp.sigdeliver = sigdeliver;
|
||||
tcb->xcp.saved_epc = tcb->xcp.regs[REG_EPC];
|
||||
tcb->xcp.saved_int_ctx = tcb->xcp.regs[REG_INT_CTX];
|
||||
|
||||
/* Then set up to vector to the trampoline with interrupts
|
||||
* disabled
|
||||
*/
|
||||
|
||||
tcb->xcp.regs[REG_EPC] = (uint32_t)up_sigdeliver;
|
||||
tcb->xcp.regs[REG_INT_CTX] = 0;
|
||||
|
||||
sinfo("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
|
||||
tcb->xcp.saved_epc, tcb->xcp.saved_status,
|
||||
tcb->xcp.regs[REG_EPC], tcb->xcp.regs[REG_STATUS]);
|
||||
}
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_DISABLE_SIGNALS */
|
||||
@@ -0,0 +1,136 @@
|
||||
/****************************************************************************
|
||||
* arch/misoc/src/lm32/lm32_sigdeliver.c
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <sched.h>
|
||||
#include <syscall.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/irq.h>
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/board.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "sched/sched.h"
|
||||
#include "lm32.h"
|
||||
|
||||
#ifndef CONFIG_DISABLE_SIGNALS
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_sigdeliver
|
||||
*
|
||||
* Description:
|
||||
* This is the a signal handling trampoline. When a signal action was
|
||||
* posted. The task context was mucked with and forced to branch to this
|
||||
* location with interrupts disabled.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_sigdeliver(void)
|
||||
{
|
||||
struct tcb_s *rtcb = this_task();
|
||||
uint32_t regs[XCPTCONTEXT_REGS];
|
||||
sig_deliver_t sigdeliver;
|
||||
|
||||
/* Save the errno. This must be preserved throughout the signal handling
|
||||
* so that the user code final gets the correct errno value (probably
|
||||
* EINTR).
|
||||
*/
|
||||
|
||||
int saved_errno = rtcb->pterrno;
|
||||
|
||||
board_autoled_on(LED_SIGNAL);
|
||||
|
||||
sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
|
||||
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
|
||||
ASSERT(rtcb->xcp.sigdeliver != NULL);
|
||||
|
||||
/* Save the real return state on the stack. */
|
||||
|
||||
up_copystate(regs, rtcb->xcp.regs);
|
||||
regs[REG_EPC] = rtcb->xcp.saved_epc;
|
||||
regs[REG_INT_CTX] = rtcb->xcp.saved_int_ctx;
|
||||
|
||||
/* Get a local copy of the sigdeliver function pointer. We do this so that
|
||||
* we can nullify the sigdeliver function pointer in the TCB and accept
|
||||
* more signal deliveries while processing the current pending signals.
|
||||
*/
|
||||
|
||||
sigdeliver = rtcb->xcp.sigdeliver;
|
||||
rtcb->xcp.sigdeliver = NULL;
|
||||
|
||||
/* Then restore the task interrupt state */
|
||||
|
||||
up_irq_restore((irqstate_t)regs[REG_INT_CTX]);
|
||||
|
||||
/* Deliver the signals */
|
||||
|
||||
sigdeliver(rtcb);
|
||||
|
||||
/* Output any debug messages BEFORE restoring errno (because they may
|
||||
* alter errno), then disable interrupts again and restore the original
|
||||
* errno that is needed by the user logic (it is probably EINTR).
|
||||
*/
|
||||
|
||||
sinfo("Resuming EPC: %08x INT_CTX: %08x\n", regs[REG_EPC], regs[REG_INT_CTX]);
|
||||
|
||||
(void)up_irq_save();
|
||||
rtcb->pterrno = saved_errno;
|
||||
|
||||
/* Then restore the correct state for this thread of
|
||||
* execution.
|
||||
*/
|
||||
|
||||
board_autoled_off(LED_SIGNAL);
|
||||
up_fullcontextrestore(regs);
|
||||
|
||||
/* up_fullcontextrestore() should not return but could if the software
|
||||
* interrupts are disabled.
|
||||
*/
|
||||
|
||||
PANIC();
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_DISABLE_SIGNALS */
|
||||
@@ -208,7 +208,6 @@ _do_reset:
|
||||
sw (sp+REG_X23), r23
|
||||
sw (sp+REG_X24), r24
|
||||
sw (sp+REG_X25), r25
|
||||
|
||||
sw (sp+REG_GP), r26
|
||||
sw (sp+REG_FP), r27
|
||||
|
||||
@@ -217,7 +216,7 @@ _do_reset:
|
||||
addi r1, sp, 136
|
||||
sw (sp+REG_SP), r1
|
||||
|
||||
/* reg RA done later */
|
||||
/* Reg RA done later */
|
||||
|
||||
sw (sp+REG_EA), r30
|
||||
sw (sp+REG_BA), r31
|
||||
@@ -235,6 +234,10 @@ _do_reset:
|
||||
/* The 2nd argument is the regs pointer */
|
||||
|
||||
addi r2, sp, 0
|
||||
|
||||
/* Move sp away from X0 */
|
||||
|
||||
addi sp, sp, -4
|
||||
ret
|
||||
|
||||
.restore_all_and_eret:
|
||||
|
||||
@@ -199,6 +199,25 @@ extern volatile int g_eventloop;
|
||||
extern volatile int g_uart_data_available;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
/* These spinlocks are used in the SMP configuration in order to implement
|
||||
* up_cpu_pause(). The protocol for CPUn to pause CPUm is as follows
|
||||
*
|
||||
* 1. The up_cpu_pause() implementation on CPUn locks both g_cpu_wait[m]
|
||||
* and g_cpu_paused[m]. CPUn then waits spinning on g_cpu_paused[m].
|
||||
* 2. CPUm receives the interrupt it (1) unlocks g_cpu_paused[m] and
|
||||
* (2) locks g_cpu_wait[m]. The first unblocks CPUn and the second
|
||||
* blocks CPUm in the interrupt handler.
|
||||
*
|
||||
* When CPUm resumes, CPUn unlocks g_cpu_wait[m] and the interrupt handler
|
||||
* on CPUm continues. CPUm must, of course, also then unlock g_cpu_wait[m]
|
||||
* so that it will be ready for the next pause operation.
|
||||
*/
|
||||
|
||||
volatile spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS];
|
||||
volatile spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS];
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
+23
-10
@@ -78,16 +78,30 @@ struct sim_cpuinfo_s
|
||||
|
||||
static pthread_key_t g_cpukey;
|
||||
static pthread_t g_sim_cputhread[CONFIG_SMP_NCPUS];
|
||||
static volatile unsigned char g_sim_cpupaused[CONFIG_SMP_NCPUS];
|
||||
static volatile spinlock_t g_sim_cpuwait[CONFIG_SMP_NCPUS];
|
||||
|
||||
/* These spinlocks are used in the SMP configuration in order to implement
|
||||
* up_cpu_pause(). The protocol for CPUn to pause CPUm is as follows
|
||||
*
|
||||
* 1. The up_cpu_pause() implementation on CPUn locks both g_cpu_wait[m]
|
||||
* and g_cpu_paused[m]. CPUn then waits spinning on g_cpu_paused[m].
|
||||
* 2. CPUm receives the interrupt it (1) unlocks g_cpu_paused[m] and
|
||||
* (2) locks g_cpu_wait[m]. The first unblocks CPUn and the second
|
||||
* blocks CPUm in the interrupt handler.
|
||||
*
|
||||
* When CPUm resumes, CPUn unlocks g_cpu_wait[m] and the interrupt handler
|
||||
* on CPUm continues. CPUm must, of course, also then unlock g_cpu_wait[m]
|
||||
* so that it will be ready for the next pause operation.
|
||||
*/
|
||||
|
||||
volatile spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS];
|
||||
volatile spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS];
|
||||
|
||||
/****************************************************************************
|
||||
* NuttX domain function prototypes
|
||||
****************************************************************************/
|
||||
|
||||
void os_start(void) __attribute__ ((noreturn));
|
||||
void sim_cpu_pause(int cpu, volatile spinlock_t *wait,
|
||||
volatile unsigned char *paused);
|
||||
void up_cpu_paused(int cpu);
|
||||
void sim_smp_hook(void);
|
||||
|
||||
/****************************************************************************
|
||||
@@ -222,9 +236,7 @@ static void sim_handle_signal(int signo, siginfo_t *info, void *context)
|
||||
{
|
||||
int cpu = (int)((uintptr_t)pthread_getspecific(g_cpukey));
|
||||
|
||||
/* We need to perform the actual tasking operations in the NuttX domain */
|
||||
|
||||
sim_cpu_pause(cpu, &g_sim_cpuwait[cpu], &g_sim_cpupaused[cpu]);
|
||||
(void)up_cpu_paused(cpu);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -446,7 +458,8 @@ int up_cpu_pause(int cpu)
|
||||
{
|
||||
/* Take the spinlock that will prevent the CPU thread from running */
|
||||
|
||||
g_sim_cpuwait[cpu] = SP_LOCKED;
|
||||
g_cpu_wait[cpu] = SP_LOCKED;
|
||||
g_cpu_paused[cpu] = SP_LOCKED;
|
||||
|
||||
/* Signal the CPU thread */
|
||||
|
||||
@@ -454,7 +467,7 @@ int up_cpu_pause(int cpu)
|
||||
|
||||
/* Spin, waiting for the thread to pause */
|
||||
|
||||
while (!g_sim_cpupaused[cpu])
|
||||
while (g_cpu_paused[cpu] != 0)
|
||||
{
|
||||
pthread_yield();
|
||||
}
|
||||
@@ -485,6 +498,6 @@ int up_cpu_resume(int cpu)
|
||||
{
|
||||
/* Release the spinlock that will alloc the CPU thread to continue */
|
||||
|
||||
g_sim_cpuwait[cpu] = SP_UNLOCKED;
|
||||
g_cpu_wait[cpu] = SP_UNLOCKED;
|
||||
return 0;
|
||||
}
|
||||
|
||||
+46
-16
@@ -52,26 +52,53 @@
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sim_cpu_pause
|
||||
* Name: up_cpu_pausereq
|
||||
*
|
||||
* Description:
|
||||
* This is the SIGUSR1 signal handling logic. It implements the core
|
||||
* logic of up_cpu_pause() on the thread of execution the simulated CPU.
|
||||
* This is the part of the implementation that must be performed in the
|
||||
* NuttX vs. the host domain.
|
||||
* Return true if a pause request is pending for this CPU.
|
||||
*
|
||||
* Input Parameters:
|
||||
* cpu - The CPU being paused.
|
||||
* wait - Spinlock to wait on to be un-paused
|
||||
* paused - A boolean to set when we are in the paused state.
|
||||
* cpu - The index of the CPU to be queried
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
* true = a pause request is pending.
|
||||
* false = no pasue request is pending.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void sim_cpu_pause(int cpu, volatile spinlock_t *wait,
|
||||
volatile unsigned char *paused)
|
||||
bool up_cpu_pausereq(int cpu)
|
||||
{
|
||||
return spin_islocked(&g_cpu_paused[cpu]);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_cpu_paused
|
||||
*
|
||||
* Description:
|
||||
* Handle a pause request from another CPU. Normally, this logic is
|
||||
* executed from interrupt handling logic within the architecture-specific
|
||||
* However, it is sometimes necessary necessary to perform the pending
|
||||
* pause operation in other contexts where the interrupt cannot be taken
|
||||
* in order to avoid deadlocks.
|
||||
*
|
||||
* This function performs the following operations:
|
||||
*
|
||||
* 1. It saves the current task state at the head of the current assigned
|
||||
* task list.
|
||||
* 2. It waits on a spinlock, then
|
||||
* 3. Returns from interrupt, restoring the state of the new task at the
|
||||
* head of the ready to run list.
|
||||
*
|
||||
* Input Parameters:
|
||||
* cpu - The index of the CPU to be paused
|
||||
*
|
||||
* Returned Value:
|
||||
* On success, OK is returned. Otherwise, a negated errno value indicating
|
||||
* the nature of the failure is returned.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int up_cpu_paused(int cpu)
|
||||
{
|
||||
struct tcb_s *rtcb = current_task(cpu);
|
||||
|
||||
@@ -86,16 +113,18 @@ void sim_cpu_pause(int cpu, volatile spinlock_t *wait,
|
||||
|
||||
if (up_setjmp(rtcb->xcp.regs) == 0)
|
||||
{
|
||||
/* Indicate that we are in the paused state */
|
||||
/* Unlock the g_cpu_paused spinlock to indicate that we are in the
|
||||
* paused state
|
||||
*/
|
||||
|
||||
*paused = 1;
|
||||
spin_unlock(&g_cpu_paused[cpu]);
|
||||
|
||||
/* Spin until we are asked to resume. When we resume, we need to
|
||||
* inicate that we are not longer paused.
|
||||
*/
|
||||
|
||||
spin_lock(wait);
|
||||
*paused = 0;
|
||||
spin_lock(&g_cpu_wait[cpu]);
|
||||
spin_unlock(&g_cpu_wait[cpu]);
|
||||
|
||||
/* While we were paused, logic on a different CPU probably changed
|
||||
* the task as that head of the assigned task list. So now we need
|
||||
@@ -125,7 +154,8 @@ void sim_cpu_pause(int cpu, volatile spinlock_t *wait,
|
||||
|
||||
up_longjmp(rtcb->xcp.regs, 1);
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
|
||||
@@ -209,10 +209,11 @@ CONFIG_LPC43_BOOT_SPIFI=y
|
||||
# CONFIG_LPC43_SPIFI is not set
|
||||
# CONFIG_LPC43_SSP0 is not set
|
||||
# CONFIG_LPC43_SSP1 is not set
|
||||
# CONFIG_LPC43_TMR0 is not set
|
||||
CONFIG_LPC43_TMR0=y
|
||||
# CONFIG_LPC43_TMR1 is not set
|
||||
# CONFIG_LPC43_TMR2 is not set
|
||||
# CONFIG_LPC43_TMR3 is not set
|
||||
CONFIG_LPC43_TIMER=y
|
||||
# CONFIG_LPC43_USART0 is not set
|
||||
CONFIG_LPC43_UART1=y
|
||||
# CONFIG_LPC43_USART2 is not set
|
||||
@@ -262,7 +263,7 @@ CONFIG_ARCH_HAVE_VFORK=y
|
||||
# CONFIG_ARCH_HAVE_MMU is not set
|
||||
CONFIG_ARCH_HAVE_MPU=y
|
||||
# CONFIG_ARCH_NAND_HWECC is not set
|
||||
# CONFIG_ARCH_HAVE_EXTCLK is not set
|
||||
CONFIG_ARCH_HAVE_EXTCLK=y
|
||||
# CONFIG_ARCH_HAVE_POWEROFF is not set
|
||||
CONFIG_ARCH_HAVE_RESET=y
|
||||
# CONFIG_ARCH_USE_MPU is not set
|
||||
@@ -350,6 +351,7 @@ CONFIG_DISABLE_OS_API=y
|
||||
CONFIG_ARCH_HAVE_TICKLESS=y
|
||||
# CONFIG_SCHED_TICKLESS is not set
|
||||
CONFIG_USEC_PER_TICK=10000
|
||||
# CONFIG_SYSTEMTICK_EXTCLK is not set
|
||||
# CONFIG_SYSTEM_TIME64 is not set
|
||||
# CONFIG_CLOCK_MONOTONIC is not set
|
||||
# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
|
||||
@@ -466,7 +468,7 @@ CONFIG_DEV_NULL=y
|
||||
#
|
||||
# Timer Driver Support
|
||||
#
|
||||
# CONFIG_TIMER is not set
|
||||
CONFIG_TIMER=y
|
||||
# CONFIG_ONESHOT is not set
|
||||
# CONFIG_RTC is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
@@ -809,6 +811,14 @@ CONFIG_EXAMPLES_NSH=y
|
||||
# CONFIG_EXAMPLES_TCPECHO is not set
|
||||
# CONFIG_EXAMPLES_TELNETD is not set
|
||||
# CONFIG_EXAMPLES_TIFF is not set
|
||||
CONFIG_EXAMPLES_TIMER=y
|
||||
CONFIG_EXAMPLE_TIMER_DEVNAME="/dev/timer0"
|
||||
CONFIG_EXAMPLE_TIMER_INTERVAL=1000000
|
||||
CONFIG_EXAMPLE_TIMER_DELAY=100000
|
||||
CONFIG_EXAMPLE_TIMER_NSAMPLES=20
|
||||
CONFIG_EXAMPLES_TIMER_APPNAME="timer"
|
||||
CONFIG_EXAMPLES_TIMER_STACKSIZE=2048
|
||||
CONFIG_EXAMPLES_TIMER_PRIORITY=100
|
||||
# CONFIG_EXAMPLES_TOUCHSCREEN is not set
|
||||
# CONFIG_EXAMPLES_USBSERIAL is not set
|
||||
# CONFIG_EXAMPLES_USBTERM is not set
|
||||
|
||||
@@ -57,6 +57,10 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y)
|
||||
CSRCS += lpc43_buttons.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_TIMER),y)
|
||||
CSRCS += lpc43_timer.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_USBMSC),y)
|
||||
CSRCS += lpc43_usbmsc.c
|
||||
endif
|
||||
|
||||
@@ -123,5 +123,19 @@
|
||||
|
||||
void weak_function lpc43_sspdev_initialize(void);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: lpc43xx_timerinitialize()
|
||||
*
|
||||
* Description:
|
||||
* Perform architecture-specific initialization of the timer hardware.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_TIMER
|
||||
int lpc43_timerinitialize(void);
|
||||
#else
|
||||
# define lpc43_timerinitialize() (0)
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* _CONFIGS_BAMBINO_200E_SRC_BAMBINO_H */
|
||||
|
||||
@@ -162,5 +162,13 @@ int board_app_initialize(uintptr_t arg)
|
||||
{
|
||||
/* Initialize the SPIFI block device */
|
||||
|
||||
return nsh_spifi_initialize();
|
||||
nsh_spifi_initialize();
|
||||
|
||||
#ifdef CONFIG_TIMER
|
||||
/* Registers the timers */
|
||||
|
||||
lpc43_timerinitialize();
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,125 @@
|
||||
/****************************************************************************
|
||||
* configs/bambino-200e/src/lpc43_timer.c
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
* Bob Doiron
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <sys/types.h>
|
||||
#include <sys/ioctl.h>
|
||||
|
||||
#include <errno.h>
|
||||
#include <debug.h>
|
||||
#include <sched.h>
|
||||
#include <stdio.h>
|
||||
#include <fcntl.h>
|
||||
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/timers/timer.h>
|
||||
#include <nuttx/clock.h>
|
||||
#include <nuttx/kthread.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
#include "lpc43_timer.h"
|
||||
|
||||
#ifdef CONFIG_TIMER
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
/* Configuration ************************************************************/
|
||||
|
||||
#if !(defined(CONFIG_LPC43_TMR0) || defined(CONFIG_LPC43_TMR1) || defined(CONFIG_LPC43_TMR2) \
|
||||
|| defined(CONFIG_LPC43_TMR3) )
|
||||
# warning "CONFIG_LPC43_TMRx must be defined"
|
||||
#endif
|
||||
|
||||
/* Select the path to the registered watchdog timer device */
|
||||
|
||||
#ifndef CONFIG_TIMER0_DEVPATH
|
||||
# define CONFIG_TIMER0_DEVPATH "/dev/timer0"
|
||||
#endif
|
||||
#ifndef CONFIG_TIMER1_DEVPATH
|
||||
# define CONFIG_TIMER1_DEVPATH "/dev/timer1"
|
||||
#endif
|
||||
#ifndef CONFIG_TIMER2_DEVPATH
|
||||
# define CONFIG_TIMER2_DEVPATH "/dev/timer2"
|
||||
#endif
|
||||
#ifndef CONFIG_TIMER3_DEVPATH
|
||||
# define CONFIG_TIMER3_DEVPATH "/dev/timer3"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: lpc43_timerinitialize()
|
||||
*
|
||||
* Description:
|
||||
* Perform architecture-specific initialization of the timer hardware.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int lpc43_timerinitialize(void)
|
||||
{
|
||||
/* Initialize and register the timer devices */
|
||||
|
||||
#if defined(CONFIG_LPC43_TMR0)
|
||||
tmrinfo("Initializing %s...\n", CONFIG_TIMER0_DEVPATH);
|
||||
lpc43_tmrinitialize(CONFIG_TIMER0_DEVPATH, LPC43M4_IRQ_TIMER0);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_LPC43_TMR1)
|
||||
tmrinfo("Initializing %s...\n", CONFIG_TIMER1_DEVPATH);
|
||||
lpc43_tmrinitialize(CONFIG_TIMER1_DEVPATH, LPC43M4_IRQ_TIMER1);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_LPC43_TMR2)
|
||||
tmrinfo("Initializing %s...\n", CONFIG_TIMER2_DEVPATH);
|
||||
lpc43_tmrinitialize(CONFIG_TIMER2_DEVPATH, LPC43M4_IRQ_TIMER2);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_LPC43_TMR3)
|
||||
tmrinfo("Initializing %s...\n", CONFIG_TIMER3_DEVPATH);
|
||||
lpc43_tmrinitialize(CONFIG_TIMER3_DEVPATH, LPC43M4_IRQ_TIMER3);
|
||||
#endif
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_TIMER */
|
||||
@@ -920,7 +920,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
|
||||
#
|
||||
# Examples
|
||||
#
|
||||
# CONFIG_EXAMPLES_ARCHBUTTONS is not set
|
||||
# CONFIG_EXAMPLES_BUTTONS is not set
|
||||
# CONFIG_EXAMPLES_CCTYPE is not set
|
||||
# CONFIG_EXAMPLES_CHAT is not set
|
||||
|
||||
@@ -930,7 +930,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
|
||||
#
|
||||
# Examples
|
||||
#
|
||||
# CONFIG_EXAMPLES_ARCHBUTTONS is not set
|
||||
# CONFIG_EXAMPLES_BUTTONS is not set
|
||||
# CONFIG_EXAMPLES_CCTYPE is not set
|
||||
# CONFIG_EXAMPLES_CHAT is not set
|
||||
|
||||
@@ -561,14 +561,6 @@ can be selected as follow:
|
||||
|
||||
Where <subdir> is one of the following:
|
||||
|
||||
buttons:
|
||||
--------
|
||||
|
||||
Uses apps/examples/buttons to exercise HY-MiniSTM32V buttons and
|
||||
button interrupts.
|
||||
|
||||
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GNU EABI toolchain
|
||||
|
||||
nsh and nsh2:
|
||||
------------
|
||||
Configure the NuttShell (nsh) located at examples/nsh.
|
||||
@@ -599,7 +591,6 @@ Where <subdir> is one of the following:
|
||||
Built-in None apps/examples/nx
|
||||
Apps apps/examples/nxhello
|
||||
apps/system/usbmsc (4)
|
||||
apps/examples/buttons
|
||||
apps/examples/nximage
|
||||
=========== ======================= ================================
|
||||
|
||||
|
||||
@@ -1,117 +0,0 @@
|
||||
############################################################################
|
||||
# configs/hymini-stm32v/buttons/Make.defs
|
||||
#
|
||||
# Copyright (C) 2011, 2012 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
include ${TOPDIR}/.config
|
||||
include ${TOPDIR}/tools/Config.mk
|
||||
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
|
||||
|
||||
ifeq ($(CONFIG_STM32_DFU),y)
|
||||
LDSCRIPT = ld.script.dfu
|
||||
else
|
||||
LDSCRIPT = ld.script
|
||||
endif
|
||||
|
||||
ifeq ($(WINTOOL),y)
|
||||
# Windows-native toolchains
|
||||
DIRLINK = $(TOPDIR)/tools/copydir.sh
|
||||
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
|
||||
MKDEP = $(TOPDIR)/tools/mkwindeps.sh
|
||||
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
|
||||
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
|
||||
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
|
||||
else
|
||||
# Linux/Cygwin-native toolchain
|
||||
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
|
||||
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
|
||||
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
|
||||
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
|
||||
endif
|
||||
|
||||
CC = $(CROSSDEV)gcc
|
||||
CXX = $(CROSSDEV)g++
|
||||
CPP = $(CROSSDEV)gcc -E
|
||||
LD = $(CROSSDEV)ld
|
||||
AR = $(CROSSDEV)ar rcs
|
||||
NM = $(CROSSDEV)nm
|
||||
OBJCOPY = $(CROSSDEV)objcopy
|
||||
OBJDUMP = $(CROSSDEV)objdump
|
||||
|
||||
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
|
||||
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
|
||||
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
ARCHOPTIMIZATION = -g
|
||||
endif
|
||||
|
||||
ifneq ($(CONFIG_DEBUG_NOOPT),y)
|
||||
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
|
||||
endif
|
||||
|
||||
ARCHCFLAGS = -fno-builtin
|
||||
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
|
||||
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
|
||||
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
|
||||
ARCHDEFINES =
|
||||
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
|
||||
|
||||
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
|
||||
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
|
||||
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
|
||||
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
|
||||
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
|
||||
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
|
||||
|
||||
NXFLATLDFLAGS1 = -r -d -warn-common
|
||||
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
|
||||
LDNXFLATFLAGS = -e main -s 2048
|
||||
|
||||
ASMEXT = .S
|
||||
OBJEXT = .o
|
||||
LIBEXT = .a
|
||||
EXEEXT =
|
||||
|
||||
ifneq ($(CROSSDEV),arm-nuttx-elf-)
|
||||
LDFLAGS += -nostartfiles -nodefaultlibs
|
||||
endif
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
LDFLAGS += -g
|
||||
endif
|
||||
|
||||
|
||||
HOSTCC = gcc
|
||||
HOSTINCLUDES = -I.
|
||||
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
|
||||
HOSTLDFLAGS =
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,47 +0,0 @@
|
||||
#!/bin/bash
|
||||
# configs/hymini-stm32v/buttons/setenv.sh
|
||||
#
|
||||
# Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
|
||||
if [ "$(basename $0)" = "setenv.sh" ] ; then
|
||||
echo "You must source this script, not run it!" 1>&2
|
||||
exit 1
|
||||
fi
|
||||
|
||||
if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi
|
||||
|
||||
WD=`pwd`
|
||||
export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin"
|
||||
export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
|
||||
export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
|
||||
|
||||
echo "PATH : ${PATH}"
|
||||
@@ -61,11 +61,13 @@ CONFIG_ARCH_ARM=y
|
||||
# CONFIG_ARCH_AVR is not set
|
||||
# CONFIG_ARCH_HC is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_MISOC is not set
|
||||
# CONFIG_ARCH_RGMP is not set
|
||||
# CONFIG_ARCH_RENESAS is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_SIM is not set
|
||||
# CONFIG_ARCH_X86 is not set
|
||||
# CONFIG_ARCH_XTENSA is not set
|
||||
# CONFIG_ARCH_Z16 is not set
|
||||
# CONFIG_ARCH_Z80 is not set
|
||||
CONFIG_ARCH="arm"
|
||||
@@ -352,6 +354,12 @@ CONFIG_STM32_HAVE_ADC3=y
|
||||
# CONFIG_STM32_HAVE_ADC2_DMA is not set
|
||||
# CONFIG_STM32_HAVE_ADC3_DMA is not set
|
||||
# CONFIG_STM32_HAVE_ADC4_DMA is not set
|
||||
# CONFIG_STM32_HAVE_SDADC1 is not set
|
||||
# CONFIG_STM32_HAVE_SDADC2 is not set
|
||||
# CONFIG_STM32_HAVE_SDADC3 is not set
|
||||
# CONFIG_STM32_HAVE_SDADC1_DMA is not set
|
||||
# CONFIG_STM32_HAVE_SDADC2_DMA is not set
|
||||
# CONFIG_STM32_HAVE_SDADC3_DMA is not set
|
||||
CONFIG_STM32_HAVE_CAN1=y
|
||||
# CONFIG_STM32_HAVE_CAN2 is not set
|
||||
CONFIG_STM32_HAVE_DAC1=y
|
||||
@@ -707,14 +715,14 @@ CONFIG_DEV_NULL=y
|
||||
CONFIG_ARCH_HAVE_I2CRESET=y
|
||||
# CONFIG_I2C is not set
|
||||
CONFIG_SPI=y
|
||||
# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
|
||||
# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
|
||||
CONFIG_ARCH_HAVE_SPI_BITORDER=y
|
||||
# CONFIG_SPI_SLAVE is not set
|
||||
CONFIG_SPI_EXCHANGE=y
|
||||
# CONFIG_SPI_CMDDATA is not set
|
||||
# CONFIG_SPI_CALLBACK is not set
|
||||
# CONFIG_SPI_HWFEATURES is not set
|
||||
# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
|
||||
# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
|
||||
CONFIG_ARCH_HAVE_SPI_BITORDER=y
|
||||
# CONFIG_SPI_BITORDER is not set
|
||||
# CONFIG_SPI_CS_DELAY_CONTROL is not set
|
||||
# CONFIG_SPI_DRIVER is not set
|
||||
@@ -1170,20 +1178,8 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
|
||||
#
|
||||
# Examples
|
||||
#
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS=y
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_MIN=0
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_MAX=1
|
||||
CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
|
||||
CONFIG_EXAMPLES_IRQBUTTONS_MAX=1
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME0="Key A"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME1="Key B"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME2="Button 2"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME3="Button 3"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME4="Button 4"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME5="Button 5"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME6="Button 6"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME7="Button 7"
|
||||
# CONFIG_EXAMPLES_BUTTONS is not set
|
||||
# CONFIG_EXAMPLES_CCTYPE is not set
|
||||
# CONFIG_EXAMPLES_CHAT is not set
|
||||
# CONFIG_EXAMPLES_CONFIGDATA is not set
|
||||
# CONFIG_EXAMPLES_DHCPD is not set
|
||||
|
||||
@@ -61,11 +61,13 @@ CONFIG_ARCH_ARM=y
|
||||
# CONFIG_ARCH_AVR is not set
|
||||
# CONFIG_ARCH_HC is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_MISOC is not set
|
||||
# CONFIG_ARCH_RGMP is not set
|
||||
# CONFIG_ARCH_RENESAS is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_SIM is not set
|
||||
# CONFIG_ARCH_X86 is not set
|
||||
# CONFIG_ARCH_XTENSA is not set
|
||||
# CONFIG_ARCH_Z16 is not set
|
||||
# CONFIG_ARCH_Z80 is not set
|
||||
CONFIG_ARCH="arm"
|
||||
@@ -350,6 +352,12 @@ CONFIG_STM32_HAVE_ADC3=y
|
||||
# CONFIG_STM32_HAVE_ADC2_DMA is not set
|
||||
# CONFIG_STM32_HAVE_ADC3_DMA is not set
|
||||
# CONFIG_STM32_HAVE_ADC4_DMA is not set
|
||||
# CONFIG_STM32_HAVE_SDADC1 is not set
|
||||
# CONFIG_STM32_HAVE_SDADC2 is not set
|
||||
# CONFIG_STM32_HAVE_SDADC3 is not set
|
||||
# CONFIG_STM32_HAVE_SDADC1_DMA is not set
|
||||
# CONFIG_STM32_HAVE_SDADC2_DMA is not set
|
||||
# CONFIG_STM32_HAVE_SDADC3_DMA is not set
|
||||
CONFIG_STM32_HAVE_CAN1=y
|
||||
# CONFIG_STM32_HAVE_CAN2 is not set
|
||||
CONFIG_STM32_HAVE_DAC1=y
|
||||
@@ -684,6 +692,8 @@ CONFIG_DEV_NULL=y
|
||||
CONFIG_ARCH_HAVE_I2CRESET=y
|
||||
# CONFIG_I2C is not set
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
|
||||
# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
|
||||
CONFIG_ARCH_HAVE_SPI_BITORDER=y
|
||||
# CONFIG_I2S is not set
|
||||
|
||||
@@ -967,20 +977,8 @@ CONFIG_ARCH_HAVE_TLS=y
|
||||
#
|
||||
# Examples
|
||||
#
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS=y
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_MIN=0
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_MAX=1
|
||||
CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
|
||||
CONFIG_EXAMPLES_IRQBUTTONS_MAX=1
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME0="Key A"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME1="Key B"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME2="Button 2"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME3="Button 3"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME4="Button 4"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME5="Button 5"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME6="Button 6"
|
||||
CONFIG_EXAMPLES_ARCHBUTTONS_NAME7="Button 7"
|
||||
# CONFIG_EXAMPLES_BUTTONS is not set
|
||||
# CONFIG_EXAMPLES_CCTYPE is not set
|
||||
# CONFIG_EXAMPLES_CHAT is not set
|
||||
# CONFIG_EXAMPLES_CONFIGDATA is not set
|
||||
# CONFIG_EXAMPLES_DHCPD is not set
|
||||
|
||||
@@ -76,6 +76,11 @@ config MIKROE_RAMMTD_SIZE
|
||||
---help---
|
||||
Sets the size of static RAM allocation for the SMART RAM device
|
||||
|
||||
config MIKROE_QETIMER
|
||||
int "Timer to use with QE encoder"
|
||||
default 3
|
||||
depends on QENCODER
|
||||
|
||||
config PM_ALARM_SEC
|
||||
int "PM_STANDBY delay (seconds)"
|
||||
default 15
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/****************************************************************************************************
|
||||
* configs/mikroe-stm32f4/src/mikroe-stm32f4.h
|
||||
*
|
||||
* Copyright (C) 2011-2013 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011-2013, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -240,6 +240,18 @@ void weak_function stm32_usbinitialize(void);
|
||||
# error "The Mikroe-STM32F4 board does not support HOST OTG, only device!"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_qencoder_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize and register a qencoder
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_QENCODER
|
||||
int stm32_qencoder_initialize(FAR const char *devpath, int timer);
|
||||
#endif
|
||||
|
||||
/****************************************************************************************************
|
||||
* Name: stm32_lcdinitialize
|
||||
*
|
||||
|
||||
@@ -180,11 +180,7 @@ int board_app_initialize(uintptr_t arg)
|
||||
FAR struct spi_dev_s *spi;
|
||||
FAR struct mtd_dev_s *mtd;
|
||||
#endif
|
||||
#if defined(NSH_HAVEMMCSD) || defined(HAVE_USBHOST) || \
|
||||
defined(HAVE_USBMONITOR) || defined(CONFIG_LCD_MIO283QT2) || \
|
||||
defined(CONFIG_LCD_MIO283QT9A)
|
||||
int ret;
|
||||
#endif
|
||||
int ret = OK;
|
||||
|
||||
/* Configure SPI-based devices */
|
||||
|
||||
@@ -367,13 +363,24 @@ int board_app_initialize(uintptr_t arg)
|
||||
|
||||
#endif
|
||||
|
||||
/* Configure the Audio sub-system if enabled and bind it to SPI 3 */
|
||||
|
||||
#ifdef CONFIG_AUDIO
|
||||
|
||||
up_vs1053initialize(spi);
|
||||
#ifdef CONFIG_QENCODER
|
||||
/* Initialize and register the qencoder driver */
|
||||
|
||||
ret = stm32_qencoder_initialize("/dev/qe0", CONFIG_MIKROE_QETIMER);
|
||||
if (ret != OK)
|
||||
{
|
||||
syslog(LOG_ERR,
|
||||
"ERROR: Failed to register the qencoder: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
return OK;
|
||||
#ifdef CONFIG_AUDIO
|
||||
/* Configure the Audio sub-system if enabled and bind it to SPI 3 */
|
||||
|
||||
up_vs1053initialize(spi);
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* configs/mikroe_stm32f4/src/stm32_qencoder.c
|
||||
*
|
||||
* Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -50,83 +50,12 @@
|
||||
#include "stm32_qencoder.h"
|
||||
#include "mikroe-stm32f4.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
/* Configuration *******************************************************************/
|
||||
/* Check if we have a timer configured for quadrature encoder -- assume YES. */
|
||||
|
||||
#define HAVE_QENCODER 1
|
||||
|
||||
/* If TIMn is not enabled (via CONFIG_STM32_TIMn), then the configuration cannot
|
||||
* specify TIMn as a quadrature encoder (via CONFIG_STM32_TIMn_QE).
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_STM32_TIM1
|
||||
# undef CONFIG_STM32_TIM1_QE
|
||||
#endif
|
||||
#ifndef CONFIG_STM32_TIM2
|
||||
# undef CONFIG_STM32_TIM2_QE
|
||||
#endif
|
||||
#ifndef CONFIG_STM32_TIM3
|
||||
# undef CONFIG_STM32_TIM3_QE
|
||||
#endif
|
||||
#ifndef CONFIG_STM32_TIM4
|
||||
# undef CONFIG_STM32_TIM4_QE
|
||||
#endif
|
||||
#ifndef CONFIG_STM32_TIM5
|
||||
# undef CONFIG_STM32_TIM5_QE
|
||||
#endif
|
||||
#ifndef CONFIG_STM32_TIM8
|
||||
# undef CONFIG_STM32_TIM8_QE
|
||||
#endif
|
||||
|
||||
/* If the upper-half quadrature encoder driver is not enabled, then we cannot
|
||||
* support the quadrature encoder.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_QENCODER
|
||||
# undef HAVE_QENCODER
|
||||
#endif
|
||||
|
||||
/* Which Timer should we use, TIMID={1,2,3,4,5,8}. If multiple timers are
|
||||
* configured as quadrature encoders, this logic will arbitrarily select
|
||||
* the lowest numbered timer.
|
||||
*
|
||||
* At least one TIMn, n={1,2,3,4,5,8}, must be both enabled and configured
|
||||
* as a quadrature encoder in order to support the lower half quadrature
|
||||
* encoder driver. The above check assures that if CONFIG_STM32_TIMn_QE
|
||||
* is defined, then the correspdonding TIMn is also enabled.
|
||||
*/
|
||||
|
||||
#if defined CONFIG_STM32_TIM1_QE
|
||||
# define TIMID 1
|
||||
#elif defined CONFIG_STM32_TIM2_QE
|
||||
# define TIMID 2
|
||||
#elif defined CONFIG_STM32_TIM3_QE
|
||||
# define TIMID 3
|
||||
#elif defined CONFIG_STM32_TIM4_QE
|
||||
# define TIMID 4
|
||||
#elif defined CONFIG_STM32_TIM5_QE
|
||||
# define TIMID 5
|
||||
#elif defined CONFIG_STM32_TIM8_QE
|
||||
# define TIMID 8
|
||||
#else
|
||||
# undef HAVE_QENCODER
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_QENCODER
|
||||
|
||||
/************************************************************************************
|
||||
* Private Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: qe_devinit
|
||||
* Name: stm32_qencoder_initialize
|
||||
*
|
||||
* Description:
|
||||
* All STM32 architectures must provide the following interface to work with
|
||||
@@ -134,29 +63,20 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
int qe_devinit(void)
|
||||
int stm32_qencoder_initialize(FAR const char *devpath, int timer)
|
||||
{
|
||||
static bool initialized = false;
|
||||
int ret;
|
||||
|
||||
/* Check if we are already initialized */
|
||||
/* Initialize a quadrature encoder interface. */
|
||||
|
||||
if (!initialized)
|
||||
sninfo("Initializing the quadrature encoder using TIM%d\n", timer);
|
||||
ret = stm32_qeinitialize(devpath, timer);
|
||||
if (ret < 0)
|
||||
{
|
||||
/* Initialize a quadrature encoder interface. */
|
||||
|
||||
sninfo("Initializing the quadrature encoder using TIM%d\n", TIMID);
|
||||
ret = stm32_qeinitialize("/dev/qe0", TIMID);
|
||||
if (ret < 0)
|
||||
{
|
||||
snerr("ERROR: stm32_qeinitialize failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
initialized = true;
|
||||
snerr("ERROR: stm32_qeinitialize failed: %d\n", ret);
|
||||
}
|
||||
|
||||
return OK;
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* HAVE_QENCODER */
|
||||
|
||||
+153
-22
@@ -162,7 +162,7 @@ CONFIG_BOOT_RUNFROMFLASH=y
|
||||
# Boot Memory Configuration
|
||||
#
|
||||
CONFIG_RAM_START=0x40000000
|
||||
CONFIG_RAM_SIZE=524288
|
||||
CONFIG_RAM_SIZE=67108864
|
||||
# CONFIG_ARCH_HAVE_SDRAM is not set
|
||||
|
||||
#
|
||||
@@ -192,12 +192,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
|
||||
#
|
||||
# RTOS Features
|
||||
#
|
||||
CONFIG_DISABLE_OS_API=y
|
||||
CONFIG_DISABLE_POSIX_TIMERS=y
|
||||
CONFIG_DISABLE_PTHREAD=y
|
||||
CONFIG_DISABLE_SIGNALS=y
|
||||
CONFIG_DISABLE_MQUEUE=y
|
||||
CONFIG_DISABLE_ENVIRON=y
|
||||
# CONFIG_DISABLE_OS_API is not set
|
||||
|
||||
#
|
||||
# Clocks and Timers
|
||||
@@ -221,13 +216,19 @@ CONFIG_PREALLOC_TIMERS=0
|
||||
# CONFIG_INIT_NONE is not set
|
||||
CONFIG_INIT_ENTRYPOINT=y
|
||||
# CONFIG_INIT_FILEPATH is not set
|
||||
CONFIG_USER_ENTRYPOINT="hello_main"
|
||||
CONFIG_RR_INTERVAL=0
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
CONFIG_RR_INTERVAL=200
|
||||
# CONFIG_SCHED_SPORADIC is not set
|
||||
CONFIG_TASK_NAME_SIZE=0
|
||||
CONFIG_MAX_TASKS=4
|
||||
CONFIG_MAX_TASKS=16
|
||||
# CONFIG_SCHED_HAVE_PARENT is not set
|
||||
# CONFIG_SCHED_WAITPID is not set
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
|
||||
#
|
||||
# Pthread Options
|
||||
#
|
||||
# CONFIG_MUTEX_TYPES is not set
|
||||
CONFIG_NPTHREAD_KEYS=4
|
||||
|
||||
#
|
||||
# Performance Monitoring
|
||||
@@ -254,19 +255,36 @@ CONFIG_NAME_MAX=32
|
||||
# CONFIG_SCHED_STARTHOOK is not set
|
||||
# CONFIG_SCHED_ATEXIT is not set
|
||||
# CONFIG_SCHED_ONEXIT is not set
|
||||
|
||||
#
|
||||
# Signal Numbers
|
||||
#
|
||||
CONFIG_SIG_SIGUSR1=1
|
||||
CONFIG_SIG_SIGUSR2=2
|
||||
CONFIG_SIG_SIGALARM=3
|
||||
CONFIG_SIG_SIGCONDTIMEDOUT=16
|
||||
|
||||
#
|
||||
# POSIX Message Queue Options
|
||||
#
|
||||
CONFIG_PREALLOC_MQ_MSGS=32
|
||||
CONFIG_MQ_MAXMSGSIZE=32
|
||||
# CONFIG_MODULE is not set
|
||||
|
||||
#
|
||||
# Work queue support
|
||||
#
|
||||
# CONFIG_SCHED_WORKQUEUE is not set
|
||||
# CONFIG_SCHED_HPWORK is not set
|
||||
# CONFIG_SCHED_LPWORK is not set
|
||||
|
||||
#
|
||||
# Stack and heap information
|
||||
#
|
||||
CONFIG_IDLETHREAD_STACKSIZE=512
|
||||
CONFIG_USERMAIN_STACKSIZE=512
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_USERMAIN_STACKSIZE=2048
|
||||
CONFIG_PTHREAD_STACK_MIN=256
|
||||
CONFIG_PTHREAD_STACK_DEFAULT=1024
|
||||
CONFIG_PTHREAD_STACK_DEFAULT=2048
|
||||
# CONFIG_LIB_SYSCALL is not set
|
||||
|
||||
#
|
||||
@@ -431,7 +449,9 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
|
||||
# CONFIG_FS_READABLE is not set
|
||||
# CONFIG_FS_WRITABLE is not set
|
||||
# CONFIG_FS_NAMED_SEMAPHORES is not set
|
||||
CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
|
||||
# CONFIG_FS_RAMMAP is not set
|
||||
# CONFIG_FS_BINFS is not set
|
||||
# CONFIG_FS_PROCFS is not set
|
||||
# CONFIG_FS_UNIONFS is not set
|
||||
|
||||
@@ -461,9 +481,10 @@ CONFIG_MM_REGIONS=1
|
||||
# Binary Loader
|
||||
#
|
||||
# CONFIG_BINFMT_DISABLE is not set
|
||||
# CONFIG_BINFMT_EXEPATH is not set
|
||||
# CONFIG_NXFLAT is not set
|
||||
# CONFIG_ELF is not set
|
||||
# CONFIG_BUILTIN is not set
|
||||
CONFIG_BUILTIN=y
|
||||
# CONFIG_PIC is not set
|
||||
# CONFIG_SYMTAB_ORDEREDBYNAME is not set
|
||||
|
||||
@@ -477,6 +498,7 @@ CONFIG_MM_REGIONS=1
|
||||
CONFIG_STDIO_BUFFER_SIZE=0
|
||||
CONFIG_STDIO_LINEBUFFER=y
|
||||
CONFIG_NUNGET_CHARS=0
|
||||
CONFIG_LIB_HOMEDIR="/"
|
||||
# CONFIG_LIBM is not set
|
||||
# CONFIG_NOPRINTF_FIELDWIDTH is not set
|
||||
# CONFIG_LIBC_FLOATINGPOINT is not set
|
||||
@@ -495,6 +517,7 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
|
||||
# CONFIG_LIBC_STRERROR is not set
|
||||
# CONFIG_LIBC_PERROR_STDOUT is not set
|
||||
CONFIG_ARCH_LOWPUTC=y
|
||||
# CONFIG_LIBC_LOCALTIME is not set
|
||||
# CONFIG_TIME_EXTENDED is not set
|
||||
CONFIG_LIB_SENDFILE_BUFSIZE=512
|
||||
# CONFIG_ARCH_ROMGETC is not set
|
||||
@@ -520,6 +543,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
|
||||
# Application Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# Built-In Applications
|
||||
#
|
||||
CONFIG_BUILTIN_PROXY_STACKSIZE=1024
|
||||
|
||||
#
|
||||
# CAN Utilities
|
||||
#
|
||||
@@ -546,16 +574,22 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
|
||||
# CONFIG_EXAMPLES_MODBUS is not set
|
||||
# CONFIG_EXAMPLES_MOUNT is not set
|
||||
# CONFIG_EXAMPLES_NRF24L01TERM is not set
|
||||
# CONFIG_EXAMPLES_NSH is not set
|
||||
CONFIG_EXAMPLES_NSH=y
|
||||
# CONFIG_EXAMPLES_NULL is not set
|
||||
# CONFIG_EXAMPLES_NX is not set
|
||||
# CONFIG_EXAMPLES_NXFFS is not set
|
||||
# CONFIG_EXAMPLES_NXHELLO is not set
|
||||
# CONFIG_EXAMPLES_NXIMAGE is not set
|
||||
# CONFIG_EXAMPLES_NX is not set
|
||||
# CONFIG_EXAMPLES_NXLINES is not set
|
||||
# CONFIG_EXAMPLES_NXTERM is not set
|
||||
# CONFIG_EXAMPLES_NXTEXT is not set
|
||||
# CONFIG_EXAMPLES_OSTEST is not set
|
||||
CONFIG_EXAMPLES_OSTEST=y
|
||||
CONFIG_EXAMPLES_OSTEST_LOOPS=1
|
||||
CONFIG_EXAMPLES_OSTEST_STACKSIZE=8192
|
||||
CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8
|
||||
CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
|
||||
CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
|
||||
CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
|
||||
# CONFIG_EXAMPLES_PCA9635 is not set
|
||||
# CONFIG_EXAMPLES_POSIXSPAWN is not set
|
||||
# CONFIG_EXAMPLES_PPPD is not set
|
||||
@@ -568,6 +602,7 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
|
||||
# CONFIG_EXAMPLES_SERLOOP is not set
|
||||
# CONFIG_EXAMPLES_SLCD is not set
|
||||
# CONFIG_EXAMPLES_SMART is not set
|
||||
# CONFIG_EXAMPLES_SMART_TEST is not set
|
||||
# CONFIG_EXAMPLES_SMP is not set
|
||||
# CONFIG_EXAMPLES_TCPECHO is not set
|
||||
# CONFIG_EXAMPLES_TELNETD is not set
|
||||
@@ -618,7 +653,98 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
|
||||
#
|
||||
# NSH Library
|
||||
#
|
||||
# CONFIG_NSH_LIBRARY is not set
|
||||
CONFIG_NSH_LIBRARY=y
|
||||
# CONFIG_NSH_MOTD is not set
|
||||
|
||||
#
|
||||
# Command Line Configuration
|
||||
#
|
||||
# CONFIG_NSH_READLINE is not set
|
||||
CONFIG_NSH_CLE=y
|
||||
CONFIG_NSH_LINELEN=80
|
||||
# CONFIG_NSH_DISABLE_SEMICOLON is not set
|
||||
CONFIG_NSH_MAXARGUMENTS=6
|
||||
CONFIG_NSH_ARGCAT=y
|
||||
CONFIG_NSH_NESTDEPTH=3
|
||||
# CONFIG_NSH_DISABLEBG is not set
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
|
||||
#
|
||||
# Disable Individual commands
|
||||
#
|
||||
# CONFIG_NSH_DISABLE_ADDROUTE is not set
|
||||
# CONFIG_NSH_DISABLE_BASENAME is not set
|
||||
# CONFIG_NSH_DISABLE_CAT is not set
|
||||
# CONFIG_NSH_DISABLE_CD is not set
|
||||
# CONFIG_NSH_DISABLE_CP is not set
|
||||
# CONFIG_NSH_DISABLE_CMP is not set
|
||||
CONFIG_NSH_DISABLE_DATE=y
|
||||
# CONFIG_NSH_DISABLE_DD is not set
|
||||
# CONFIG_NSH_DISABLE_DF is not set
|
||||
# CONFIG_NSH_DISABLE_DELROUTE is not set
|
||||
# CONFIG_NSH_DISABLE_DIRNAME is not set
|
||||
# CONFIG_NSH_DISABLE_ECHO is not set
|
||||
# CONFIG_NSH_DISABLE_EXEC is not set
|
||||
# CONFIG_NSH_DISABLE_EXIT is not set
|
||||
# CONFIG_NSH_DISABLE_FREE is not set
|
||||
# CONFIG_NSH_DISABLE_GET is not set
|
||||
# CONFIG_NSH_DISABLE_HELP is not set
|
||||
# CONFIG_NSH_DISABLE_HEXDUMP is not set
|
||||
CONFIG_NSH_DISABLE_IFCONFIG=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
# CONFIG_NSH_DISABLE_KILL is not set
|
||||
# CONFIG_NSH_DISABLE_LOSETUP is not set
|
||||
CONFIG_NSH_DISABLE_LOSMART=y
|
||||
# CONFIG_NSH_DISABLE_LS is not set
|
||||
# CONFIG_NSH_DISABLE_MB is not set
|
||||
# CONFIG_NSH_DISABLE_MKDIR is not set
|
||||
# CONFIG_NSH_DISABLE_MKRD is not set
|
||||
# CONFIG_NSH_DISABLE_MH is not set
|
||||
# CONFIG_NSH_DISABLE_MOUNT is not set
|
||||
# CONFIG_NSH_DISABLE_MV is not set
|
||||
# CONFIG_NSH_DISABLE_MW is not set
|
||||
CONFIG_NSH_DISABLE_PRINTF=y
|
||||
CONFIG_NSH_DISABLE_PS=y
|
||||
# CONFIG_NSH_DISABLE_PUT is not set
|
||||
# CONFIG_NSH_DISABLE_PWD is not set
|
||||
# CONFIG_NSH_DISABLE_RM is not set
|
||||
# CONFIG_NSH_DISABLE_RMDIR is not set
|
||||
# CONFIG_NSH_DISABLE_SET is not set
|
||||
# CONFIG_NSH_DISABLE_SH is not set
|
||||
# CONFIG_NSH_DISABLE_SLEEP is not set
|
||||
# CONFIG_NSH_DISABLE_TIME is not set
|
||||
# CONFIG_NSH_DISABLE_TEST is not set
|
||||
# CONFIG_NSH_DISABLE_UMOUNT is not set
|
||||
# CONFIG_NSH_DISABLE_UNAME is not set
|
||||
# CONFIG_NSH_DISABLE_UNSET is not set
|
||||
# CONFIG_NSH_DISABLE_USLEEP is not set
|
||||
# CONFIG_NSH_DISABLE_WGET is not set
|
||||
# CONFIG_NSH_DISABLE_XD is not set
|
||||
CONFIG_NSH_MMCSDMINOR=0
|
||||
|
||||
#
|
||||
# Configure Command Options
|
||||
#
|
||||
CONFIG_NSH_CMDOPT_DF_H=y
|
||||
CONFIG_NSH_CODECS_BUFSIZE=128
|
||||
CONFIG_NSH_CMDOPT_HEXDUMP=y
|
||||
CONFIG_NSH_FILEIOSIZE=1024
|
||||
|
||||
#
|
||||
# Scripting Support
|
||||
#
|
||||
# CONFIG_NSH_DISABLESCRIPT is not set
|
||||
# CONFIG_NSH_DISABLE_ITEF is not set
|
||||
# CONFIG_NSH_DISABLE_LOOPS is not set
|
||||
|
||||
#
|
||||
# Console Configuration
|
||||
#
|
||||
CONFIG_NSH_CONSOLE=y
|
||||
# CONFIG_NSH_ALTCONDEV is not set
|
||||
# CONFIG_NSH_ARCHINIT is not set
|
||||
# CONFIG_NSH_LOGIN is not set
|
||||
# CONFIG_NSH_CONSOLE_LOGIN is not set
|
||||
|
||||
#
|
||||
# NxWidgets/NxWM
|
||||
@@ -632,16 +758,21 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
|
||||
#
|
||||
# System Libraries and NSH Add-Ons
|
||||
#
|
||||
# CONFIG_SYSTEM_CLE is not set
|
||||
CONFIG_SYSTEM_CLE=y
|
||||
CONFIG_SYSTEM_CLE_DEBUGLEVEL=0
|
||||
# CONFIG_SYSTEM_CUTERM is not set
|
||||
# CONFIG_SYSTEM_FREE is not set
|
||||
# CONFIG_SYSTEM_HEX2BIN is not set
|
||||
# CONFIG_SYSTEM_HEXED is not set
|
||||
# CONFIG_SYSTEM_INSTALL is not set
|
||||
# CONFIG_SYSTEM_RAMTEST is not set
|
||||
# CONFIG_READLINE_HAVE_EXTMATCH is not set
|
||||
# CONFIG_SYSTEM_READLINE is not set
|
||||
CONFIG_READLINE_HAVE_EXTMATCH=y
|
||||
CONFIG_SYSTEM_READLINE=y
|
||||
CONFIG_READLINE_ECHO=y
|
||||
# CONFIG_READLINE_TABCOMPLETION is not set
|
||||
# CONFIG_READLINE_CMD_HISTORY is not set
|
||||
# CONFIG_SYSTEM_SUDOKU is not set
|
||||
# CONFIG_SYSTEM_SYSTEM is not set
|
||||
# CONFIG_SYSTEM_TEE is not set
|
||||
# CONFIG_SYSTEM_UBLOXMODEM is not set
|
||||
# CONFIG_SYSTEM_VI is not set
|
||||
|
||||
@@ -884,7 +884,6 @@ CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0"
|
||||
CONFIG_EXAMPLES_ADC_NSAMPLES=0
|
||||
CONFIG_EXAMPLES_ADC_GROUPSIZE=4
|
||||
CONFIG_EXAMPLES_ADC_SWTRIG=y
|
||||
# CONFIG_EXAMPLES_ARCHBUTTONS is not set
|
||||
# CONFIG_EXAMPLES_BUTTONS is not set
|
||||
# CONFIG_EXAMPLES_CCTYPE is not set
|
||||
# CONFIG_EXAMPLES_CHAT is not set
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user