RISC-V: Initial support for CONFIG_BUILD_KERNEL

This implements initial support for kernel build (address environments,
page allocator) for RISC-V.

This is done a bit differently compared to the ARMV7 implementation:

- Support implemented for Sv39 MMU, however the implementation should be
  extensible for other MMU types also.
- Instead of preserving and moving the L1 references around, a canonical
  approach is used instead, where the page table base address register
  is switched upon context switch.
- To preserve a bit of memory, only a single L1/L2 table is supported,
  this gives access to 1GiB of virtual memory for each process, which
  should be more than enough.

Some things worth noting:
- Assumes page pool is mapped with vaddr=paddr mappings
- The CONFIG_ARCH_XXXX_VBASE and CONFIG_ARCH_XXXX_NPAGES values are
  ignored, with the exception of CONFIG_ARCH_DATA_VBASE which is used
  for ARCH_DATA_RESERVE
- ARCH_DATA_RESERVE is placed at the beginning of the userspace task's
  address environment
This commit is contained in:
Ville Juven
2022-03-11 13:35:39 +02:00
committed by Xiang Xiao
parent 61f3bd10a5
commit 57127b9429
6 changed files with 1077 additions and 2 deletions
+2
View File
@@ -111,6 +111,8 @@ config ARCH_CHIP_MPFS
select ARCH_HAVE_MPU
select ARCH_HAVE_MMU
select ARCH_MMU_TYPE_SV39
select ARCH_HAVE_ADDRENV
select ARCH_NEED_ADDRENV_MAPPING
select ARCH_HAVE_RESET
select ARCH_HAVE_SPI_CS_CONTROL
select ARCH_HAVE_PWM_MULTICHAN
+67
View File
@@ -33,6 +33,7 @@
#ifndef __ASSEMBLY__
# include <stdint.h>
# include <stddef.h>
#endif
/****************************************************************************
@@ -70,6 +71,18 @@
#define STACK_ALIGNMENT 16
#define STACK_FRAME_SIZE __XSTR(STACK_ALIGNMENT)
/* Provide the maximum amount of page table levels per MMU type */
#ifdef CONFIG_ARCH_MMU_TYPE_SV39
# define ARCH_PGT_MAX_LEVELS (3)
#endif
/* Amount of static page tables allocated for an address environment */
#ifdef CONFIG_ARCH_ADDRENV
# define ARCH_SPGTS (ARCH_PGT_MAX_LEVELS - 1)
#endif
/****************************************************************************
* Inline functions
****************************************************************************/
@@ -97,6 +110,60 @@ static inline uintptr_t up_getsp(void)
* Public Types
****************************************************************************/
#ifdef CONFIG_ARCH_ADDRENV
#ifndef __ASSEMBLY__
/* A task group must have its L1 table in memory always, and the rest can
* be dynamically committed to memory (and even swapped).
*
* In this implementation every level tables besides the final level N are
* kept in memory always, while the level N tables are dynamically allocated.
*
* The implications ? They depend on the MMU type.
*
* For Sv39 this means that:
* - A task can not have more than 1GB of memory allocated. This should be
* plenty enough...
* - The minimum amount of memory needed for page tables per task is 12K,
* which gives access to 2MB of memory. This is plenty for many tasks.
*/
struct group_addrenv_s
{
/* Pointers to MAX_LEVELS-1 tables here, one of each are allocated for the
* task when it is created.
*/
uintptr_t spgtables[ARCH_SPGTS];
/* For convenience store the text base here */
uintptr_t textvbase;
/* For convenience store the data base here */
uintptr_t datavbase;
/* For convenience store the heap base and initial size here */
uintptr_t heapvbase;
size_t heapsize;
/* For convenience store the satp value here */
uintptr_t satp;
};
typedef struct group_addrenv_s group_addrenv_t;
/* If an address environment needs to be saved, saving the satp register
* will suffice. The register width is architecture dependent
*/
typedef uintptr_t save_addrenv_t;
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_ARCH_ADDRENV */
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
File diff suppressed because it is too large Load Diff
+29 -2
View File
@@ -26,6 +26,10 @@
#define RV_MMU_PAGE_SHIFT (12)
#define RV_MMU_PAGE_SIZE (1 << RV_MMU_PAGE_SHIFT) /* 4K pages */
/* Entries per PGT */
#define RV_MMU_PAGE_ENTRIES (RV_MMU_PAGE_SIZE / sizeof(uintptr_t))
/* Supervisor Address Translation and Protection (satp) */
#define SATP_PPN_SHIFT (0)
@@ -90,10 +94,10 @@
#ifdef CONFIG_ARCH_MMU_TYPE_SV39
#define RV_MMU_PTE_PADDR_SHIFT (10)
#define RV_MMU_PTE_PPN_MASK ((1 << RV_MMU_PTE_PADDR_SHIFT) - 1)
#define RV_MMU_PTE_PPN_MASK (((1ul << 44) - 1) << RV_MMU_PTE_PADDR_SHIFT)
#define RV_MMU_PTE_PPN_SHIFT (2)
#define RV_MMU_VPN_WIDTH (9)
#define RV_MMU_VPN_MASK ((1 << RV_MMU_VPN_WIDTH) - 1)
#define RV_MMU_VPN_MASK ((1ul << RV_MMU_VPN_WIDTH) - 1)
#define RV_MMU_PT_LEVELS (3)
#define RV_MMU_VADDR_SHIFT(_n) (RV_MMU_PAGE_SHIFT + RV_MMU_VPN_WIDTH * \
(RV_MMU_PT_LEVELS - (_n)))
@@ -244,6 +248,28 @@ static inline void mmu_enable(uintptr_t pgbase, uint16_t asid)
mmu_write_satp(reg);
}
/****************************************************************************
* Name: mmu_pte_to_paddr
*
* Description:
* Extract physical address from PTE
*
* Input Parameters:
* pte - Page table entry
*
* Returned Value:
* Physical address from PTE
*
****************************************************************************/
static inline uintptr_t mmu_pte_to_paddr(uintptr_t pte)
{
uintptr_t paddr = pte;
paddr &= RV_MMU_PTE_PPN_MASK; /* Remove flags */
paddr <<= RV_MMU_PTE_PPN_SHIFT; /* Move to correct position */
return paddr;
}
/****************************************************************************
* Name: mmu_ln_setentry
*
@@ -279,6 +305,7 @@ void mmu_ln_setentry(uint32_t ptlevel, uintptr_t lnvaddr, uintptr_t paddr,
* level n
* vaddr - The virtual address to get pte for. Must be aligned to a PPN
* address boundary which is dependent on the level of the entry
*
****************************************************************************/
uintptr_t mmu_ln_getentry(uint32_t ptlevel, uintptr_t lnvaddr,
+222
View File
@@ -0,0 +1,222 @@
/****************************************************************************
* arch/risc-v/src/common/riscv_pgalloc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <string.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/addrenv.h>
#include <nuttx/irq.h>
#include <nuttx/pgalloc.h>
#include <nuttx/sched.h>
#include <arch/barriers.h>
#include "riscv_mmu.h"
#ifdef CONFIG_BUILD_KERNEL
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Last PGT level */
#define PGT_LAST (RV_MMU_PT_LEVELS)
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: wipe_page
*
* Description:
* Wipe a page of physical memory, first mapping it into virtual memory.
*
* Input Parameters:
* paddr - Physical address of page
*
****************************************************************************/
static inline void wipe_page(uintptr_t paddr)
{
uintptr_t vaddr = paddr;
memset((void *)vaddr, 0, MM_PGSIZE);
}
/****************************************************************************
* Name: get_pgtable
*
* Description:
* Get the physical address of the last page table level corresponding to
* 'vaddr'
*
****************************************************************************/
static uintptr_t get_pgtable(group_addrenv_t *addrenv, uintptr_t vaddr)
{
uintptr_t paddr;
uintptr_t ptprev;
uint32_t ptlevel;
/* Get the current level MAX_LEVELS-1 entry corresponding to this vaddr */
ptlevel = ARCH_SPGTS;
ptprev = addrenv->spgtables[ARCH_SPGTS - 1];
paddr = mmu_pte_to_paddr(mmu_ln_getentry(ptlevel, ptprev, vaddr));
if (!paddr)
{
/* No page table has been allocated... allocate one now */
paddr = mm_pgalloc(1);
if (paddr)
{
/* Wipe the page and assign it */
wipe_page(paddr);
mmu_ln_setentry(ptlevel, ptprev, paddr, vaddr, MMU_UPGT_FLAGS);
}
}
/* Flush the data cache, so the changes are committed to memory */
__DMB();
return paddr;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: pgalloc
*
* Description:
* If there is a page allocator in the configuration and if and MMU is
* available to map physical addresses to virtual address, then function
* must be provided by the platform-specific code. This is part of the
* implementation of sbrk(). This function will allocate the requested
* number of pages using the page allocator and map them into consecutive
* virtual addresses beginning with 'brkaddr'
*
* NOTE: This function does not use the up_ naming standard because it
* is indirectly callable from user-space code via a system trap.
* Therefore, it is a system interface and follows a different naming
* convention.
*
* Input Parameters:
* brkaddr - The heap break address. The next page will be allocated and
* mapped to this address. Must be page aligned. If the memory manager
* has not yet been initialized and this is the first block requested for
* the heap, then brkaddr should be zero. pgalloc will then assigned the
* well-known virtual address of the beginning of the heap.
* npages - The number of pages to allocate and map. Mapping of pages
* will be contiguous beginning beginning at 'brkaddr'
*
* Returned Value:
* The (virtual) base address of the mapped page will returned on success.
* Normally this will be the same as the 'brkaddr' input. However, if
* the 'brkaddr' input was zero, this will be the virtual address of the
* beginning of the heap. Zero is returned on any failure.
*
****************************************************************************/
uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages)
{
struct tcb_s *tcb = nxsched_self();
struct task_group_s *group;
uintptr_t ptlast;
uintptr_t paddr;
uintptr_t vaddr;
DEBUGASSERT(tcb && tcb->group);
group = tcb->group;
/* The current implementation only supports extending the user heap
* region as part of the implementation of user sbrk(). This function
* needs to be expanded to also handle (1) extending the user stack
* space and (2) extending the kernel memory regions as well.
*/
DEBUGASSERT((group->tg_flags & GROUP_FLAG_ADDRENV) != 0);
/* brkaddr = 0 means that no heap has yet been allocated */
if (!brkaddr)
{
brkaddr = group->tg_addrenv.heapvbase;
}
/* Start mapping from the old heap break address */
vaddr = brkaddr;
/* Sanity checks */
DEBUGASSERT(brkaddr >= group->tg_addrenv.heapvbase);
DEBUGASSERT(MM_ISALIGNED(brkaddr));
for (; npages > 0; npages--)
{
/* Get the address of the last level page table */
ptlast = get_pgtable(&group->tg_addrenv, vaddr);
if (!ptlast)
{
return 0;
}
/* Allocate physical memory for the new heap */
paddr = mm_pgalloc(1);
if (!paddr)
{
return 0;
}
/* Wipe the memory */
wipe_page(paddr);
/* Then add the reference */
mmu_ln_setentry(PGT_LAST, ptlast, paddr, vaddr, MMU_UDATA_FLAGS);
vaddr += MM_PGSIZE;
}
/* Flush the data cache, so the changes are committed to memory */
__DMB();
return brkaddr;
}
#endif /* CONFIG_BUILD_KERNEL */
+1
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@@ -32,6 +32,7 @@
#include <syscall.h>
#include <arch/irq.h>
#include <nuttx/addrenv.h>
#include <nuttx/sched.h>
#include <nuttx/userspace.h>