Port logic to enable PCK6 in tickless mode from the samv71-xult to the same70-xplained

This commit is contained in:
Gregory Nutt
2015-12-04 12:37:00 -06:00
parent 2e8e851d99
commit 5480d18026
4 changed files with 64 additions and 28 deletions
+14 -6
View File
@@ -921,8 +921,8 @@ Tickless OS
will have an error of 0.6% and will have inaccuracies that will
effect the time due to long term error build-up.
UPDATE: As of this writing (2015-12-03), the Tickless support is
functional. However, there are inaccuracies in delays. For example,
Using the slow clock clock input, the Tickless support is functional,
however, there are inaccuracies in delays. For example,
nsh> sleep 10
@@ -936,10 +936,18 @@ Tickless OS
piece has a large error in the calculation. The cumulative error is the
cause of the problem.
Solution: 30.518 microseconds is not representable and the value of
CONFIG_USEC_PER_SEC is too inaccurate; error build-up is throwing off
long delays (short delays are probably still okay). We should driver
the interval timer with PCK6 with a period that is exactly representable.
Solution: The same70-xplained/src/sam_boot.c file has additional logic
to enable the programmable clock PCK6 as a clock source for the
timer/counters if the Tickless mode is selected. The ideal frequency
would be:
frequency = 1,000,000 / CONFIG_USEC_PER_TICK
The main crystal is selected as the frequency source. The maximum
prescaler value is 256 so the minimum frequency is 46,875 Hz which
corresponds to a period of 21.3 microseconds. A value of
CONFIG_USEC_PER_TICK=20, or 50KHz, would give an exact solution with
a divider of 240.
SAME70 Timer Usage
------------------
+36 -8
View File
@@ -39,23 +39,20 @@
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/clock.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "sam_start.h"
#include "sam_pck.h"
#include "same70-xplained.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -73,6 +70,37 @@
void sam_boardinitialize(void)
{
#ifdef CONFIG_SCHED_TICKLESS
uint32_t frequency;
uint32_t actual;
/* If Tickless mode is selected then enabled PCK6 as a possible clock
* source for the timer/counters. The ideal frequency could be:
*
* frequency = 1,000,000 / CONFIG_USEC_PER_TICK
*
* The main crystal is selected as the frequency source. The maximum
* prescaler value is 256 so the minimum frequency is 46,875 Hz which
* corresponds to a period of 21.3 microseconds. A value of
* CONFIG_USEC_PER_TICK=20, or 50KHz, would give an exact solution with
* a divider of 240.
*/
frequency = USEC_PER_SEC / CONFIG_USEC_PER_TICK;
DEBUGASSERT(frequency >= (BOARD_MAINOSC_FREQUENCY / 256));
actual = sam_pck_configure(PCK6, PCKSRC_MAINCK, frequency);
/* We expect to achieve this frequency exactly */
DEBUGASSERT(actual == frequency);
UNUSED(actual);
/* Enable PCK6 */
(void)sam_pck_enable(PCK6, true);
#endif
#ifdef CONFIG_SAMV7_SDRAMC
/* Configure SDRAM if it has been enabled in the NuttX configuration.
* Here we assume, of course, that we are not running out SDRAM.
+14 -6
View File
@@ -1506,8 +1506,8 @@ Tickless OS
will have an error of 0.6% and will have inaccuracies that will
effect the time due to long term error build-up.
UPDATE: As of this writing (2015-12-03), the Tickless support is
functional. However, there are inaccuracies in delays. For example,
Using the slow clock clock input, the Tickless support is functional,
however, there are inaccuracies in delays. For example,
nsh> sleep 10
@@ -1521,10 +1521,18 @@ Tickless OS
piece has a large error in the calculation. The cumulative error is the
cause of the problem.
Solution: 30.518 microseconds is not representable and the value of
CONFIG_USEC_PER_SEC is too inaccurate; error build-up is throwing off
long delays (short delays are probably still okay). We should driver
the interval timer with PCK6 with a period that is exactly representable.
Solution: The samv71-xult/src/sam_boot.c file has additional logic
to enable the programmable clock PCK6 as a clock source for the
timer/counters if the Tickless mode is selected. The ideal frequency
would be:
frequency = 1,000,000 / CONFIG_USEC_PER_TICK
The main crystal is selected as the frequency source. The maximum
prescaler value is 256 so the minimum frequency is 46,875 Hz which
corresponds to a period of 21.3 microseconds. A value of
CONFIG_USEC_PER_TICK=20, or 50KHz, would give an exact solution with
a divider of 240.
SAMV7 Timer Usage
-----------------
-8
View File
@@ -53,14 +53,6 @@
#include "sam_pck.h"
#include "samv71-xult.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/