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arch/arm/src/stm32h5: Add support for USB host
Added stm32_usbdrdhost.c which adds USB FS host mode support using the embedded PHY. Added Kconfig to select Device or Host. Example config nucleo-h563zi:usbmsc added to test functionality Signed-off-by: daniellizewski <daniellizewski@geotab.com>
This commit is contained in:
daniellizewski
committed by
Xiang Xiao
Xiang Xiao
parent
5c9de46c79
commit
532fede38b
@@ -49,7 +49,7 @@ OCTOSPI Yes Implemented as QSPI.
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PWR Yes Partial.
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SPI Yes
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TIM Yes
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USB_FS Yes USB Device Support.
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USB_FS Yes USB Device and Host Support.
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AES No
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CEC No
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@@ -86,6 +86,26 @@ WWDG No
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========== ======= =====
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USB FS Host
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-----------
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STM32 USB FS Host Driver Support. The STM32H5 is equipped with a Dual Role USB device
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capable of operating as a device or host.
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Pre-requisites:
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- CONFIG_USBHOST - Enable USB host support
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- CONFIG_STM32H5_USBFS_HOST - Enable the STM32 USB OTG FS block in host mode
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USB host requires a stable 48MHz clock. This should come from a PLL driven by the HSE.
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HSI48 cannot be reliably used in host mode due to drift. It can only be used in device mode.
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Options:
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- STM32H5_USBDRD_NCHANNELS - Number of host channels. Default 8
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- STM32H5_USBDRD_DESCSIZE - Maximum size of a descriptor. Default: 128
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References
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=================
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[RM0481] Reference Manual: STM32H523/33xx, STM32H562/63xx, and STM32H573xx Arm® -based 32-bit MCUs
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@@ -96,6 +96,10 @@ if(CONFIG_STM32H5_USBFS)
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list(APPEND SRCS stm32_usbfs.c)
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endif()
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if(CONFIG_STM32H5_USBFS_HOST)
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list(APPEND SRCS stm32_usbdrdhost.c)
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endif()
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if(CONFIG_STM32H5_ETHMAC)
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list(APPEND SRCS stm32_ethernet.c)
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endif()
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@@ -651,12 +651,30 @@ config STM32H5_TIM17
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endmenu # STM32H5 Timer Selection
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choice STM32H5_USBFS_MODE
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prompt "USB FS Mode"
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depends on STM32H5_HAVE_USBFS
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default STM32H5_USBFS_NONE
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---help---
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Select the operating mode for the USB_DRD_FS peripheral.
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The hardware supports Device or Host, but not simultaneously.
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config STM32H5_USBFS_NONE
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bool "Disabled"
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config STM32H5_USBFS
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bool "USB Device"
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default n
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depends on STM32H5_HAVE_USBFS
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select USBDEV
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config STM32H5_USBFS_HOST
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bool "USB Host"
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select USBHOST_HAVE_ASYNCH
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select USBHOST
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---help---
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Enable USB host mode for USB_DRD_FS peripheral.
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endchoice
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endmenu # STM32H5 Peripheral Selection
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menu "DTS Configuration"
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@@ -4473,7 +4491,7 @@ endmenu # Timer Configuration
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comment "USB Device Configuration"
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menu "USB Full Speed Debug Configuration"
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menu "USB Full Speed Device Configuration"
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depends on STM32H5_USBFS
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config STM32H5_USBFS_REGDEBUG
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@@ -4485,6 +4503,28 @@ config STM32H5_USBFS_REGDEBUG
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endmenu
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comment "USB Host Configuration"
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menu "USB Full Speed Host Configuration"
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depends on STM32H5_USBFS_HOST
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config STM32H5_USBDRD_NCHANNELS
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int "Number of host channels"
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default 8
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range 1 8
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depends on STM32H5_USBFS_HOST
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---help---
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Number of USB host channels to use.
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config STM32H5_USBDRD_DESCSIZE
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int "Descriptor buffer size"
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default 128
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depends on STM32H5_USBFS_HOST
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---help---
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Size of descriptor/request buffers.
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endmenu
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config STM32H5_SERIALDRIVER
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bool
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@@ -92,6 +92,10 @@ ifeq ($(CONFIG_STM32H5_USBFS),y)
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CHIP_CSRCS += stm32_usbfs.c
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endif
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ifeq ($(CONFIG_STM32H5_USBFS_HOST),y)
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CHIP_CSRCS += stm32_usbdrdhost.c
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endif
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ifeq ($(CONFIG_STM32H5_ETHMAC),y)
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CHIP_CSRCS += stm32_ethernet.c
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endif
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@@ -151,6 +151,9 @@
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#define USB_CNTR_ERRM (1 << 13) /* Bit 13: Error Interrupt Mask */
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#define USB_CNTR_PMAOVRN (1 << 14) /* Bit 14: Packet Memory Area Over / Underrun Interrupt Mask */
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#define USB_CNTR_CTRM (1 << 15) /* Bit 15: Correct Transfer Interrupt Mask */
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#define USB_CNTR_THR512M (1 << 16) /* Bit 16: 512byte Threshold interrupt mask */
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#define USB_CNTR_DDISCM (1 << 17) /* Bit 17: Device disconnection mask */
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#define USB_CNTR_HOST (1 << 31) /* Bit 31: Host Mode */
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#define USB_CNTR_ALLINTS (USB_CNTR_L1REQ|USB_CNTR_ESOFM|USB_CNTR_SOFM|USB_CNTR_RESETM|\
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USB_CNTR_SUSPM|USB_CNTR_WKUPM|USB_CNTR_ERRM|USB_CNTR_PMAOVRN|\
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@@ -164,12 +167,16 @@
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#define USB_ISTR_L1REQ (1 << 7) /* Bit 7: LPM L1 state request */
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#define USB_ISTR_ESOF (1 << 8) /* Bit 8: Expected Start Of Frame */
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#define USB_ISTR_SOF (1 << 9) /* Bit 9: Start Of Frame */
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#define USB_ISTR_RESET (1 << 10) /* Bit 10: USB RESET request */
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#define USB_ISTR_RESET (1 << 10) /* Bit 10: USB RESET request. Device connection in Host mode */
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#define USB_ISTR_SUSP (1 << 11) /* Bit 11: Suspend mode request */
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#define USB_ISTR_WKUP (1 << 12) /* Bit 12: Wake up */
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#define USB_ISTR_ERR (1 << 13) /* Bit 13: Error */
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#define USB_ISTR_PMAOVRN (1 << 14) /* Bit 14: Packet Memory Area Over / Underrun */
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#define USB_ISTR_CTR (1 << 15) /* Bit 15: Correct Transfer */
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#define USB_ISTR_THR512 (1 << 16) /* Bit 16: 512byte threshold interrupt */
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#define USB_ISTR_DDISC (1 << 17) /* Bit 17: Device disconnection */
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#define USB_ISTR_DCON_STAT (1 << 29) /* Bit 29: Device connection status */
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#define USB_ISTR_LS_DCONN (1 << 30) /* Bit 30: Low-speed device connected */
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#define USB_ISTR_ALLINTS (USB_ISTR_L1REQ|USB_ISTR_ESOF|USB_ISTR_SOF|USB_ISTR_RESET|\
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USB_ISTR_SUSP|USB_ISTR_WKUP|USB_ISTR_ERR|USB_ISTR_PMAOVRN|\
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@@ -210,18 +217,118 @@
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#define USB_BCDR_SDET (1 << 6) /* Bit 6: Secondary detection (SD) status */
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#define USB_BCDR_PS2DET (1 << 7) /* Bit 7: DM pull-up detection status */
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#define USB_BCDR_DPPU (1 << 15) /* Bit 15: DP pull-up control */
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#define USB_BCDR_DPPD (1 << 15) /* Bit 15: DP pull-down control (host mode) */
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/****************************************************************************
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* USB DRD Host Mode Register Definitions
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****************************************************************************/
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/* Channel/Endpoint register */
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#define USB_CHEP_ADDR_SHIFT (0) /* Bits 3-0: Endpoint address */
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#define USB_CHEP_ADDR_MASK (0xf << USB_CHEP_ADDR_SHIFT)
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#define USB_CHEP_TX_STTX_SHIFT (4) /* Bits 5-4: Status TX */
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#define USB_CHEP_TX_STTX_MASK (3 << USB_CHEP_TX_STTX_SHIFT)
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# define USB_CHEP_TX_STTX_DIS (0 << USB_CHEP_TX_STTX_SHIFT) /* Channel TX disabled */
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# define USB_CHEP_TX_STTX_STALL (1 << USB_CHEP_TX_STTX_SHIFT) /* Channel TX stalled */
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# define USB_CHEP_TX_STTX_NAK (2 << USB_CHEP_TX_STTX_SHIFT) /* Channel TX NAK */
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# define USB_CHEP_TX_STTX_VALID (3 << USB_CHEP_TX_STTX_SHIFT) /* Channel TX valid */
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# define USB_CHEP_TX_DTOG1 (1 << USB_CHEP_TX_STTX_SHIFT) /* TX Data Toggle bit 1 */
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# define USB_CHEP_TX_DTOG2 (2 << USB_CHEP_TX_STTX_SHIFT) /* TX Data Toggle bit 2 */
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#define USB_CHEP_DTOG_TX (1 << 6) /* Bit 6: Data Toggle TX */
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#define USB_CHEP_VTTX (1 << 7) /* Bit 7: Valid transaction transmitted */
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#define USB_CHEP_KIND (1 << 8) /* Bit 8: Endpoint/Channel KIND */
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#define USB_CHEP_UTYPE_SHIFT (9) /* Bits 10-9: USB type of transaction */
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#define USB_CHEP_UTYPE_MASK (3 << USB_CHEP_UTYPE_SHIFT)
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# define USB_CHEP_UTYPE_BULK (0 << USB_CHEP_UTYPE_SHIFT) /* Bulk transfer */
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# define USB_CHEP_UTYPE_CTRL (1 << USB_CHEP_UTYPE_SHIFT) /* Control transfer */
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# define USB_CHEP_UTYPE_ISOC (2 << USB_CHEP_UTYPE_SHIFT) /* Isochronous transfer */
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# define USB_CHEP_UTYPE_INTR (3 << USB_CHEP_UTYPE_SHIFT) /* Interrupt transfer */
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#define USB_CHEP_SETUP (1 << 11) /* Bit 11: Setup transaction completed */
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#define USB_CHEP_RX_STRX_SHIFT (12) /* Bits 13-12: Status RX */
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#define USB_CHEP_RX_STRX_MASK (3 << USB_CHEP_RX_STRX_SHIFT)
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# define USB_CHEP_RX_STRX_DIS (0 << USB_CHEP_RX_STRX_SHIFT) /* Channel RX disabled */
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# define USB_CHEP_RX_STRX_STALL (1 << USB_CHEP_RX_STRX_SHIFT) /* Channel RX stalled */
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# define USB_CHEP_RX_STRX_NAK (2 << USB_CHEP_RX_STRX_SHIFT) /* Channel RX NAK */
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# define USB_CHEP_RX_STRX_VALID (3 << USB_CHEP_RX_STRX_SHIFT) /* Channel RX valid */
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# define USB_CHEP_RX_DTOG1 (1 << USB_CHEP_RX_STRX_SHIFT) /* RX Data Toggle bit 1 */
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# define USB_CHEP_RX_DTOG2 (2 << USB_CHEP_RX_STRX_SHIFT) /* RX Data Toggle bit 2 */
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#define USB_CHEP_DTOG_RX (1 << 14) /* Bit 14: Data Toggle RX */
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#define USB_CHEP_VTRX (1 << 15) /* Bit 15: Valid transaction received */
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#define USB_CHEP_DEVADDR_SHIFT (16) /* Bits 22-16: Target device address */
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#define USB_CHEP_DEVADDR_MASK (0x7f << USB_CHEP_DEVADDR_SHIFT)
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#define USB_CHEP_NAK (1 << 23) /* Bit 23: Previous NAK detected */
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#define USB_CHEP_LSEP (1 << 24) /* Bit 24: Low Speed Endpoint */
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#define USB_CHEP_ERRTX (1 << 25) /* Bit 25: Transmit error */
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#define USB_CHEP_ERRRX (1 << 26) /* Bit 26: Receive error */
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/* Register mask for preserving r/w bits when modifying toggle bits */
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#define USB_CHEP_REG_MASK (USB_CHEP_ERRRX | USB_CHEP_ERRTX | \
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USB_CHEP_LSEP | USB_CHEP_DEVADDR_MASK | \
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USB_CHEP_VTRX | USB_CHEP_SETUP | \
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USB_CHEP_UTYPE_MASK | USB_CHEP_KIND | \
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USB_CHEP_VTTX | USB_CHEP_ADDR_MASK | \
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USB_CHEP_NAK)
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#define USB_CHEP_TX_DTOGMASK (USB_CHEP_TX_STTX_MASK | USB_CHEP_REG_MASK)
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#define USB_CHEP_RX_DTOGMASK (USB_CHEP_RX_STRX_MASK | USB_CHEP_REG_MASK)
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#define USB_CH_T_MASK ((~USB_CHEP_UTYPE_MASK) & USB_CHEP_REG_MASK)
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#define USB_CHEP_DB_MSK (0xffff0f0f)
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/* PMA (Packet Memory Area) definitions for host mode */
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#define USB_DRD_PMA_SIZE (2048) /* 2KB PMA */
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#define USB_DRD_NCHANNELS (8) /* 8 host channels */
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/* PMA buffer descriptor structure address calculation
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* Each channel has TX and RX buffer descriptors (8 bytes total per channel)
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*/
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#define USB_PMA_TXBD_OFFSET(ch) ((ch) * 8)
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#define USB_PMA_RXBD_OFFSET(ch) ((ch) * 8 + 4)
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/* PMA TX buffer descriptor bit definitions */
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#define USB_PMA_TXBD_ADDR_SHIFT (2) /* Bits 15:2: TX buffer address */
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#define USB_PMA_TXBD_ADDR_MASK (0x3fff << USB_PMA_TXBD_ADDR_SHIFT)
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#define USB_PMA_TXBD_COUNT_SHIFT (16) /* Bits 25:16: TX byte count */
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#define USB_PMA_TXBD_COUNT_MASK (0x3ff << USB_PMA_TXBD_COUNT_SHIFT)
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#define USB_PMA_TXBD_ADDMSK (0xffff0000)
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#define USB_PMA_TXBD_COUNTMSK (0x0000ffff)
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/* PMA RX buffer descriptor bit definitions */
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#define USB_PMA_RXBD_ADDR_SHIFT (2) /* Bits 15-2: RX buffer address */
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#define USB_PMA_RXBD_ADDR_MASK (0x3fff << USB_PMA_RXBD_ADDR_SHIFT)
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#define USB_PMA_RXBD_COUNT_SHIFT (16) /* Bits 25-16: RX byte count */
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#define USB_PMA_RXBD_COUNT_MASK (0x3ff << USB_PMA_RXBD_COUNT_SHIFT)
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#define USB_PMA_RXBD_NUM_BLOCK_SHIFT (26) /* Bits 30-26: Number of blocks */
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#define USB_PMA_RXBD_NUM_BLOCK_MASK (0x1f << USB_PMA_RXBD_NUM_BLOCK_SHIFT)
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#define USB_PMA_RXBD_BLSIZE (1 << 31) /* Bit 31: Block size: 0=2bytes, 1=32bytes */
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#define USB_PMA_RXBD_ADDMSK (0xffff0000)
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/* PMA start address (after buffer descriptor table)
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* BDT size = 8 channels * 8 bytes = 64 bytes, aligned to 64
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*/
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#define USB_DRD_PMA_BDT_SIZE (USB_DRD_NCHANNELS * 8)
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#define USB_DRD_PMA_START_ADDR (USB_DRD_PMA_BDT_SIZE)
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/* Reception buffer address */
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#define USB_ADDR_RX_SHIFT (2) /* Bits 15:2 ADDRn_RX[15:2]: Reception Buffer Address */
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#define USB_ADDR_RX_SHIFT (2) /* Bits 15-2: Reception Buffer Address */
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#define USB_ADDR_RX_MASK (0x3fff << USB_ADDR_RX_SHIFT)
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/* Reception byte count */
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#define USB_COUNT_RX_BL_SIZE (1 << 31) /* Bit 15: BLock SIZE. */
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#define USB_COUNT_RX_NUM_BLOCK_SHIFT (26) /* Bits 14-10: Number of blocks */
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#define USB_COUNT_RX_BL_SIZE (1 << 31) /* Bit 31: Block size: 0=2bytes, 1=32bytes */
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#define USB_COUNT_RX_NUM_BLOCK_SHIFT (26) /* Bits 30-26: Number of blocks */
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#define USB_COUNT_RX_NUM_BLOCK_MASK (0x1f << USB_COUNT_RX_NUM_BLOCK_SHIFT)
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#define USB_COUNT_RX_SHIFT (16) /* Bits 9-0: Reception Byte Count */
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#define USB_COUNT_RX_SHIFT (16) /* Bits 25-16: Reception Byte Count */
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#define USB_COUNT_RX_MASK (0x3ff << USB_COUNT_RX_SHIFT)
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#endif /* CONFIG_STM32H5_HAVE_USBFS */
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,144 @@
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/****************************************************************************
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* arch/arm/src/stm32h5/stm32_usbdrdhost.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32H5_STM32_USBDRDHOST_H
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#define __ARCH_ARM_SRC_STM32H5_STM32_USBDRDHOST_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/usb/usbhost.h>
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#include <stdint.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* Pre-requisites */
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#if !defined(CONFIG_STM32H5_USBFS_HOST)
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# error "CONFIG_STM32H5_USBFS_HOST is required"
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#endif
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/* USB DRD Host Driver Configuration */
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#ifndef CONFIG_STM32H5_USBDRD_NCHANNELS
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# define CONFIG_STM32H5_USBDRD_NCHANNELS 8
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#endif
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/* Default descriptor buffer size */
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#ifndef CONFIG_STM32H5_USBDRD_DESCSIZE
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# define CONFIG_STM32H5_USBDRD_DESCSIZE 128
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#endif
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* This structure defines the interface provided by the USB host controller
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* to the board-level USB host logic.
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*/
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struct stm32h5_usbhost_connection_s
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{
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/* Wait for device connection/disconnection */
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struct usbhost_connection_s *conn;
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};
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: stm32h5_usbhost_initialize
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*
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* Description:
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* Initialize USB host controller hardware.
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*
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* This function is called very early during system initialization to
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* initialize the USB host controller. The USB host controller is then
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* made available for use by the USB host driver.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* On success, a pointer to the usbhost_connection_s interface is returned.
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* On failure, NULL is returned.
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*
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****************************************************************************/
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struct usbhost_connection_s *stm32h5_usbhost_initialize(void);
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|
||||
/****************************************************************************
|
||||
* Name: stm32h5_usbhost_vbusdrive
|
||||
*
|
||||
* Description:
|
||||
* Enable/disable VBUS power to the connected USB device.
|
||||
*
|
||||
* The USB host driver calls this function during enumeration to control
|
||||
* VBUS power delivery to the device. This function should be implemented
|
||||
* by board-specific code since VBUS control is typically board-specific.
|
||||
*
|
||||
* Input Parameters:
|
||||
* port - USB host port number (0-based)
|
||||
* enable - true: Enable VBUS power
|
||||
* false: Disable VBUS power
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
* Assumptions:
|
||||
* Called from the USB host driver during enumeration.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void stm32h5_usbhost_vbusdrive(int port, bool enable);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_STM32H5_STM32_USBDRDHOST_H */
|
||||
@@ -580,7 +580,7 @@ static inline void rcc_enableapb2(void)
|
||||
regval |= RCC_APB2ENR_SAI2EN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H5_USBFS
|
||||
#if defined(CONFIG_STM32H5_USBFS) || defined(CONFIG_STM32H5_USBFS_HOST)
|
||||
/* USB clock enable */
|
||||
|
||||
regval |= RCC_APB2ENR_USBEN;
|
||||
|
||||
@@ -0,0 +1,57 @@
|
||||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
# CONFIG_NSH_ARGCAT is not set
|
||||
# CONFIG_STANDARD_SERIAL is not set
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="nucleo-h563zi"
|
||||
CONFIG_ARCH_BOARD_NUCLEO_H563ZI=y
|
||||
CONFIG_ARCH_BUTTONS=y
|
||||
CONFIG_ARCH_CHIP="stm32h5"
|
||||
CONFIG_ARCH_CHIP_STM32H563ZI=y
|
||||
CONFIG_ARCH_CHIP_STM32H5=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=2048
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARMV8M_STACKCHECK_NONE=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=9251
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_DEBUG_ASSERTIONS=y
|
||||
CONFIG_DEBUG_FEATURES=y
|
||||
CONFIG_DEBUG_SYMBOLS=y
|
||||
CONFIG_DEBUG_USB=y
|
||||
CONFIG_DEBUG_USB_ERROR=y
|
||||
CONFIG_DEBUG_USB_WARN=y
|
||||
CONFIG_FS_FAT=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_FS_PROCFS_REGISTER=y
|
||||
CONFIG_HAVE_CXX=y
|
||||
CONFIG_HAVE_CXXINITIALIZE=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_INIT_ENTRYPOINT="nsh_main"
|
||||
CONFIG_LINE_MAX=64
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_PREALLOC_TIMERS=4
|
||||
CONFIG_RAM_SIZE=655360
|
||||
CONFIG_RAM_START=0x20000000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_READLINE_CMD_HISTORY=y
|
||||
CONFIG_READLINE_TABCOMPLETION=y
|
||||
CONFIG_RR_INTERVAL=200
|
||||
CONFIG_SCHED_LPWORK=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_STACK_COLORATION=y
|
||||
CONFIG_STM32H5_USART3=y
|
||||
CONFIG_STM32H5_USBFS_HOST=y
|
||||
CONFIG_STM32H5_USE_HSE=y
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_TASK_NAME_SIZE=0
|
||||
CONFIG_USART3_SERIAL_CONSOLE=y
|
||||
CONFIG_USBHOST_MSC=y
|
||||
@@ -36,6 +36,13 @@
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_STM32H5_USBFS_HOST) && !defined(CONFIG_STM32H5_USE_HSE)
|
||||
#error "This board config requires HSE to use the USB HOST."
|
||||
"HSI48 is not stable enough to use as a host."
|
||||
"To use HSE on the nucleo-H563ZI,"
|
||||
"you need to connect SB3/SB4 and disconnect SB49"
|
||||
#endif
|
||||
|
||||
/* Clocking *****************************************************************/
|
||||
|
||||
/* The Nucleo-H563ZI-Q supports using a HSE crystal (X3). It is shipped with
|
||||
@@ -82,7 +89,7 @@
|
||||
STM32_PLLCFG_PLL1Q | \
|
||||
STM32_PLLCFG_PLL1R)
|
||||
|
||||
#define STM32_VC01_FRQ ((STM32_HSE_FREQUENCY / 5) * 100)
|
||||
#define STM32_VCO1_FRQ ((STM32_HSE_FREQUENCY / 5) * 100)
|
||||
#define STM32_PLL1P_FREQUENCY (STM32_VCO1_FRQ / 2)
|
||||
#define STM32_PLL1Q_FREQUENCY (STM32_VCO1_FRQ / 4)
|
||||
#define STM32_PLL1R_FREQUENCY (STM32_VCO1_FRQ / 2)
|
||||
@@ -101,6 +108,34 @@
|
||||
#define STM32_VCO2_FRQ ((STM32_HSE_FREQUENCY / 5) * 60)
|
||||
#define STM32_PLL2R_FREQUENCY (STM32_VCO2_FRQ / 4)
|
||||
|
||||
#if defined(CONFIG_STM32H5_USBFS_HOST)
|
||||
/* PLL3 config: Generate 48 MHz for USB from 25 MHz HSE.
|
||||
* VCO input = 25 MHz / 5 = 5 MHz
|
||||
* VCO output = 5 MHz * 96 = 480 MHz
|
||||
* PLL3Q = 480 MHz / 10 = 48 MHz
|
||||
*/
|
||||
|
||||
#define STM32_PLLCFG_PLL3CFG (RCC_PLL3CFGR_PLL3SRC_HSE | \
|
||||
RCC_PLL3CFGR_PLL3RGE_4_8M | \
|
||||
RCC_PLL3CFGR_PLL3M(5) | \
|
||||
RCC_PLL3CFGR_PLL3QEN)
|
||||
#define STM32_PLLCFG_PLL3N RCC_PLL3DIVR_PLL3N(96) /* VCO 480 MHz */
|
||||
#define STM32_PLLCFG_PLL3P RCC_PLL3DIVR_PLL3P(2) /* Not used */
|
||||
#define STM32_PLLCFG_PLL3Q RCC_PLL3DIVR_PLL3Q(10) /* 3Q 48 MHz */
|
||||
#define STM32_PLLCFG_PLL3R RCC_PLL3DIVR_PLL3R(2) /* Not used */
|
||||
#define STM32_PLLCFG_PLL3DIVR (STM32_PLLCFG_PLL3N | \
|
||||
STM32_PLLCFG_PLL3P | \
|
||||
STM32_PLLCFG_PLL3Q | \
|
||||
STM32_PLLCFG_PLL3R)
|
||||
|
||||
#define STM32_VCO3_FRQ ((STM32_HSE_FREQUENCY / 5) * 96) /* 480 MHz */
|
||||
#define STM32_PLL3Q_FREQUENCY (STM32_VCO3_FRQ / 10) /* 48 MHz */
|
||||
|
||||
/* Use PLL3Q (48 MHz) for USB - more stable than HSI48 */
|
||||
#define STM32H5_CLKUSB_SEL RCC_CCIPR4_USBSEL_PLL3QCK
|
||||
|
||||
#endif /* CONFIG_STM32H5_USBFS_HOST */
|
||||
|
||||
#else
|
||||
|
||||
#define STM32_BOARD_USEHSI 1
|
||||
|
||||
@@ -48,6 +48,10 @@ if(CONFIG_STM32H5_FDCAN)
|
||||
list(APPEND SRCS stm32_can.c)
|
||||
endif()
|
||||
|
||||
if(CONFIG_STM32H5_USBFS_HOST)
|
||||
list(APPEND SRCS stm32_usb.c)
|
||||
endif()
|
||||
|
||||
target_sources(board PRIVATE ${SRCS})
|
||||
|
||||
set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/flash.ld")
|
||||
|
||||
@@ -55,4 +55,8 @@ ifeq ($(CONFIG_STM32H5_PWM),y)
|
||||
CSRCS += stm32_pwm.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_STM32H5_USBFS_HOST),y)
|
||||
CSRCS += stm32_usb.c
|
||||
endif
|
||||
|
||||
include $(TOPDIR)/boards/Board.mk
|
||||
|
||||
@@ -157,5 +157,9 @@ int stm32_can_setup(uint8_t port);
|
||||
int stm32_pwm_setup(void);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USBHOST
|
||||
int stm32_usbhost_initialize(void);
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __BOARDS_ARM_STM32H5_NUCLEO_H563ZI_SRC_NUCLEO_H563ZI_H */
|
||||
|
||||
@@ -149,6 +149,15 @@ int stm32_bringup(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USBHOST
|
||||
ret = stm32_usbhost_initialize();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
UNUSED(ret);
|
||||
return OK;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,226 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h5/nucleo-h563zi/src/stm32_usb.c
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <sched.h>
|
||||
#include <errno.h>
|
||||
#include <assert.h>
|
||||
#include <nuttx/debug.h>
|
||||
|
||||
#include <nuttx/kthread.h>
|
||||
#include <nuttx/usb/usbhost.h>
|
||||
#include <nuttx/usb/usbdev_trace.h>
|
||||
|
||||
#include "arm_internal.h"
|
||||
#include "stm32.h"
|
||||
#include "stm32_usbdrdhost.h"
|
||||
|
||||
#ifdef CONFIG_STM32H5_USBFS_HOST
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#if !defined(CONFIG_USBHOST)
|
||||
# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_USBHOST_DEFPRIO
|
||||
# define CONFIG_USBHOST_DEFPRIO 100
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_USBHOST_STACKSIZE
|
||||
# define CONFIG_USBHOST_STACKSIZE 2048
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_USBHOST
|
||||
static struct usbhost_connection_s *g_usbconn;
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: usbhost_waiter
|
||||
*
|
||||
* Description:
|
||||
* Wait for USB devices to be connected.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_USBHOST
|
||||
static int usbhost_waiter(int argc, char *argv[])
|
||||
{
|
||||
struct usbhost_hubport_s *hport;
|
||||
|
||||
uinfo("Running\n");
|
||||
for (; ; )
|
||||
{
|
||||
/* Wait for the device to change state */
|
||||
|
||||
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
|
||||
uinfo("%s\n", hport->connected ? "connected" : "disconnected");
|
||||
|
||||
/* Did we just become connected? */
|
||||
|
||||
if (hport->connected)
|
||||
{
|
||||
/* Yes.. enumerate the newly connected device */
|
||||
|
||||
CONN_ENUMERATE(g_usbconn, hport);
|
||||
}
|
||||
}
|
||||
|
||||
/* Keep the compiler from complaining */
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_usbinitialize
|
||||
*
|
||||
* Description:
|
||||
* Called from stm32_usbinitialize very early in initialization to setup
|
||||
* USB-related GPIO pins for the STM32F411 board.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void stm32_usbinitialize(void)
|
||||
{
|
||||
/* The OTG FS has an internal soft pull-up.
|
||||
* No GPIO configuration is required
|
||||
*/
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_usbhost_initialize
|
||||
*
|
||||
* Description:
|
||||
* Called at application startup time to initialize the USB host
|
||||
* functionality.
|
||||
* This function will start a thread that will monitor for device
|
||||
* connection/disconnection events.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_USBHOST
|
||||
int stm32_usbhost_initialize(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* First, register all of the class drivers needed to support the drivers
|
||||
* that we care about:
|
||||
*/
|
||||
|
||||
uinfo("Register class drivers\n");
|
||||
|
||||
#ifdef CONFIG_USBHOST_MSC
|
||||
/* Register the USB mass storage class class */
|
||||
|
||||
ret = usbhost_msc_initialize();
|
||||
if (ret != OK)
|
||||
{
|
||||
uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Then get an instance of the USB host interface */
|
||||
|
||||
uinfo("Initialize USB host\n");
|
||||
g_usbconn = stm32h5_usbhost_initialize();
|
||||
if (g_usbconn)
|
||||
{
|
||||
/* Start a thread to handle device connection. */
|
||||
|
||||
uinfo("Start usbhost_waiter\n");
|
||||
|
||||
ret = kthread_create("usbhost", CONFIG_USBHOST_DEFPRIO,
|
||||
CONFIG_USBHOST_STACKSIZE,
|
||||
usbhost_waiter, NULL);
|
||||
return ret < 0 ? -ENOEXEC : OK;
|
||||
}
|
||||
|
||||
return -ENODEV;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_usbhost_vbusdrive
|
||||
*
|
||||
* Description:
|
||||
* Enable/disable driving of VBUS 5V output. This function must be
|
||||
* provided be each platform that implements the STM32 OTG FS host
|
||||
* interface
|
||||
*
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a
|
||||
* charge pump or, if 5 V are available on the application board, a
|
||||
* basic power switch, must be added externally to drive the 5 V VBUS
|
||||
* line. The external charge pump can be driven by any GPIO output.
|
||||
* When the application decides to power on VBUS using the chosen GPIO,
|
||||
* it must also set the port power bit in the host port control and
|
||||
* status register (PPWR bit in OTG_FS_HPRT).
|
||||
*
|
||||
* "The application uses this field to control power to this port,
|
||||
* and the core clears this bit on an overcurrent condition."
|
||||
*
|
||||
* Input Parameters:
|
||||
* iface - For future growth to handle multiple USB host interface.
|
||||
* Should be zero.
|
||||
* enable - true: enable VBUS power; false: disable VBUS power
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_USBHOST
|
||||
void stm32h5_usbhost_vbusdrive(int port, bool enable)
|
||||
{
|
||||
/* The Nucleo-h563zi doesn't have hardware for a vbus drive.
|
||||
* Instead to get host working, you need to put an extra jumper
|
||||
* on the "PWR SEL" to jump "STLK" and "USB USER".
|
||||
* This effectively supplies 5V power form the STLink to the USB device.
|
||||
* The power output is limited so only relatively low power
|
||||
* devices can work.
|
||||
*/
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_STM32H5_USBFS_HOST */
|
||||
Reference in New Issue
Block a user