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esp32[c6|h2|s3|s2]: Fix assignment of Edge/Level GPIO pins in PCNT

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This commit is contained in:
Martin Vajnar
2025-04-27 14:19:55 +02:00
committed by Alan C. Assis
parent 55f85dd727
commit 51a75e622f
5 changed files with 10 additions and 10 deletions
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boards/risc-v/esp32c6/common/src/esp_board_pcnt.c
+2 -2
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@@ -200,8 +200,8 @@ int board_pcnt_initialize(void)
chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK; chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK;
#endif #endif
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN; chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN; chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
#ifndef CONFIG_ESP_PCNT_U0_FILTER_EN #ifndef CONFIG_ESP_PCNT_U0_FILTER_EN
glitch_threshold = 0; glitch_threshold = 0;
#else #else
boards/risc-v/esp32h2/common/src/esp_board_pcnt.c
+2 -2
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@@ -200,8 +200,8 @@ int board_pcnt_initialize(void)
chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK; chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK;
#endif #endif
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN; chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN; chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
#ifndef CONFIG_ESP_PCNT_U0_FILTER_EN #ifndef CONFIG_ESP_PCNT_U0_FILTER_EN
glitch_threshold = 0; glitch_threshold = 0;
#else #else
boards/xtensa/esp32/common/src/esp32_board_pcnt.c
+2 -2
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@@ -199,8 +199,8 @@ int board_pcnt_initialize(void)
chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK; chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK;
#endif #endif
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN; chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN; chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
#ifndef CONFIG_ESP_PCNT_U0_FILTER_EN #ifndef CONFIG_ESP_PCNT_U0_FILTER_EN
glitch_threshold = 0; glitch_threshold = 0;
#else #else
boards/xtensa/esp32s2/common/src/esp32s2_board_pcnt.c
+2 -2
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@@ -199,8 +199,8 @@ int board_pcnt_initialize(void)
chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK; chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK;
#endif #endif
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN; chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN; chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
#ifndef CONFIG_ESP_PCNT_U0_FILTER_EN #ifndef CONFIG_ESP_PCNT_U0_FILTER_EN
glitch_threshold = 0; glitch_threshold = 0;
#else #else
boards/xtensa/esp32s3/common/src/esp32s3_board_pcnt.c
+2 -2
View File
@@ -199,8 +199,8 @@ int board_pcnt_initialize(void)
chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK; chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK;
#endif #endif
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN; chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN; chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
#ifndef CONFIG_ESP_PCNT_U0_FILTER_EN #ifndef CONFIG_ESP_PCNT_U0_FILTER_EN
glitch_threshold = 0; glitch_threshold = 0;
#else #else