EFM32 Add support of BURTC and add possibility of debug message of RMU: Pierre-noel Bouteville

arch/arm/src/efm32/Kconfig

@@ -132,6 +132,11 @@ config EFM32_RMU
 	bool "Reset Management Unit (RMU) "
 	default n
 
+config EFM32_RMU_DEBUG
+	bool "Reset Management Unit (RMU) DEBUG "
+	default n
+	depends on EFM32_RMU && DEBUG
+
 config EFM32_USART0
 	bool "USART0"
 	default n
@@ -578,4 +583,10 @@ config EFM32_TIMER3_CHANNEL
 		If TIMER3 is enabled for PWM usage, you also need specifies the timer output
 		channel {0,1,2}
 
+config EFM32_RTC_BURTC
+	bool "Use BURTC as RTC"
+	default n
+	---help---
+		Enable RTC with EFM32 BURTC
+
 endif # ARCH_CHIP_EFM32

arch/arm/src/efm32/Make.defs

@@ -1,7 +1,7 @@
 ############################################################################
 # arch/arm/src/efm32/Make.defs
 #
-#   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -131,6 +131,10 @@ ifeq ($(CONFIG_EFM32_DMA),y)
 CHIP_CSRCS += efm32_dma.c
 endif
 
+ifeq ($(CONFIG_EFM32_RTC_BURTC),y)
+CHIP_CSRCS += efm32_rtc_burtc.c
+endif
+
 ifeq ($(CONFIG_EFM32_OTGFS),y)
 ifeq ($(CONFIG_USBDEV),y)
 CHIP_CSRCS += efm32_usbdev.c

arch/arm/src/efm32/efm32_rmu.c

@@ -53,7 +53,7 @@
 #include "chip/efm32_emu.h"
 #include "chip/efm32_rmu.h"
 
-#include "emf32_rmu.h"
+#include "efm32_rmu.h"
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -63,10 +63,105 @@
  * Private Types
  ************************************************************************************/
 
+#ifdef CONFIG_EFM32_RMU_DEBUG
+typedef struct
+{
+    const uint32_t val;
+    const uint32_t mask;
+    const char*    str;
+}efm32_reset_cause_list_t;
+#endif
+
 /************************************************************************************
  * Private Data
  ************************************************************************************/
 
+#ifdef CONFIG_EFM32_RMU_DEBUG
+static efm32_reset_cause_list_t efm32_reset_cause_list[] =
+{
+  {
+    0x0001, // 0bXXXX XXXX XXXX XXX1
+    0x0001, // 0bXXXX XXXX XXXX XXX1
+    "A Power-on Reset has been performed. X bits are don't care."
+  },
+  {
+    0x0002, // 0bXXXX XXXX 0XXX XX10
+    0x0003, // 0bXXXX XXXX 1XXX XX11
+    "A Brown-out has been detected on the unregulated power."
+  },
+  {
+    0x0004, //0bXXXX XXXX XXX0 0100
+    0x001F, //0bXXXX XXXX XXX1 1111
+    "A Brown-out has been detected on the regulated power."
+  },
+  {
+    0x0008, //0bXXXX XXXX XXXX 1X00
+    0x000B, //0bXXXX XXXX XXXX 1X11
+    "An external reset has been applied."
+  },
+  {
+    0x0010, //0bXXXX XXXX XXX1 XX00
+    0x0013, //0bXXXX XXXX XXX1 XX11
+    "A watchdog reset has occurred."
+  },
+  {
+    0x0020, //0bXXXX X000 0010 0000
+    0x07FF, //0bXXXX X111 1111 1111
+    "A lockup reset has occurred."
+  },
+  {
+    0x0040, //0bXXXX X000 01X0 0000
+    0x07DF, //0bXXXX X111 11X1 1111
+    "A system request reset has occurred."
+  },
+  {
+    0x0080, //0bXXXX X000 1XX0 0XX0
+    0x0799, //0bXXXX X111 1XX1 1XX1
+    "The system has woken up from EM4."
+  },
+  {
+    0x0180, //0bXXXX X001 1XX0 0XX0
+    0x0799, //0bXXXX X111 1XX1 1XX1
+    "The system has woken up from EM4 on an EM4 wakeup reset request from pin."
+  },
+  {
+    0x0200, //0bXXXX X01X XXX0 0000
+    0x061F, //0bXXXX X11X XXX1 1111
+    "A Brown-out has been detected on Analog Power Domain 0 (AVDD0)."
+  },
+  {
+    0x0400, //0bXXXX X10X XXX0 0000
+    0x061F, //0bXXXX X11X XXX1 1111
+    "A Brown-out has been detected on Analog Power Domain 1 (AVDD1)."
+  },
+  {
+    0x0800, //0bXXXX 1XXX XXXX 0XX0
+    0x0809, //0bXXXX 1XXX XXXX 1XX1
+    "A Brown-out has been detected by the Backup BOD on VDD_DREG."
+  },
+  {
+    0x1000, //0bXXX1 XXXX XXXX 0XX0
+    0x1009, //0bXXX1 XXXX XXXX 1XX1
+    "A Brown-out has been detected by the Backup BOD on BU_VIN."
+  },
+  {
+    0x2000, //0bXX1X XXXX XXXX 0XX0
+    0x2009, //0bXX1X XXXX XXXX 1XX1
+    "A Brown-out has been detected by the Backup BOD on unregulated power"
+  },
+  {
+    0x4000, //0bX1XX XXXX XXXX 0XX0
+    0x4009, //0bX1XX XXXX XXXX 1XX1
+    "A Brown-out has been detected by the Backup BOD on regulated power."
+  },
+  {
+    0x8000, //0b1XXX XXXX XXXX XXX0
+    0x8001, //0b1XXX XXXX XXXX XXX1
+    "The system has been in Backup mode."
+  }
+};
+#endif
+
 /************************************************************************************
  * Public Data
  ************************************************************************************/
@@ -83,6 +178,46 @@ uint32_t g_efm32_rstcause;
  * Public Functions
  ************************************************************************************/
 
+/************************************************************************************
+ * Name: efm32_reset_cause_list_str
+ *
+ * Description:
+ *    Return next reset cause string, NULL if no more reset cause.
+ *
+ * Input Parmeters:
+ *   reg: reset cause register to decode (like g_efm32_rstcause)
+ *   idx: Use to keep in maind reset cause decoding position.
+ *        set *idx to zero before first call.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_EFM32_RMU_DEBUG
+const char *efm32_reset_cause_list_str(uint32_t reg, unsigned int *idx)
+{
+  int len = sizeof(efm32_reset_cause_list)/sizeof(efm32_reset_cause_list[0]);
+  efm32_reset_cause_list_t *ptr = NULL;
+
+  do
+    {
+      if (*idx >= len)
+        {
+          return NULL;
+        }
+
+      ptr = &efm32_reset_cause_list[*idx];
+       (*idx)++;
+    }
+  while ((ptr->mask & reg) != ptr->val);
+
+  if (ptr != NULL)
+    {
+      return ptr->str;
+    }
+
+  return NULL;
+}
+#endif
+
 /************************************************************************************
  * Name: efm32_rmu_initialize
  *
@@ -93,16 +228,19 @@ uint32_t g_efm32_rstcause;
 
 void efm32_rmu_initialize(void)
 {
+#ifdef CONFIG_EFM32_RMU_DEBUG
+  unsigned int idx = 0;
+#endif
   uint32_t locked;
-  
+
   g_efm32_rstcause = getreg32(EFM32_RMU_RSTCAUSE);
 
   /* Now clear reset cause */
 
   putreg32(RMU_CMD_RCCLR,EFM32_RMU_CMD);
 
-  /* Clear some reset causes not cleared with RMU CMD register 
-   * (If EMU registers locked, they must be unlocked first) 
+  /* Clear some reset causes not cleared with RMU CMD register
+   * (If EMU registers locked, they must be unlocked first)
    */
 
   locked = getreg32(EFM32_EMU_LOCK) & EMU_LOCK_LOCKKEY_LOCKED;
@@ -122,4 +260,20 @@ void efm32_rmu_initialize(void)
 
       putreg32(EMU_LOCK_LOCKKEY_LOCK,EMU_LOCK_LOCKKEY_LOCK);
     }
+
+#ifdef CONFIG_EFM32_RMU_DEBUG
+  rmudbg("RMU => reg = 0x%08X\n", g_efm32_rstcause);
+  for (;;)
+    {
+      const char* str;
+
+      str = efm32_reset_cause_list_str(g_efm32_rstcause, &idx);
+      if (str == NULL)
+        {
+          break;
+        }
+
+      rmudbg("RMU => %s\n", str);
+    }
+#endif
 }

arch/arm/src/efm32/efm32_rmu.h

@@ -45,6 +45,28 @@
 
 #ifdef CONFIG_EFM32_RMU
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_DEBUG
+#  undef CONFIG_DEBUG_VERBOSE
+#  undef CONFIG_EFM32_RMU_DEBUG
+#endif
+
+#ifdef CONFIG_EFM32_RMU_DEBUG
+#  define rmudbg lldbg
+#  ifdef CONFIG_DEBUG_VERBOSE
+#    define rmuvdbg lldbg
+#  else
+#    define rmuvdbg(x...)
+#  endif
+#else
+#  define rmudbg(x...)
+#  define rmuvdbg(x...)
+#endif
+
 /****************************************************************************
  * Public Data
  ****************************************************************************/
@@ -64,5 +86,22 @@ extern uint32_t g_efm32_rstcause;
 
 void efm32_rmu_initialize(void);
 
+/************************************************************************************
+ * Name: efm32_reset_cause_list_str
+ *
+ * Description:
+ *    Return next reset cause string, NULL if no more reset cause.
+ *
+ * Input Parmeters:
+ *   reg: reset cause register to decode (like g_efm32_rstcause)
+ *   idx: Use to keep in maind reset cause decoding position.
+ *        set *idx to zero before first call.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_EFM32_RMU_DEBUG
+const char *efm32_reset_cause_list_str(uint32_t reg, unsigned int *idx);
+#endif
+
 #endif /* CONFIG_EFM32_RMU */
 #endif /* __ARCH_ARM_SRC_EFM32_EFM32_RMU_H */