Rename arch/arm/src/stm32l4/chip to arch/arm/src/stm32l4/hardware.

2026-06-06 08:36:24 +08:00 · 2019-05-24 18:06:01 -06:00
parent a26e229834
commit 50d18f9774
95 changed files with 397 additions and 398 deletions
@@ -48,8 +48,8 @@

 #include <arch/irq.h>
 #include <arch/stm32l4/chip.h>
-#include "chip/stm32l4_pinmap.h"
-#include "chip/stm32l4_memorymap.h"
+#include "hardware/stm32l4_pinmap.h"
+#include "hardware/stm32l4_memorymap.h"

 /************************************************************************************
 * Pre-processor Definitions
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_adc.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_adc.h
 *
 *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_ADC_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_ADC_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_ADC_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_ADC_H

 /************************************************************************************
 * Included Files
@@ -594,4 +594,4 @@
 #  define ADC_CDR_RDATA_SLV_MASK     (0xffff << ADC_CDR_RDATA_SLV_SHIFT)
 #endif

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_ADC_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_ADC_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_can.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_can.h
 *
 *   Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -37,8 +37,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_CAN_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_CAN_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_CAN_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_CAN_H

 /************************************************************************************
 * Included Files
@@ -426,4 +426,4 @@
 * Public Functions
 ************************************************************************************/

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_CAN_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_CAN_H */
@@ -33,8 +33,8 @@
 *
 ****************************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_COMP_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_COMP_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_COMP_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_COMP_H

 /****************************************************************************************************
 * Pre-processor Definitions
@@ -121,4 +121,4 @@
 #  define COMP_CSR_LOCK_RW         (0)
 #  define COMP_CSR_LOCK_RO         COMP_CSR_LOCK_MASK

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_COMP_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_COMP_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_crs.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_crs.h
 *
 *   Copyright (C) 2019 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_CRS_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_CRS_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_CRS_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_CRS_H

 /************************************************************************************
 * Pre-processor Definitions
@@ -112,4 +112,4 @@
 #define CRS_ICR_ERRC               (1 << 2)  /* Bit 2: Error clear flag */
 #define CRS_ICR_ESYNCC             (1 << 3)  /* Bit 3: Expected SYNC clear flag */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_CRS_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_CRS_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_dac.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_dac.h
 *
 *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_DAC_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_DAC_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_DAC_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_DAC_H

 /************************************************************************************
 * Included Files
@@ -338,4 +338,4 @@
 #define DAC_SHRR_TREFRESH2_SHIFT   (16)     /* Bits 16-23: DAC channel 2 refresh time */
 #define DAC_SHRR_TREFRESH2_MASK    (0xff << DAC_SHRR_TREFRESH2_SHIFT)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_DAC_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_DAC_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_dfsdm.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_dfsdm.h
 *
 *   Copyright (C) 2017-2018 Haltian Ltd. All rights reserved.
 *   Author: Juha Niskanen <juha.niskanen@haltian.com>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_DFSDM_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_DFSDM_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_DFSDM_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_DFSDM_H

 /************************************************************************************
 * Included Files
@@ -470,4 +470,4 @@
 #define DFSDM_CNVTIMR_CNVCNT_SHIFT       (4)     /* Bits 4-31: 28-bit timer counting conversion time t = CNVCNT[27:0] / fDFSDMCLK */
 #define DFSDM_CNVTIMR_CNVCNT_MASK        (~0xfu)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_DFSDM_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_DFSDM_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_exti.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_exti.h
 *
 *   Copyright (C) 2009, 2013 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_EXTI_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_EXTI_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_EXTI_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_EXTI_H

 /************************************************************************************
 * Included Files
@@ -176,5 +176,5 @@
 #define EXTI_PR2_SHIFT            (0)                /* Bits 0-X: Pending bit for all lines */
 #define EXTI_PR2_MASK             STM32L4_EXTI2_MASK

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_EXTI_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_EXTI_H */

@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_flash.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_flash.h
 *
 *   Copyright (C) 2009, 2011, 2015, 2017 Gregory Nutt. All rights reserved.
 *   Authors: Gregory Nutt <gnutt@nuttx.org>
@@ -35,8 +35,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_FLASH_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_FLASH_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_FLASH_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_FLASH_H

 /************************************************************************************
 * Included Files
@@ -293,4 +293,4 @@
 #  define FLASH_CFGR_LVEN           (1 << 0)                /* Bit 0: Low voltage enable */
 #endif

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_FLASH_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_FLASH_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_gpio.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_gpio.h
 *
 *   Copyright (C) 2016, Sebastien Lorquet. All rights reserved.
 *   Author: Sebastien Lorquet <sebastien@lorquet.fr>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_GPIO_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_GPIO_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_GPIO_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_GPIO_H

 /************************************************************************************
 * Included Files
@@ -371,5 +371,5 @@
 #define GPIO_AFRH15_SHIFT          (28)
 #define GPIO_AFRH15_MASK           (15 << GPIO_AFRH15_SHIFT)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_GPIO_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_GPIO_H */

@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_i2c.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_i2c.h
 *
 *   Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_I2C_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_I2C_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_I2C_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_I2C_H

 /************************************************************************************
 * Pre-processor Definitions
@@ -259,5 +259,5 @@

 #define I2C_TXDR_MASK             (0xff)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_I2C_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_I2C_H */

@@ -34,8 +34,8 @@
 *
 ****************************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_LPTIM_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_LPTIM_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_LPTIM_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_LPTIM_H

 /****************************************************************************************************
 * Pre-processor Definitions
@@ -114,4 +114,4 @@
 #define LPTIM_CR_SNGSTRT          (1 << 1)   /* Bit 1: Single Mode */
 #define LPTIM_CR_CNTSTRT          (1 << 2)   /* Bit 2: Continuous Mode */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_LPTIM_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_LPTIM_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_memorymap.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_memorymap.h
 *
 *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_pinmap.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_pinmap.h
 *
 *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 *   Copyright (C) 2015 Sebastien Lorquet. All rights reserved.
@@ -34,8 +34,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_PINMAP_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_PINMAP_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_PINMAP_H

 /************************************************************************************
 * Included Files
@@ -45,16 +45,16 @@
 #include "chip.h"

 #if defined(CONFIG_STM32L4_STM32L4X3)
-#  include "chip/stm32l4x3xx_pinmap.h"
+#  include "hardware/stm32l4x3xx_pinmap.h"
 #elif defined(CONFIG_STM32L4_STM32L4X5)
-#  include "chip/stm32l4x5xx_pinmap.h"
+#  include "hardware/stm32l4x5xx_pinmap.h"
 #elif defined(CONFIG_STM32L4_STM32L4X6)
-#  include "chip/stm32l4x6xx_pinmap.h"
+#  include "hardware/stm32l4x6xx_pinmap.h"
 #elif defined(CONFIG_STM32L4_STM32L4XR)
-#  include "chip/stm32l4xrxx_pinmap.h"
+#  include "hardware/stm32l4xrxx_pinmap.h"
 #else
 #  error "Unsupported STM32 L4 pin map"
 #endif

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_PINMAP_H */

@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_pwr.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_pwr.h
 *
 *   Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_PWR_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_PWR_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_PWR_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_PWR_H

 /************************************************************************************
 * Included Files
@@ -202,4 +202,4 @@

 /* Port X pull-up/down registers have one bit per port line, with a few exceptions */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_PWR_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_PWR_H */
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_qspi.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_qspi.h
 *
 *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 *   Author: dev@ziggurat29.com
@@ -33,8 +33,8 @@
 *
 ****************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_QSPI_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_QSPI_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_QSPI_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_QSPI_H

 /****************************************************************************************
 * Included Files
@@ -43,7 +43,7 @@
 #include <nuttx/config.h>
 #include <arch/stm32l4/chip.h>

-#include "chip/stm32l4_memorymap.h"
+#include "hardware/stm32l4_memorymap.h"

 /****************************************************************************************
 * Pre-processor Definitions
@@ -234,6 +234,6 @@
 * Public Functions
 ****************************************************************************************/

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_QSPI_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_QSPI_H */


@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32/chip/stm32l4_rng.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_rng.h
 *
 *   Copyright (C) 2012 Max Holtzberg. All rights reserved.
 *   Author: Max Holtzberg <mh@uvc.de>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_RNG_H
-#define __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_RNG_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_RNG_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_RNG_H

 /************************************************************************************
 * Included Files
@@ -74,4 +74,4 @@
 #define RNG_SR_CEIS               (1 << 5) /* Bit 5: Clock error interrupt status */
 #define RNG_SR_SEIS               (1 << 6) /* Bit 6: Seed error interrupt status */

-#endif /* __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_RNG_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_RNG_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_rtcc.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_rtcc.h
 *
 *   Copyright (C) 2011-2013 Gregory Nutt. All rights reserved.
 *   Author: dev@ziggurat29.com
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_RTCC_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_RTCC_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_RTCC_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_RTCC_H

 /************************************************************************************
 * Pre-processor Definitions
@@ -398,4 +398,4 @@
 #define RTC_OR_OUTRMP             (1 << 1)  /* Bit 1:  remap output to PB14 */


-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_RTCC_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_RTCC_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32/chip/stm32l4_sai.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_sai.h
 *
 *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 *   Author:  Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_SAI_H
-#define __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_SAI_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_SAI_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_SAI_H

 /************************************************************************************
 * Included Files
@@ -256,4 +256,4 @@

 /* SAI Data Register (32-bit data) */

-#endif /* __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_SAI_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_SAI_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_sdmmc.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_sdmmc.h
 *
 *   Copyright (C) 2009, 2011-2017 Gregory Nutt. All rights reserved.
 *   Authors: Gregory Nutt <gnutt@nuttx.org>
@@ -35,8 +35,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_SDMMC_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_SDMMC_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_SDMMC_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_SDMMC_H

 /************************************************************************************
 * Pre-processor Definitions
@@ -215,5 +215,5 @@
 #define STM32_SDMMC_FIFOCNT_SHIFT             (0)
 #define STM32_SDMMC_FIFOCNT_MASK              (0x0ffffff << STM32_SDMMC_FIFOCNT_SHIFT)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L46XX_SDMMC_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L46XX_SDMMC_H */

@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_spi.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_spi.h
 *
 *   Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_SPI_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_SPI_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_SPI_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_SPI_H

 /************************************************************************************
 * Included Files
@@ -177,5 +177,5 @@
 #  define SPI_SR_FTLVL_HALF      (2 << SPI_SR_FTLVL_SHIFT) /* 1/2 FIFO */
 #  define SPI_SR_FTLVL_FULL      (3 << SPI_SR_FTLVL_SHIFT) /* FIFO full */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_SPI_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_SPI_H */

@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_syscfg.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_syscfg.h
 *
 *   Copyright (C) 2015 Sebastien Lorquet. All rights reserved.
 *   Author: Sebastien Lorquet <sebastien@lorquet.fr>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_SYSCFG_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_SYSCFG_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_SYSCFG_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_SYSCFG_H

 /************************************************************************************
 * Included Files
@@ -44,15 +44,15 @@
 #include "chip.h"

 #if defined(CONFIG_STM32L4_STM32L4X3)
-#  include "chip/stm32l4x3xx_syscfg.h"
+#  include "hardware/stm32l4x3xx_syscfg.h"
 #elif defined(CONFIG_STM32L4_STM32L4X5)
-#  include "chip/stm32l4x5xx_syscfg.h"
+#  include "hardware/stm32l4x5xx_syscfg.h"
 #elif defined(CONFIG_STM32L4_STM32L4X6)
-#  include "chip/stm32l4x6xx_syscfg.h"
+#  include "hardware/stm32l4x6xx_syscfg.h"
 #elif defined(CONFIG_STM32L4_STM32L4XR)
-#  include "chip/stm32l4xrxx_syscfg.h"
+#  include "hardware/stm32l4xrxx_syscfg.h"
 #else
 #  error "Unsupported STM32 L4 chip"
 #endif

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_SYSCFG_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_SYSCFG_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_tim.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_tim.h
 *
 *   Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_TIM_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_TIM_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_TIM_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_TIM_H

 /************************************************************************************
 * Pre-processor Definitions
@@ -1119,4 +1119,4 @@

 #define BTIM_EGR_UG               (1 << 0)  /* Bit 0: Update generation */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_TIM_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_TIM_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_uart.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_uart.h
 *
 *   Copyright (C) 2009, 2011-2014 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_UART_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_UART_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_UART_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_UART_H

 /************************************************************************************
 * Included Files
@@ -314,5 +314,5 @@
 * Public Functions
 ************************************************************************************/

-#endif /* __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_UART_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_UART_H */

@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_usbdev.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_usbdev.h
 *
 *   Copyright (C) 2009, 2011, 2019 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_USBDEV_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_USBDEV_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_USBDEV_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_USBDEV_H

 /************************************************************************************
 * Included Files
@@ -261,5 +261,5 @@
 #define USB_BCDR_DPPU                (1 << 15) /* Bit 15: DP pull-up control */

 #endif /* CONFIG_STM32L4_STM32L4X2 */
-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_USBDEV_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_USBDEV_H */

@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4_wdg.h
+ * arch/arm/src/stm32l4/hardware/stm32l4_wdg.h
 *
 *   Copyright (C) 2009, 2011-2013, 2017 Gregory Nutt. All rights reserved.
 *   Authors: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_WDG_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_WDG_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_WDG_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_WDG_H

 /************************************************************************************
 * Included Files
@@ -151,4 +151,4 @@
 * Public Functions
 ************************************************************************************/

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_WDG_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4_WDG_H */
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x3xx_dbgmcu.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x3xx_dbgmcu.h
 *
 *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 *   Authors: Gregory Nutt <gnutt@nuttx.org>
@@ -35,8 +35,8 @@
 *
 ****************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_DBGMCU_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_DBGMCU_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_DBGMCU_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_DBGMCU_H

 /****************************************************************************
 * Included Files
@@ -105,4 +105,4 @@
 #define DBGMCU_APB2_TIM15STOP     (1 << 16)  /* Bit 16: TIM15 stopped when core is halted */
 #define DBGMCU_APB2_TIM16STOP     (1 << 17)  /* Bit 17: TIM16 stopped when core is halted */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XXDBGMCU_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XXDBGMCU_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x3xx_dma.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x3xx_dma.h
 *
 *   Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_DMA_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_DMA_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_DMA_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_DMA_H

 /************************************************************************************
 * Pre-processor Definitions
@@ -460,4 +460,4 @@
 #define DMACHAN_LPUART_RX       DMACHAN_SETTING(STM32L4_DMA2_CHAN7, 4)
 #define DMACHAN_LPUART_TX       DMACHAN_SETTING(STM32L4_DMA2_CHAN6, 4)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_DMA_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_DMA_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x3xx_firewall.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x3xx_firewall.h
 *
 *   Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
 *   Author: Sebastien Lorquet <sebastien@lorquet.fr>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_FIREWALL_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_FIREWALL_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_FIREWALL_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_FIREWALL_H

 /************************************************************************************
 * Included Files
@@ -100,4 +100,4 @@
 #define FIREWALL_CR_VDS                 (1 << 1) /* Bit 1: Volatile data shared */
 #define FIREWALL_CR_VDE                 (1 << 2) /* Bit 2: Volatile data execution */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_FIREWALL_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_FIREWALL_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x3xx_pinmap.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x3xx_pinmap.h
 *
 *   Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved.
 *   Authors: Sebastien Lorquet <sebastien@lorquet.fr>
@@ -34,8 +34,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_PINMAP_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_PINMAP_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_PINMAP_H

 /************************************************************************************
 * Included Files
@@ -603,4 +603,4 @@
 #define GPIO_USB_DM  (GPIO_ALT|GPIO_AF10|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN11)
 #define GPIO_USB_DP  (GPIO_ALT|GPIO_AF10|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN12)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_PINMAP_H */
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x3xx_rcc.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x3xx_rcc.h
 *
 *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
 *   Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
@@ -36,8 +36,8 @@
 *
 ****************************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_RCC_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_RCC_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_RCC_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_RCC_H

 /****************************************************************************************************
 * Included Files
@@ -786,4 +786,4 @@
 #define RCC_CRRCR_HSI48RDY          (1 << 1)  /* Bit 1: HSI48 clock ready flag */

 #endif /* CONFIG_STM32L4_STM32L4X3 */
-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_RCC_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_RCC_H */
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x3xx_syscfg.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x3xx_syscfg.h
 *
 *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ****************************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_SYSCFG_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_SYSCFG_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_SYSCFG_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_SYSCFG_H

 /****************************************************************************************************
 * Included Files
@@ -179,4 +179,4 @@
 #define SYSCFG_SKR_MASK               (0xFF << SYSCFG_SKR_SHIFT)

 #endif /* CONFIG_STM32L4_STM32L4X3 */
-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X3XX_SYSCFG_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_SYSCFG_H */
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x5xx_dbgmcu.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x5xx_dbgmcu.h
 *
 *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 *   Authors: Gregory Nutt <gnutt@nuttx.org>
@@ -35,8 +35,8 @@
 *
 ****************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_DBGMCU_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_DBGMCU_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_DBGMCU_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_DBGMCU_H

 /****************************************************************************
 * Included Files
@@ -110,4 +110,4 @@
 #define DBGMCU_APB2_TIM16STOP     (1 << 17)  /* Bit 17: TIM16 stopped when core is halted */
 #define DBGMCU_APB2_TIM17STOP     (1 << 18)  /* Bit 18: TIM17 stopped when core is halted */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XXDBGMCU_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XXDBGMCU_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x6xx_dma.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x6xx_dma.h
 *
 *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_DMA_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_DMA_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_DMA_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_DMA_H

 /************************************************************************************
 * Pre-processor Definitions
@@ -482,4 +482,4 @@
 #define DMACHAN_LPUART_RX       DMACHAN_SETTING(STM32L4_DMA2_CHAN7, 4)
 #define DMACHAN_LPUART_TX       DMACHAN_SETTING(STM32L4_DMA2_CHAN6, 4)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_DMA_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_DMA_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x5xx_firewall.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x5xx_firewall.h
 *
 *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 *   Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
@@ -35,8 +35,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_FIREWALL_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_FIREWALL_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_FIREWALL_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_FIREWALL_H

 /************************************************************************************
 * Included Files
@@ -109,4 +109,4 @@
 #define FIREWALL_CR_VDS                 (1 << 1) /* Bit 1: Volatile data shared */
 #define FIREWALL_CR_VDE                 (1 << 2) /* Bit 2: Volatile data execution */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_FIREWALL_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_FIREWALL_H */
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x5xx_otgfs.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x5xx_otgfs.h
 *
 *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
@@ -36,8 +36,8 @@
 *
 ****************************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_OTGFS_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_OTGFS_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_OTGFS_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_OTGFS_H

 /****************************************************************************************************
 * Included Files
@@ -944,4 +944,4 @@
 #define OTGFS_PCGCCTL_SUSP              (1 << 7)  /* Bit 7: Deep Sleep */
                                                  /* Bits 8-31: Reserved, must be kept at reset value */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_OTGFS_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_OTGFS_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x5xx_pinmap.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x5xx_pinmap.h
 *
 *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 *   Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved.
@@ -34,8 +34,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_PINMAP_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_PINMAP_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_PINMAP_H

 /************************************************************************************
 * Included Files
@@ -784,4 +784,4 @@
 #define GPIO_LPUART1_RTS_DE_1  (GPIO_ALT|GPIO_AF8 |GPIO_PORTB|GPIO_PIN12)
 #define GPIO_LPUART1_RTS_DE_2  (GPIO_ALT|GPIO_AF8 |GPIO_PORTG|GPIO_PIN6)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_PINMAP_H */
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x6xx_rcc.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x6xx_rcc.h
 *
 *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 *   Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
@@ -35,8 +35,8 @@
 *
 ****************************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_RCC_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_RCC_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_RCC_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_RCC_H

 /****************************************************************************************************
 * Included Files
@@ -707,4 +707,4 @@
 #define RCC_CSR_LPWRRSTF            (1 << 31) /* Bit 31: Low-Power reset flag */

 #endif /* CONFIG_STM32L4_STM32L4X5 */
-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_RCC_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_RCC_H */
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x5xx_syscfg.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x5xx_syscfg.h
 *
 *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ****************************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_SYSCFG_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_SYSCFG_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_SYSCFG_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_SYSCFG_H

 /****************************************************************************************************
 * Included Files
@@ -174,4 +174,4 @@
 #define SYSCFG_CFGR2_SPF              (1 <<  8) /* Bit  8: SRAM2 parity error flag */

 #endif /* CONFIG_STM32L4_STM32L4X5 */
-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X5XX_SYSCFG_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X5XX_SYSCFG_H */
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x6xx_dbgmcu.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x6xx_dbgmcu.h
 *
 *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 *   Authors: Gregory Nutt <gnutt@nuttx.org>
@@ -35,8 +35,8 @@
 *
 ****************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_DBGMCU_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_DBGMCU_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_DBGMCU_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_DBGMCU_H

 /****************************************************************************
 * Included Files
@@ -116,4 +116,4 @@
 #define DBGMCU_APB2_TIM16STOP     (1 << 17)  /* Bit 17: TIM16 stopped when core is halted */
 #define DBGMCU_APB2_TIM17STOP     (1 << 18)  /* Bit 18: TIM17 stopped when core is halted */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XXDBGMCU_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XXDBGMCU_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x6xx_dma.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x6xx_dma.h
 *
 *   Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_DMA_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_DMA_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_DMA_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_DMA_H

 /************************************************************************************
 * Pre-processor Definitions
@@ -501,4 +501,4 @@
 #define DMACHAN_LPUART_RX       DMACHAN_SETTING(STM32L4_DMA2_CHAN7, 4)
 #define DMACHAN_LPUART_TX       DMACHAN_SETTING(STM32L4_DMA2_CHAN6, 4)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_DMA_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_DMA_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x6xx_firewall.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x6xx_firewall.h
 *
 *   Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
 *   Author: Sebastien Lorquet <sebastien@lorquet.fr>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_FIREWALL_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_FIREWALL_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_FIREWALL_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_FIREWALL_H

 /************************************************************************************
 * Included Files
@@ -115,4 +115,4 @@
 #define FIREWALL_CR_VDS                 (1 << 1) /* Bit 1: Volatile data shared */
 #define FIREWALL_CR_VDE                 (1 << 2) /* Bit 2: Volatile data execution */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_FIREWALL_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_FIREWALL_H */
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x6xx_otgfs.h
 *
 *   Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved.
 *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
@@ -36,8 +36,8 @@
 *
 ****************************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_OTGFS_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_OTGFS_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_OTGFS_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_OTGFS_H

 /****************************************************************************************************
 * Included Files
@@ -949,4 +949,4 @@
 #define OTGFS_PCGCCTL_SUSP              (1 << 7)  /* Bit 7: Deep Sleep */
                                                  /* Bits 8-31: Reserved, must be kept at reset value */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_OTGFS_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_OTGFS_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x6xx_pinmap.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x6xx_pinmap.h
 *
 *   Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved.
 *   Author: Sebastien Lorquet <sebastien@lorquet.fr>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_PINMAP_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_PINMAP_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_PINMAP_H

 /************************************************************************************
 * Included Files
@@ -902,4 +902,4 @@
 #define GPIO_LPUART1_RTS_DE_1  (GPIO_ALT|GPIO_AF8 |GPIO_PORTB|GPIO_PIN12)
 #define GPIO_LPUART1_RTS_DE_2  (GPIO_ALT|GPIO_AF8 |GPIO_PORTG|GPIO_PIN6)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_PINMAP_H */
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x6xx_rcc.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x6xx_rcc.h
 *
 *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
 *   Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
@@ -35,8 +35,8 @@
 *
 ****************************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_RCC_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_RCC_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_RCC_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_RCC_H

 /****************************************************************************************************
 * Included Files
@@ -811,4 +811,4 @@
 #  define RCC_CCIPR2_I2C4SEL_HSI       (2 << RCC_CCIPR2_I2C4SEL_SHIFT)

 #endif /* CONFIG_STM32L4_STM32L4X6 */
-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_RCC_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_RCC_H */
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4x6xx_syscfg.h
+ * arch/arm/src/stm32l4/hardware/stm32l4x6xx_syscfg.h
 *
 *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ****************************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_SYSCFG_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_SYSCFG_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_SYSCFG_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_SYSCFG_H

 /****************************************************************************************************
 * Included Files
@@ -188,4 +188,4 @@
 /* There is one bit per SRAM2 page (32 to 63) */

 #endif /* CONFIG_STM32L4_STM32L4X6 */
-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_SYSCFG_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_SYSCFG_H */
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4xrxx_dbgmcu.h
+ * arch/arm/src/stm32l4/hardware/stm32l4xrxx_dbgmcu.h
 *
 *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 *   Authors: Gregory Nutt <gnutt@nuttx.org>
@@ -35,8 +35,8 @@
 *
 ****************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4XRXX_DBGMCU_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4XRXX_DBGMCU_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4XRXX_DBGMCU_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4XRXX_DBGMCU_H

 /****************************************************************************
 * Included Files
@@ -110,4 +110,4 @@
 #define DBGMCU_APB2_TIM16STOP     (1 << 17)  /* Bit 17: TIM16 stopped when core is halted */
 #define DBGMCU_APB2_TIM17STOP     (1 << 18)  /* Bit 18: TIM17 stopped when core is halted */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4XRXXDBGMCU_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4XRXXDBGMCU_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4xrxx_dma.h
+ * arch/arm/src/stm32l4/hardware/stm32l4xrxx_dma.h
 *
 *   Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4XRXX_DMA_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4XRXX_DMA_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4XRXX_DMA_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4XRXX_DMA_H

 /************************************************************************************
 * Pre-processor Definitions
@@ -504,4 +504,4 @@
 #define DMACHAN_LPUART_RX       DMACHAN_SETTING(STM32L4_DMA2_CHAN7, 4)
 #define DMACHAN_LPUART_TX       DMACHAN_SETTING(STM32L4_DMA2_CHAN6, 4)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4XRXX_DMA_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4XRXX_DMA_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4xrxx_firewall.h
+ * arch/arm/src/stm32l4/hardware/stm32l4xrxx_firewall.h
 *
 *   Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
 *   Author: Sebastien Lorquet <sebastien@lorquet.fr>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4XRXX_FIREWALL_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4XRXX_FIREWALL_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4XRXX_FIREWALL_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4XRXX_FIREWALL_H

 /************************************************************************************
 * Included Files
@@ -107,4 +107,4 @@
 #define FIREWALL_CR_VDS                 (1 << 1) /* Bit 1: Volatile data shared */
 #define FIREWALL_CR_VDE                 (1 << 2) /* Bit 2: Volatile data execution */

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4XRXX_FIREWALL_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4XRXX_FIREWALL_H */
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32l4xrxx_pinmap.h
+ * arch/arm/src/stm32l4/hardware/stm32l4xrxx_pinmap.h
 *
 *   Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved.
 *   Author: Sebastien Lorquet <sebastien@lorquet.fr>
@@ -33,8 +33,8 @@
 *
 ************************************************************************************/

-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4XRXX_PINMAP_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4XRXX_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4XRXX_PINMAP_H
+#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4XRXX_PINMAP_H

 /************************************************************************************
 * Included Files
@@ -847,4 +847,4 @@
 #define GPIO_LPUART1_RTS_DE_1  (GPIO_ALT|GPIO_AF8 |GPIO_PORTB|GPIO_PIN12)
 #define GPIO_LPUART1_RTS_DE_2  (GPIO_ALT|GPIO_AF8 |GPIO_PORTG|GPIO_PIN6)

-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4XRXX_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4XRXX_PINMAP_H */
--- a/Show More
+++ b/Show More