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boards/stm32f4: migrate to new pinmap

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migrate stm32f4 to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl
2026-04-23 16:37:45 +02:00
committed by Matteo Golin
parent de5cc186e4
commit 4b4ba522cb
180 changed files with 1051 additions and 435 deletions
Download Patch File Download Diff File Expand all files Collapse all files
boards/arm/stm32/axoloti/configs/nsh/defconfig
+1
View File
@@ -9,6 +9,7 @@
# CONFIG_ARCH_LEDS is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STANDARD_SERIAL is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="axoloti"
CONFIG_ARCH_BOARD_AXOLOTI=y
boards/arm/stm32/axoloti/include/board.h
+2 -2
View File
@@ -153,8 +153,8 @@
/* USART1 - console on header pins */
#define GPIO_USART1_RX GPIO_USART1_RX_2 /* AF7, PB7 */
#define GPIO_USART1_TX GPIO_USART1_TX_2 /* AF7, PB6 */
#define GPIO_USART1_RX (GPIO_USART1_RX_2|GPIO_SPEED_100MHz) /* AF7, PB7 */
#define GPIO_USART1_TX (GPIO_USART1_TX_2|GPIO_SPEED_100MHz) /* AF7, PB6 */
/* USART6 - midi in/out */
boards/arm/stm32/clicker2-stm32/configs/knsh/defconfig
+1
View File
@@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
# CONFIG_SYSTEM_DD is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
boards/arm/stm32/clicker2-stm32/configs/mrf24j40-6lowpan/defconfig
+1
View File
@@ -8,6 +8,7 @@
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
boards/arm/stm32/clicker2-stm32/configs/mrf24j40-mac/defconfig
+1
View File
@@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
boards/arm/stm32/clicker2-stm32/configs/mrf24j40-starhub/defconfig
+1
View File
@@ -8,6 +8,7 @@
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
boards/arm/stm32/clicker2-stm32/configs/mrf24j40-starpoint/defconfig
+1
View File
@@ -8,6 +8,7 @@
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
boards/arm/stm32/clicker2-stm32/configs/nsh/defconfig
+1
View File
@@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
boards/arm/stm32/clicker2-stm32/configs/usbnsh/defconfig
+1
View File
@@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_DEV_CONSOLE is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
boards/arm/stm32/clicker2-stm32/configs/xbee-6lowpan/defconfig
+1
View File
@@ -8,6 +8,7 @@
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
boards/arm/stm32/clicker2-stm32/include/board.h
+23 -16
View File
@@ -252,11 +252,11 @@
* Assuming RS-232 connverted connected on mikroMB1/12
*/
#define GPIO_USART2_RX GPIO_USART2_RX_2 /* PD6 */
#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */
#define GPIO_USART2_RX (GPIO_USART2_RX_2|GPIO_SPEED_100MHz) /* PD6 */
#define GPIO_USART2_TX (GPIO_USART2_TX_2|GPIO_SPEED_100MHz) /* PD5 */
#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */
#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */
#define GPIO_USART3_RX (GPIO_USART3_RX_3|GPIO_SPEED_100MHz) /* PD9 */
#define GPIO_USART3_TX (GPIO_USART3_TX_3|GPIO_SPEED_100MHz) /* PD8 */
/* SPI
*
@@ -264,13 +264,13 @@
* SPI3 - mikroBUS1
*/
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 /* PC12 */
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 /* PC11 */
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2 /* PC10 */
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz) /* PC12 */
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz) /* PC11 */
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz) /* PC10 */
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_2 /* PB15 */
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2 /* PB14 */
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_2 /* PB13 */
#define GPIO_SPI3_MISO (GPIO_SPI3_MISO_2|GPIO_SPEED_50MHz) /* PB15 */
#define GPIO_SPI3_MOSI (GPIO_SPI3_MOSI_2|GPIO_SPEED_50MHz) /* PB14 */
#define GPIO_SPI3_SCK (GPIO_SPI3_SCK_2|GPIO_SPEED_50MHz) /* PB13 */
/* I2C
*
@@ -278,11 +278,11 @@
* I2C3 - mikroBUS1
*/
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 /* PB10 */
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 /* PB11 */
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_SPEED_50MHz) /* PB10 */
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_SPEED_50MHz) /* PB11 */
#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1 /* PA8 */
#define GPIO_I2C3_SDA GPIO_I2C3_SDA_1 /* PC9 */
#define GPIO_I2C3_SCL (GPIO_I2C3_SCL_1|GPIO_SPEED_50MHz) /* PA8 */
#define GPIO_I2C3_SDA (GPIO_I2C3_SDA_1|GPIO_SPEED_50MHz) /* PC9 */
/* Analog
*
@@ -296,8 +296,8 @@
* mikroBUS1 ADC: PD12-MB2-PWM (TIM4, channel 1)
*/
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2 /* PE9 */
#define GPIO_TIM4_CH1OUT GPIO_TIM4_CH1OUT_2 /* PD12 */
#define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_2|GPIO_SPEED_50MHz) /* PE9 */
#define GPIO_TIM4_CH1OUT (GPIO_TIM4_CH1OUT_2|GPIO_SPEED_50MHz) /* PD12 */
/* DMA Channel/Stream Selections ********************************************/
@@ -311,4 +311,11 @@
#define DMAMAP_SDIO DMAMAP_SDIO_1
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_CLICKER2_STM32_INCLUDE_BOARD_H */
boards/arm/stm32/mikroe-stm32f4/configs/fulldemo/defconfig
+1
View File
@@ -15,6 +15,7 @@
# CONFIG_NX_DISABLE_16BPP is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_STM32_CCMEXCLUDE is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y
boards/arm/stm32/mikroe-stm32f4/configs/kostest/defconfig
+1
View File
@@ -9,6 +9,7 @@
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y
boards/arm/stm32/mikroe-stm32f4/configs/nsh/defconfig
+1
View File
@@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y
boards/arm/stm32/mikroe-stm32f4/configs/nx/defconfig
+1
View File
@@ -13,6 +13,7 @@
# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set
# CONFIG_NX_DISABLE_16BPP is not set
# CONFIG_SERIAL is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y
boards/arm/stm32/mikroe-stm32f4/configs/nxlines/defconfig
+1
View File
@@ -15,6 +15,7 @@
# CONFIG_NX_DISABLE_16BPP is not set
# CONFIG_NX_WRITEONLY is not set
# CONFIG_SERIAL is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y
boards/arm/stm32/mikroe-stm32f4/configs/nxtext/defconfig
+1
View File
@@ -13,6 +13,7 @@
# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set
# CONFIG_NX_DISABLE_16BPP is not set
# CONFIG_SERIAL is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y
boards/arm/stm32/mikroe-stm32f4/configs/usbnsh/defconfig
+1
View File
@@ -10,6 +10,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y
boards/arm/stm32/mikroe-stm32f4/include/board.h
+20 -13
View File
@@ -208,8 +208,8 @@
* UART2 to the expansion header.
*/
#define GPIO_USART2_RX GPIO_USART2_RX_2
#define GPIO_USART2_TX GPIO_USART2_TX_2
#define GPIO_USART2_RX (GPIO_USART2_RX_2|GPIO_SPEED_100MHz)
#define GPIO_USART2_TX (GPIO_USART2_TX_2|GPIO_SPEED_100MHz)
/* PWM
*
@@ -217,28 +217,35 @@
* be configured to output a pulse train using TIM4 CH2 on PD13.
*/
#define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2
#define GPIO_TIM4_CH2OUT (GPIO_TIM4_CH2OUT_2|GPIO_SPEED_50MHz)
/* SPI - Onboard devices use SPI3, plus SPI2 routes to the I/O header */
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX
#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_2
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_2
#define GPIO_SPI3_MISO (GPIO_SPI3_MISO_2|GPIO_SPEED_50MHz)
#define GPIO_SPI3_MOSI (GPIO_SPI3_MOSI_2|GPIO_SPEED_50MHz)
#define GPIO_SPI3_SCK (GPIO_SPI3_SCK_2|GPIO_SPEED_50MHz)
#define DMACHAN_SPI3_RX DMAMAP_SPI3_RX_2
#define DMACHAN_SPI3_TX DMAMAP_SPI3_TX_2
/* Timer Inputs/Outputs */
#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_2
#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1
#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_2|GPIO_SPEED_50MHz)
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1|GPIO_SPEED_50MHz)
#define GPIO_TIM8_CH1IN GPIO_TIM8_CH1IN_1
#define GPIO_TIM8_CH2IN GPIO_TIM8_CH2IN_1
#define GPIO_TIM8_CH1IN (GPIO_TIM8_CH1IN_1|GPIO_SPEED_50MHz)
#define GPIO_TIM8_CH2IN (GPIO_TIM8_CH2IN_1|GPIO_SPEED_50MHz)
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_MIKROE_STM32F4_INCLUDE_BOARD_H */
boards/arm/stm32/nucleo-f401re/configs/fb/defconfig
+1
View File
@@ -11,6 +11,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f401re"
CONFIG_ARCH_BOARD_COMMON=y
boards/arm/stm32/nucleo-f401re/configs/nsh/defconfig
+1
View File
@@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f401re"
CONFIG_ARCH_BOARD_NUCLEO_F401RE=y
boards/arm/stm32/nucleo-f401re/include/board.h
+27 -20
View File
@@ -237,11 +237,11 @@
*/
#if 1
# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
# define GPIO_USART1_RX (GPIO_USART1_RX_1|GPIO_SPEED_100MHz) /* PA10 */
# define GPIO_USART1_TX (GPIO_USART1_TX_1|GPIO_SPEED_100MHz) /* PA9 */
#else
# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */
# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */
# define GPIO_USART1_RX (GPIO_USART1_RX_2|GPIO_SPEED_100MHz) /* PB7 */
# define GPIO_USART1_TX (GPIO_USART1_TX_2|GPIO_SPEED_100MHz) /* PB6 */
#endif
/* USART2:
@@ -251,8 +251,8 @@
* PD5
*/
#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */
#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */
#define GPIO_USART2_RX (GPIO_USART2_RX_1|GPIO_SPEED_100MHz) /* PA3 */
#define GPIO_USART2_TX (GPIO_USART2_TX_1|GPIO_SPEED_100MHz) /* PA2 */
#define GPIO_USART2_RTS GPIO_USART2_RTS_2
#define GPIO_USART2_CTS GPIO_USART2_CTS_2
@@ -263,8 +263,8 @@
* PA11 CN10, pin 14
*/
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */
#define GPIO_USART6_RX (GPIO_USART6_RX_1|GPIO_SPEED_100MHz) /* PC7 */
#define GPIO_USART6_TX (GPIO_USART6_TX_1|GPIO_SPEED_100MHz) /* PC6 */
/* UART RX DMA configurations */
@@ -278,15 +278,15 @@
* but are normally-high GPIOs.
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
#define GPIO_I2C1_SDA_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C2_SDA_GPIO \
@@ -297,13 +297,13 @@
* There are sensors on SPI1, and SPI2 is connected to the FRAM.
*/
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
/* LEDs
*
@@ -367,7 +367,14 @@
#define BUTTON_USER_BIT (1 << BUTTON_USER)
#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP)
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP)
#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP | GPIO_SPEED_50MHz)
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP | GPIO_SPEED_50MHz)
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_NUCLEO_F401RE_INCLUDE_BOARD_H */
boards/arm/stm32/nucleo-f410rb/configs/nsh/defconfig
+1
View File
@@ -9,6 +9,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ANALOG=y
CONFIG_ARCH="arm"
boards/arm/stm32/nucleo-f410rb/include/board.h
+19 -19
View File
@@ -154,7 +154,7 @@
*/
#define ADC1_DMA_CHAN DMAMAP_ADC1_1
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1
#define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz)
#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1
#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1
@@ -171,11 +171,11 @@
*/
#if 1
# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
# define GPIO_USART1_RX (GPIO_USART1_RX_1|GPIO_SPEED_100MHz) /* PA10 */
# define GPIO_USART1_TX (GPIO_USART1_TX_1|GPIO_SPEED_100MHz) /* PA9 */
#else
# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */
# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */
# define GPIO_USART1_RX (GPIO_USART1_RX_2|GPIO_SPEED_100MHz) /* PB7 */
# define GPIO_USART1_TX (GPIO_USART1_TX_2|GPIO_SPEED_100MHz) /* PB6 */
#endif
/* USART2:
@@ -185,8 +185,8 @@
* PD5
*/
#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */
#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */
#define GPIO_USART2_RX (GPIO_USART2_RX_1|GPIO_SPEED_100MHz) /* PA3 */
#define GPIO_USART2_TX (GPIO_USART2_TX_1|GPIO_SPEED_100MHz) /* PA2 */
#define GPIO_USART2_RTS GPIO_USART2_RTS_2
#define GPIO_USART2_CTS GPIO_USART2_CTS_2
@@ -197,8 +197,8 @@
* PA11 CN10, pin 14
*/
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */
#define GPIO_USART6_RX (GPIO_USART6_RX_1|GPIO_SPEED_100MHz) /* PC7 */
#define GPIO_USART6_TX (GPIO_USART6_TX_1|GPIO_SPEED_100MHz) /* PC6 */
/* UART RX DMA configurations */
@@ -212,15 +212,15 @@
* but are normally-high GPIOs.
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
#define GPIO_I2C1_SDA_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C2_SDA_GPIO \
@@ -230,13 +230,13 @@
*
*/
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
/* LEDs
*
boards/arm/stm32/nucleo-f410rb/src/stm32_adc.c
+2 -2
View File
@@ -69,7 +69,7 @@ static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN9, GPIO_ADC1_IN8
GPIO_ADC1_IN9_0, GPIO_ADC1_IN8_0
};
#else
@@ -86,7 +86,7 @@ static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN9
GPIO_ADC1_IN9_0
};
#endif /* CONFIG_STM32_ADC1_DMA */
boards/arm/stm32/nucleo-f411re/configs/mcp2515-extid/defconfig
+1
View File
@@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f411re"
CONFIG_ARCH_BOARD_NUCLEO_F411RE=y
boards/arm/stm32/nucleo-f411re/configs/nsh/defconfig
+1
View File
@@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f411re"
CONFIG_ARCH_BOARD_NUCLEO_F411RE=y
boards/arm/stm32/nucleo-f411re/include/board.h
+27 -20
View File
@@ -234,11 +234,11 @@
*/
#if 1
# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
# define GPIO_USART1_RX (GPIO_USART1_RX_1|GPIO_SPEED_100MHz) /* PA10 */
# define GPIO_USART1_TX (GPIO_USART1_TX_1|GPIO_SPEED_100MHz) /* PA9 */
#else
# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */
# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */
# define GPIO_USART1_RX (GPIO_USART1_RX_2|GPIO_SPEED_100MHz) /* PB7 */
# define GPIO_USART1_TX (GPIO_USART1_TX_2|GPIO_SPEED_100MHz) /* PB6 */
#endif
/* USART2:
@@ -248,8 +248,8 @@
* PD5
*/
#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */
#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */
#define GPIO_USART2_RX (GPIO_USART2_RX_1|GPIO_SPEED_100MHz) /* PA3 */
#define GPIO_USART2_TX (GPIO_USART2_TX_1|GPIO_SPEED_100MHz) /* PA2 */
#define GPIO_USART2_RTS GPIO_USART2_RTS_2
#define GPIO_USART2_CTS GPIO_USART2_CTS_2
@@ -260,8 +260,8 @@
* PA11 CN10, pin 14
*/
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */
#define GPIO_USART6_RX (GPIO_USART6_RX_1|GPIO_SPEED_100MHz) /* PC7 */
#define GPIO_USART6_TX (GPIO_USART6_TX_1|GPIO_SPEED_100MHz) /* PC6 */
/* UART RX DMA configurations */
@@ -275,15 +275,15 @@
* but are normally-high GPIOs.
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
#define GPIO_I2C1_SDA_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C2_SDA_GPIO \
@@ -294,13 +294,13 @@
* There are sensors on SPI1, and SPI2 is connected to the FRAM.
*/
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
/* LEDs
*
@@ -364,7 +364,14 @@
#define BUTTON_USER_BIT (1 << BUTTON_USER)
#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP)
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP)
#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP | GPIO_SPEED_50MHz)
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP | GPIO_SPEED_50MHz)
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_NUCLEO_F411RE_INCLUDE_BOARD_H */
boards/arm/stm32/nucleo-f412zg/configs/nsh/defconfig
+1
View File
@@ -12,6 +12,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_SYSCFG is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ANALOG=y
CONFIG_ARCH="arm"
boards/arm/stm32/nucleo-f412zg/include/board.h
+13 -13
View File
@@ -122,32 +122,32 @@
* TXD: PD5 CN9 pin 6
*/
# define GPIO_USART2_RX GPIO_USART2_RX_2
# define GPIO_USART2_TX GPIO_USART2_TX_2
# define GPIO_USART2_RX (GPIO_USART2_RX_2|GPIO_SPEED_100MHz)
# define GPIO_USART2_TX (GPIO_USART2_TX_2|GPIO_SPEED_100MHz)
/* USART3 (ST-LINK Virtual COM Port):
* RXD: PD9
* TXD: PD8
*/
# define GPIO_USART3_RX GPIO_USART3_RX_3
# define GPIO_USART3_TX GPIO_USART3_TX_3
# define GPIO_USART3_RX (GPIO_USART3_RX_3|GPIO_SPEED_100MHz)
# define GPIO_USART3_TX (GPIO_USART3_TX_3|GPIO_SPEED_100MHz)
/* USART6:
* RXD: PG9 CN10 pin 16
* TXD: PG14 CN10 pin 14
*/
#define GPIO_USART6_RX GPIO_USART6_RX_2
#define GPIO_USART6_TX GPIO_USART6_TX_2
#define GPIO_USART6_RX (GPIO_USART6_RX_2|GPIO_SPEED_100MHz)
#define GPIO_USART6_TX (GPIO_USART6_TX_2|GPIO_SPEED_100MHz)
/* I2C1:
* SCL: PB8 CN7 pin2
* SDA: PB9 CN7 pin4
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
@@ -160,17 +160,17 @@
* SCK: PA5 CN7 pin 10
*/
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
/* CAN1:
* RX: PD0 CN9 pin 25
* TX: PD1 CN9 pin 27
*/
#define GPIO_CAN1_RX GPIO_CAN1_RX_3
#define GPIO_CAN1_TX GPIO_CAN1_TX_3
#define GPIO_CAN1_RX (GPIO_CAN1_RX_3|GPIO_SPEED_50MHz)
#define GPIO_CAN1_TX (GPIO_CAN1_TX_3|GPIO_SPEED_50MHz)
/* LEDs
*
boards/arm/stm32/nucleo-f446re/configs/adc/defconfig
+1
View File
@@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ANALOG=y
CONFIG_ARCH="arm"
boards/arm/stm32/nucleo-f446re/configs/can/defconfig
+1
View File
@@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_NUCLEO_F446RE=y
boards/arm/stm32/nucleo-f446re/configs/cansock/defconfig
+1
View File
@@ -11,6 +11,7 @@
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ALLOW_BSD_COMPONENTS=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
boards/arm/stm32/nucleo-f446re/configs/dac/defconfig
+1
View File
@@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ANALOG=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
boards/arm/stm32/nucleo-f446re/configs/gpio/defconfig
+1
View File
@@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_NUCLEO_F446RE=y
boards/arm/stm32/nucleo-f446re/configs/ihm08m1_b16/defconfig
+1
View File
@@ -7,6 +7,7 @@
#
# CONFIG_DISABLE_MQUEUE is not set
# CONFIG_DISABLE_PTHREAD is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ADC_FIFOSIZE=3
CONFIG_ANALOG=y
boards/arm/stm32/nucleo-f446re/configs/ihm08m1_f32/defconfig
+1
View File
@@ -7,6 +7,7 @@
#
# CONFIG_DISABLE_MQUEUE is not set
# CONFIG_DISABLE_PTHREAD is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ADC_FIFOSIZE=3
CONFIG_ANALOG=y
boards/arm/stm32/nucleo-f446re/configs/lcd/defconfig
+1
View File
@@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_NUCLEO_F446RE=y
boards/arm/stm32/nucleo-f446re/configs/nsh/defconfig
+1
View File
@@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_NUCLEO_F446RE=y
boards/arm/stm32/nucleo-f446re/configs/pwm/defconfig
+1
View File
@@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_NUCLEO_F446RE=y
boards/arm/stm32/nucleo-f446re/configs/qenco/defconfig
+1
View File
@@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_COMMON=y
boards/arm/stm32/nucleo-f446re/configs/systemview/defconfig
+1
View File
@@ -12,6 +12,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_NUCLEO_F446RE=y
boards/arm/stm32/nucleo-f446re/include/board.h
+49 -37
View File
@@ -232,11 +232,11 @@
*/
#if !defined(CONFIG_BOARD_STM32_IHM08M1)
# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
# define GPIO_USART1_RX (GPIO_USART1_RX_1|GPIO_SPEED_100MHz) /* PA10 */
# define GPIO_USART1_TX (GPIO_USART1_TX_1|GPIO_SPEED_100MHz) /* PA9 */
#else
# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */
# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */
# define GPIO_USART1_RX (GPIO_USART1_RX_2|GPIO_SPEED_100MHz) /* PB7 */
# define GPIO_USART1_TX (GPIO_USART1_TX_2|GPIO_SPEED_100MHz) /* PB6 */
#endif
/* USART2:
@@ -246,8 +246,8 @@
* PD5
*/
#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */
#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */
#define GPIO_USART2_RX (GPIO_USART2_RX_1|GPIO_SPEED_100MHz) /* PA3 */
#define GPIO_USART2_TX (GPIO_USART2_TX_1|GPIO_SPEED_100MHz) /* PA2 */
#define GPIO_USART2_RTS GPIO_USART2_RTS_2
#define GPIO_USART2_CTS GPIO_USART2_CTS_2
@@ -258,8 +258,8 @@
* PA11 CN10, pin 14
*/
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */
#define GPIO_USART6_RX (GPIO_USART6_RX_1|GPIO_SPEED_100MHz) /* PC7 */
#define GPIO_USART6_TX (GPIO_USART6_TX_1|GPIO_SPEED_100MHz) /* PC6 */
/* UART RX DMA configurations */
@@ -273,8 +273,8 @@
* but are normally-high GPIOs.
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET| \
GPIO_PORTB|GPIO_PIN8)
@@ -282,8 +282,8 @@
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET| \
GPIO_PORTB|GPIO_PIN9)
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET| \
GPIO_PORTB|GPIO_PIN10)
@@ -296,25 +296,25 @@
* There are sensors on SPI1, and SPI2 is connected to the FRAM.
*/
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_1
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_1
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_1
#define GPIO_SPI3_MISO (GPIO_SPI3_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI3_MOSI (GPIO_SPI3_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI3_SCK (GPIO_SPI3_SCK_1|GPIO_SPEED_50MHz)
/* CAN */
#define GPIO_CAN1_RX GPIO_CAN1_RX_2
#define GPIO_CAN1_TX GPIO_CAN1_TX_2
#define GPIO_CAN1_RX (GPIO_CAN1_RX_2|GPIO_SPEED_50MHz)
#define GPIO_CAN1_TX (GPIO_CAN1_TX_2|GPIO_SPEED_50MHz)
#define GPIO_CAN2_RX GPIO_CAN2_RX_2
#define GPIO_CAN2_TX GPIO_CAN2_TX_2
#define GPIO_CAN2_RX (GPIO_CAN2_RX_2|GPIO_SPEED_50MHz)
#define GPIO_CAN2_TX (GPIO_CAN2_TX_2|GPIO_SPEED_50MHz)
/* LEDs
*
@@ -380,16 +380,16 @@
/* TIM2 input ***************************************************************/
#ifndef CONFIG_NUCLEO_F446RE_QETIMER_TIM2_IHM08M1_MAP
# define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP) /* PA8 */
# define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP) /* PB0 */
# define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP | GPIO_SPEED_50MHz) /* PA8 */
# define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP | GPIO_SPEED_50MHz) /* PB0 */
#else
# define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_2 | GPIO_PULLUP) /* PA15 */
# define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_2 | GPIO_PULLUP) /* PB3 */
# define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_2 | GPIO_PULLUP | GPIO_SPEED_50MHz) /* PA15 */
# define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_2 | GPIO_PULLUP | GPIO_SPEED_50MHz) /* PB3 */
#endif
/* TIM3 configuration *******************************************************/
#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_1
#define GPIO_TIM3_CH1OUT (GPIO_TIM3_CH1OUT_1|GPIO_SPEED_50MHz)
#ifdef CONFIG_BOARD_STM32_IHM08M1
@@ -399,13 +399,13 @@
/* TIM1 configuration *******************************************************/
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 /* TIM1 CH1 - PA8 - U high */
#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1N_1 /* TIM1 CH1N - PA7 - U low */
#define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_1 /* TIM1 CH2 - PA9 - V high */
#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2N_1 /* TIM1 CH2N - PB0 - V low */
#define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 /* TIM1 CH3 - PA10 - W high */
#define GPIO_TIM1_CH3NOUT GPIO_TIM1_CH3N_1 /* TIM1 CH3N - PB1 - W low */
#define GPIO_TIM1_CH4OUT 0 /* not used as output */
#define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz) /* TIM1 CH1 - PA8 - U high */
#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1N_1 /* TIM1 CH1N - PA7 - U low */
#define GPIO_TIM1_CH2OUT (GPIO_TIM1_CH2OUT_1|GPIO_SPEED_50MHz) /* TIM1 CH2 - PA9 - V high */
#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2N_1 /* TIM1 CH2N - PB0 - V low */
#define GPIO_TIM1_CH3OUT (GPIO_TIM1_CH3OUT_1|GPIO_SPEED_50MHz) /* TIM1 CH3 - PA10 - W high */
#define GPIO_TIM1_CH3NOUT GPIO_TIM1_CH3N_1 /* TIM1 CH3N - PB1 - W low */
#define GPIO_TIM1_CH4OUT 0 /* not used as output */
/* Board LED */
@@ -425,4 +425,16 @@
#endif /* CONFIG_BOARD_STM32_IHM08M1 */
/* DAC */
#define GPIO_DAC1_OUT1 GPIO_DAC1_OUT1_0
#define GPIO_DAC1_OUT2 GPIO_DAC1_OUT2_0
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_NUCLEO_F446RE_INCLUDE_BOARD_H */
boards/arm/stm32/nucleo-f446re/src/stm32_adc.c
+3 -3
View File
@@ -70,8 +70,8 @@ static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN0,
GPIO_ADC1_IN1
GPIO_ADC1_IN0_0,
GPIO_ADC1_IN1_0
};
#else
@@ -88,7 +88,7 @@ static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN0
GPIO_ADC1_IN0_0
};
#endif /* CONFIG_STM32_ADC1_DMA */
boards/arm/stm32/nucleo-f446re/src/stm32_foc_ihm08m1.c
+5 -5
View File
@@ -107,17 +107,17 @@ static uint8_t g_adc1_chan[] =
static uint32_t g_adc1_pins[] =
{
#ifdef CONFIG_BOARD_STM32_IHM08M1_VBUS
GPIO_ADC1_IN1,
GPIO_ADC1_IN1_0,
#endif
#ifdef CONFIG_BOARD_STM32_IHM08M1_POT
GPIO_ADC1_IN4,
GPIO_ADC1_IN4_0,
#endif
GPIO_ADC1_IN0,
GPIO_ADC1_IN0_0,
#if CONFIG_MOTOR_FOC_SHUNTS > 1
GPIO_ADC1_IN11,
GPIO_ADC1_IN11_0,
#endif
#if CONFIG_MOTOR_FOC_SHUNTS > 2
GPIO_ADC1_IN10
GPIO_ADC1_IN10_0
#endif
};
boards/arm/stm32/olimex-stm32-e407/configs/bmp180/defconfig
+1
View File
@@ -8,6 +8,7 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_COMMON=y
boards/arm/stm32/olimex-stm32-e407/configs/dac/defconfig
+1
View File
@@ -8,6 +8,7 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ANALOG=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
boards/arm/stm32/olimex-stm32-e407/configs/discover/defconfig
+1
View File
@@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y
boards/arm/stm32/olimex-stm32-e407/configs/ina219/defconfig
+1
View File
@@ -7,6 +7,7 @@
#
# CONFIG_ARCH_FPU is not set
# CONFIG_DEV_CONSOLE is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_COMMON=y
boards/arm/stm32/olimex-stm32-e407/configs/mrf24j40-6lowpan/defconfig
+1
View File
@@ -10,6 +10,7 @@
# CONFIG_NET_IPv4 is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y

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