STM32: Hook 1-Wire driver into the build system

arch/arm/include/stm32/stm32f10xxx_irq.h

@@ -120,7 +120,7 @@
 #  define STM32_IRQ_TIM5        (66) /* 50: TIM5 global interrupt */
 #  define STM32_IRQ_SPI3        (67) /* 51: SPI3 global interrupt */
 #  define STM32_IRQ_UART4       (68) /* 52: USART2 global interrupt */
-#  define STM32_IRQ_UART5       (69) /* 53: USART5 global interrupt */
+#  define STM32_IRQ_UART5       (69) /* 53: UART5 global interrupt */
 #  define STM32_IRQ_TIM6        (70) /* 54: TIM6 global interrupt */
 #  define STM32_IRQ_TIM7        (71) /* 55: TIM7 global interrupt */
 #  define STM32_IRQ_DMA2CH1     (72) /* 56: DMA2 Channel 1 global interrupt */

arch/arm/src/stm32/Kconfig

@@ -2160,63 +2160,47 @@ config STM32_TSC
 config STM32_USART1
 	bool "USART1"
 	default n
-	select USART1_SERIALDRIVER
-	select ARCH_HAVE_SERIAL_TERMIOS
 	select STM32_USART
 
 config STM32_USART2
 	bool "USART2"
 	default n
-	select USART2_SERIALDRIVER
-	select ARCH_HAVE_SERIAL_TERMIOS
 	select STM32_USART
 
 config STM32_USART3
 	bool "USART3"
 	default n
 	depends on STM32_HAVE_USART3
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select USART3_SERIALDRIVER
 	select STM32_USART
 
 config STM32_UART4
 	bool "UART4"
 	default n
 	depends on STM32_HAVE_UART4
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select UART4_SERIALDRIVER
 	select STM32_USART
 
 config STM32_UART5
 	bool "UART5"
 	default n
 	depends on STM32_HAVE_UART5
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select UART5_SERIALDRIVER
 	select STM32_USART
 
 config STM32_USART6
 	bool "USART6"
 	default n
 	depends on STM32_HAVE_USART6
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select USART6_SERIALDRIVER
 	select STM32_USART
 
 config STM32_UART7
 	bool "UART7"
 	default n
 	depends on STM32_HAVE_UART7
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select UART7_SERIALDRIVER
 	select STM32_USART
 
 config STM32_UART8
 	bool "UART8"
 	default n
 	depends on STM32_HAVE_UART8
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select UART8_SERIALDRIVER
 	select STM32_USART
 
 config STM32_USB
@@ -5414,13 +5398,37 @@ endmenu
 config STM32_USART
 	bool
 
+config STM32_SERIALDRIVER
+	bool
+
+config STM32_1WIREDRIVER
+	bool
+
 menu "U[S]ART Configuration"
 	depends on STM32_USART
 
+choice
+	prompt "USART1 Driver Configuration"
+	default STM32_USART1_SERIALDRIVER
+	depends on STM32_USART1
+
+config STM32_USART1_SERIALDRIVER
+	bool "Standard serial driver"
+	select USART1_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select STM32_SERIALDRIVER
+
+config STM32_USART1_1WIREDRIVER
+	bool "1-Wire driver"
+	select STM32_1WIREDRIVER
+
+endchoice # USART1 Driver Configuration
+
+if STM32_USART1_SERIALDRIVER
+
 config USART1_RS485
 	bool "RS-485 on USART1"
 	default n
-	depends on STM32_USART1
 	---help---
 		Enable RS-485 interface on USART1. Your board config will have to
 		provide GPIO_USART1_RS485_DIR pin definition. Currently it cannot be
@@ -5438,14 +5446,34 @@ config USART1_RS485_DIR_POLARITY
 config USART1_RXDMA
 	bool "USART1 Rx DMA"
 	default n
-	depends on STM32_USART1 && (((STM32_STM32F10XX || STM32_STM32L15XX) && STM32_DMA1) || (!STM32_STM32F10XX && STM32_DMA2))
+	depends on (((STM32_STM32F10XX || STM32_STM32L15XX) && STM32_DMA1) || (!STM32_STM32F10XX && STM32_DMA2))
 	---help---
 		In high data rate usage, Rx DMA may eliminate Rx overrun errors
 
+endif # STM32_USART1_SERIALDRIVER
+
+choice
+	prompt "USART2 Driver Configuration"
+	default STM32_USART2_SERIALDRIVER
+	depends on STM32_USART2
+
+config STM32_USART2_SERIALDRIVER
+	bool "Standard serial driver"
+	select USART2_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select STM32_SERIALDRIVER
+
+config STM32_USART2_1WIREDRIVER
+	bool "1-Wire driver"
+	select STM32_1WIREDRIVER
+
+endchoice # USART2 Driver Configuration
+
+if STM32_USART2_SERIALDRIVER
+
 config USART2_RS485
 	bool "RS-485 on USART2"
 	default n
-	depends on STM32_USART2
 	---help---
 		Enable RS-485 interface on USART2. Your board config will have to
 		provide GPIO_USART2_RS485_DIR pin definition. Currently it cannot be
@@ -5463,14 +5491,34 @@ config USART2_RS485_DIR_POLARITY
 config USART2_RXDMA
 	bool "USART2 Rx DMA"
 	default n
-	depends on STM32_USART2 && STM32_DMA1
+	depends on STM32_DMA1
 	---help---
 		In high data rate usage, Rx DMA may eliminate Rx overrun errors
 
+endif # STM32_USART2_SERIALDRIVER
+
+choice
+	prompt "USART3 Driver Configuration"
+	default STM32_USART3_SERIALDRIVER
+	depends on STM32_USART3
+
+config STM32_USART3_SERIALDRIVER
+	bool "Standard serial driver"
+	select USART3_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select STM32_SERIALDRIVER
+
+config STM32_USART3_1WIREDRIVER
+	bool "1-Wire driver"
+	select STM32_1WIREDRIVER
+
+endchoice # USART3 Driver Configuration
+
+if STM32_USART3_SERIALDRIVER
+
 config USART3_RS485
 	bool "RS-485 on USART3"
 	default n
-	depends on STM32_USART3
 	---help---
 		Enable RS-485 interface on USART3. Your board config will have to
 		provide GPIO_USART3_RS485_DIR pin definition. Currently it cannot be
@@ -5488,14 +5536,34 @@ config USART3_RS485_DIR_POLARITY
 config USART3_RXDMA
 	bool "USART3 Rx DMA"
 	default n
-	depends on STM32_USART3 && STM32_DMA1
+	depends on STM32_DMA1
 	---help---
 		In high data rate usage, Rx DMA may eliminate Rx overrun errors
 
+endif # STM32_USART3_SERIALDRIVER
+
+choice
+	prompt "UART4 Driver Configuration"
+	default STM32_UART4_SERIALDRIVER
+	depends on STM32_UART4
+
+config STM32_UART4_SERIALDRIVER
+	bool "Standard serial driver"
+	select UART4_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select STM32_SERIALDRIVER
+
+config STM32_UART4_1WIREDRIVER
+	bool "1-Wire driver"
+	select STM32_1WIREDRIVER
+
+endchoice # UART1 Driver Configuration
+
+if STM32_UART4_SERIALDRIVER
+
 config UART4_RS485
 	bool "RS-485 on UART4"
 	default n
-	depends on STM32_UART4
 	---help---
 		Enable RS-485 interface on UART4. Your board config will have to
 		provide GPIO_UART4_RS485_DIR pin definition. Currently it cannot be
@@ -5513,14 +5581,34 @@ config UART4_RS485_DIR_POLARITY
 config UART4_RXDMA
 	bool "UART4 Rx DMA"
 	default n
-	depends on STM32_UART4 && STM32_DMA1
+	depends on STM32_DMA1
 	---help---
 		In high data rate usage, Rx DMA may eliminate Rx overrun errors
 
+endif # STM32_UART4_SERIALDRIVER
+
+choice
+	prompt "UART5 Driver Configuration"
+	default STM32_UART5_SERIALDRIVER
+	depends on STM32_UART5
+
+config STM32_UART5_SERIALDRIVER
+	bool "Standard serial driver"
+	select UART5_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select STM32_SERIALDRIVER
+
+config STM32_UART5_1WIREDRIVER
+	bool "1-Wire driver"
+	select STM32_1WIREDRIVER
+
+endchoice # UART5 Driver Configuration
+
+if STM32_UART5_SERIALDRIVER
+
 config UART5_RS485
 	bool "RS-485 on UART5"
 	default n
-	depends on STM32_UART5
 	---help---
 		Enable RS-485 interface on UART5. Your board config will have to
 		provide GPIO_UART5_RS485_DIR pin definition. Currently it cannot be
@@ -5538,14 +5626,34 @@ config UART5_RS485_DIR_POLARITY
 config UART5_RXDMA
 	bool "UART5 Rx DMA"
 	default n
-	depends on STM32_UART5 && STM32_DMA1
+	depends on STM32_DMA1
 	---help---
 		In high data rate usage, Rx DMA may eliminate Rx overrun errors
 
+endif # STM32_UART5_SERIALDRIVER
+
+choice
+	prompt "USART6 Driver Configuration"
+	default STM32_USART6_SERIALDRIVER
+	depends on STM32_USART6
+
+config STM32_USART6_SERIALDRIVER
+	bool "Standard serial driver"
+	select USART6_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select STM32_SERIALDRIVER
+
+config STM32_USART6_1WIREDRIVER
+	bool "1-Wire driver"
+	select STM32_1WIREDRIVER
+
+endchoice # USART6 Driver Configuration
+
+if STM32_USART6_SERIALDRIVER
+
 config USART6_RS485
 	bool "RS-485 on USART6"
 	default n
-	depends on STM32_USART6
 	---help---
 		Enable RS-485 interface on USART6. Your board config will have to
 		provide GPIO_USART6_RS485_DIR pin definition. Currently it cannot be
@@ -5563,14 +5671,34 @@ config USART6_RS485_DIR_POLARITY
 config USART6_RXDMA
 	bool "USART6 Rx DMA"
 	default n
-	depends on STM32_USART6 && STM32_DMA2
+	depends on STM32_DMA2
 	---help---
 		In high data rate usage, Rx DMA may eliminate Rx overrun errors
 
+endif # STM32_USART6_SERIALDRIVER
+
+choice
+	prompt "UART7 Driver Configuration"
+	default STM32_UART7_SERIALDRIVER
+	depends on STM32_UART7
+
+config STM32_UART7_SERIALDRIVER
+	bool "Standard serial driver"
+	select UART7_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select STM32_SERIALDRIVER
+
+config STM32_UART7_1WIREDRIVER
+	bool "1-Wire driver"
+	select STM32_1WIREDRIVER
+
+endchoice # UART7 Driver Configuration
+
+if STM32_UART7_SERIALDRIVER
+
 config UART7_RS485
 	bool "RS-485 on UART7"
 	default n
-	depends on STM32_UART7
 	---help---
 		Enable RS-485 interface on UART7. Your board config will have to
 		provide GPIO_UART7_RS485_DIR pin definition. Currently it cannot be
@@ -5588,14 +5716,34 @@ config UART7_RS485_DIR_POLARITY
 config UART7_RXDMA
 	bool "UART7 Rx DMA"
 	default n
-	depends on STM32_UART7 && STM32_DMA2
+	depends on STM32_DMA2
 	---help---
 		In high data rate usage, Rx DMA may eliminate Rx overrun errors
 
+endif # STM32_UART7_SERIALDRIVER
+
+choice
+	prompt "UART8 Driver Configuration"
+	default STM32_UART8_SERIALDRIVER
+	depends on STM32_UART7
+
+config STM32_UART8_SERIALDRIVER
+	bool "Standard serial driver"
+	select UART8_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select STM32_SERIALDRIVER
+
+config STM32_UART8_1WIREDRIVER
+	bool "1-Wire driver"
+	select STM32_1WIREDRIVER
+
+endchoice # UART8 Driver Configuration
+
+if STM32_UART8_SERIALDRIVER
+
 config UART8_RS485
 	bool "RS-485 on UART8"
 	default n
-	depends on STM32_UART8
 	---help---
 		Enable RS-485 interface on UART8. Your board config will have to
 		provide GPIO_UART8_RS485_DIR pin definition. Currently it cannot be
@@ -5613,10 +5761,14 @@ config UART8_RS485_DIR_POLARITY
 config UART8_RXDMA
 	bool "UART8 Rx DMA"
 	default n
-	depends on STM32_UART8 && STM32_DMA2
+	depends on STM32_DMA2
 	---help---
 		In high data rate usage, Rx DMA may eliminate Rx overrun errors
 
+endif # STM32_UART8_SERIALDRIVER
+
+if STM32_SERIALDRIVER
+
 config SERIAL_DISABLE_REORDERING
 	bool "Disable reordering of ttySx devices."
 	depends on STM32_USART1 || STM32_USART2 || STM32_USART3 || STM32_UART4 || STM32_UART5 || STM32_USART6 || STM32_UART7 || STM32_UART8
@@ -5661,8 +5813,6 @@ config STM32_SERIALBRK_BSDCOMPAT
 		on because the SW starts the break and then the HW automatically clears
 		the break. This makes it is difficult to sent a long break.
 
-endmenu # U[S]ART Configuration
-
 config STM32_USART_SINGLEWIRE
 	bool "Single Wire Support"
 	default n
@@ -5671,6 +5821,9 @@ config STM32_USART_SINGLEWIRE
 		Enable single wire UART support.  The option enables support for the
 		TIOCSSINGLEWIRE ioctl in the STM32 serial driver.
 
+endif # STM32_SERIALDRIVER
+endmenu # U[S]ART Configuration
+
 menu "SPI Configuration"
 	depends on STM32_SPI
 

arch/arm/src/stm32/Make.defs

@@ -211,6 +211,10 @@ ifeq ($(CONFIG_DAC),y)
 CHIP_CSRCS += stm32_dac.c
 endif
 
+ifeq ($(CONFIG_STM32_1WIREDRIVER),y)
+CHIP_CSRCS += stm32_1wire.c
+endif
+
 ifeq ($(CONFIG_STM32_RNG),y)
 CHIP_CSRCS += stm32_rng.c
 endif

arch/arm/src/stm32/chip/stm32f10xxx_vectors.h

@@ -110,7 +110,7 @@ UNUSED(STM32_IRQ_RESERVED6)                       /* Vector 16+49: Reserved 6 */
 VECTOR(stm32_tim5, STM32_IRQ_TIM5)                /* Vector 16+50: TIM5 global interrupt */
 VECTOR(stm32_spi3, STM32_IRQ_SPI3)                /* Vector 16+51: SPI3 global interrupt */
 VECTOR(stm32_uart4, STM32_IRQ_UART4)              /* Vector 16+52: USART2 global interrupt */
-VECTOR(stm32_uart5, STM32_IRQ_UART5)              /* Vector 16+53: USART5 global interrupt */
+VECTOR(stm32_uart5, STM32_IRQ_UART5)              /* Vector 16+53: UART5 global interrupt */
 VECTOR(stm32_tim6, STM32_IRQ_TIM6)                /* Vector 16+54: TIM6 global interrupt */
 VECTOR(stm32_tim7, STM32_IRQ_TIM7)                /* Vector 16+55: TIM7 global interrupt */
 VECTOR(stm32_dma2ch1, STM32_IRQ_DMA2CH1)          /* Vector 16+56: DMA2 Channel 1 global interrupt */

arch/arm/src/stm32/stm32_1wire.c

@@ -65,6 +65,8 @@
 #include "stm32_rcc.h"
 #include "stm32_1wire.h"
 
+#ifdef HAVE_1WIREDRIVER
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
@@ -156,28 +158,28 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
                                FAR const struct stm32_1wire_msg_s *msgs, int count);
 static int stm32_1wire_isr(struct stm32_1wire_priv_s *priv);
 
-#ifdef CONFIG_STM32_1WIRE1
+#ifdef CONFIG_STM32_USART1_1WIREDRIVER
 static int up_interrupt_1wire1(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_1WIRE2
+#ifdef CONFIG_STM32_USART2_1WIREDRIVER
 static int up_interrupt_1wire2(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_1WIRE3
+#ifdef CONFIG_STM32_USART3_1WIREDRIVER
 static int up_interrupt_1wire3(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_1WIRE4
+#ifdef CONFIG_STM32_UART4_1WIREDRIVER
 static int up_interrupt_1wire4(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_1WIRE5
+#ifdef CONFIG_STM32_UART5_1WIREDRIVER
 static int up_interrupt_1wire5(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_1WIRE6
+#ifdef CONFIG_STM32_USART6_1WIREDRIVER
 static int up_interrupt_1wire6(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_1WIRE7
+#ifdef CONFIG_STM32_UART7_1WIREDRIVER
 static int up_interrupt_1wire7(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_1WIRE8
+#ifdef CONFIG_STM32_UART8_1WIREDRIVER
 static int up_interrupt_1wire8(int irq, void *context);
 #endif
 
@@ -196,7 +198,7 @@ static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
 
 /* 1-Wire device structures */
 
-#ifdef CONFIG_STM32_1WIRE1
+#ifdef CONFIG_STM32_USART1_1WIREDRIVER
 
 static const struct stm32_1wire_config_s stm32_1wire1_config =
 {
@@ -216,7 +218,7 @@ static struct stm32_1wire_priv_s stm32_1wire1_priv =
 
 #endif
 
-#ifdef CONFIG_STM32_1WIRE2
+#ifdef CONFIG_STM32_USART2_1WIREDRIVER
 
 static const struct stm32_1wire_config_s stm32_1wire2_config =
 {
@@ -236,7 +238,7 @@ static struct stm32_1wire_priv_s stm32_1wire2_priv =
 
 #endif
 
-#ifdef CONFIG_STM32_1WIRE3
+#ifdef CONFIG_STM32_USART3_1WIREDRIVER
 
 static const struct stm32_1wire_config_s stm32_1wire3_config =
 {
@@ -256,14 +258,14 @@ static struct stm32_1wire_priv_s stm32_1wire3_priv =
 
 #endif
 
-#ifdef CONFIG_STM32_1WIRE4
+#ifdef CONFIG_STM32_UART4_1WIREDRIVER
 
 static const struct stm32_1wire_config_s stm32_1wire4_config =
 {
-  .usartbase  = STM32_USART4_BASE,
+  .usartbase  = STM32_UART4_BASE,
   .apbclock   = STM32_PCLK1_FREQUENCY,
-  .data_pin   = PIN_OPENDRAIN(GPIO_USART4_TX),
+  .data_pin   = PIN_OPENDRAIN(GPIO_UART4_TX),
-  .irq        = STM32_IRQ_USART4,
+  .irq        = STM32_IRQ_UART4,
   .vector     = up_interrupt_1wire4,
 };
 
@@ -276,14 +278,14 @@ static struct stm32_1wire_priv_s stm32_1wire4_priv =
 
 #endif
 
-#ifdef CONFIG_STM32_1WIRE5
+#ifdef CONFIG_STM32_UART5_1WIREDRIVER
 
 static const struct stm32_1wire_config_s stm32_1wire5_config =
 {
-  .usartbase  = STM32_USART5_BASE,
+  .usartbase  = STM32_UART5_BASE,
   .apbclock   = STM32_PCLK1_FREQUENCY,
-  .data_pin   = PIN_OPENDRAIN(GPIO_USART5_TX),
+  .data_pin   = PIN_OPENDRAIN(GPIO_UART5_TX),
-  .irq        = STM32_IRQ_USART5,
+  .irq        = STM32_IRQ_UART5,
   .vector     = up_interrupt_1wire5,
 };
 
@@ -296,7 +298,7 @@ static struct stm32_1wire_priv_s stm32_1wire5_priv =
 
 #endif
 
-#ifdef CONFIG_STM32_1WIRE6
+#ifdef CONFIG_STM32_USART6_1WIREDRIVER
 
 static const struct stm32_1wire_config_s stm32_1wire6_config =
 {
@@ -316,14 +318,14 @@ static struct stm32_1wire_priv_s stm32_1wire6_priv =
 
 #endif
 
-#ifdef CONFIG_STM32_1WIRE7
+#ifdef CONFIG_STM32_UART7_1WIREDRIVER
 
 static const struct stm32_1wire_config_s stm32_1wire7_config =
 {
-  .usartbase  = STM32_USART7_BASE,
+  .usartbase  = STM32_UART7_BASE,
   .apbclock   = STM32_PCLK1_FREQUENCY,
-  .data_pin   = PIN_OPENDRAIN(GPIO_USART7_TX),
+  .data_pin   = PIN_OPENDRAIN(GPIO_UART7_TX),
-  .irq        = STM32_IRQ_USART7,
+  .irq        = STM32_IRQ_UART7,
   .vector     = up_interrupt_1wire7,
 };
 
@@ -336,14 +338,14 @@ static struct stm32_1wire_priv_s stm32_1wire7_priv =
 
 #endif
 
-#ifdef CONFIG_STM32_1WIRE8
+#ifdef CONFIG_STM32_UART8_1WIREDRIVER
 
 static const struct stm32_1wire_config_s stm32_1wire8_config =
 {
-  .usartbase  = STM32_USART8_BASE,
+  .usartbase  = STM32_UART8_BASE,
   .apbclock   = STM32_PCLK1_FREQUENCY,
-  .data_pin   = PIN_OPENDRAIN(GPIO_USART8_TX),
+  .data_pin   = PIN_OPENDRAIN(GPIO_UART8_TX),
-  .irq        = STM32_IRQ_USART8,
+  .irq        = STM32_IRQ_UART8,
   .vector     = up_interrupt_1wire8,
 };
 
@@ -548,19 +550,19 @@ static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv,
     default:
       return;
 
-#ifdef CONFIG_STM32_1WIRE1
+#ifdef CONFIG_STM32_USART1_1WIREDRIVER
     case STM32_USART1_BASE:
       rcc_en = RCC_APB2ENR_USART1EN;
       regaddr = STM32_RCC_APB2ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_1WIRE2
+#ifdef CONFIG_STM32_USART2_1WIREDRIVER
     case STM32_USART2_BASE:
       rcc_en = RCC_APB1ENR_USART2EN;
       regaddr = STM32_RCC_APB1ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_1WIRE3
+#ifdef CONFIG_STM32_USART3_1WIREDRIVER
     case STM32_USART3_BASE:
       rcc_en = RCC_APB1ENR_USART3EN;
       regaddr = STM32_RCC_APB1ENR;
@@ -578,7 +580,7 @@ static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv,
       regaddr = STM32_RCC_APB1ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_1WIRE6
+#ifdef CONFIG_STM32_USART6_1WIREDRIVER
     case STM32_USART6_BASE:
       rcc_en = RCC_APB2ENR_USART6EN;
       regaddr = STM32_RCC_APB2ENR;
@@ -795,6 +797,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
 {
   irqstate_t irqs;
   struct timespec abstime;
+  int indx;
   int ret;
 
   /* Lock out other clients */
@@ -803,7 +806,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
 
   priv->result = ERROR;
 
-  for (int indx = 0; indx < count; indx++)
+  for (indx = 0; indx < count; indx++)
     {
       switch (msgs[indx].task)
         {
@@ -819,10 +822,10 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
 
           /* Atomic */
 
-          irqs = irqsave();
+          irqs = enter_critical_section();
           priv->msgs = &msgs[indx];
           stm32_1wire_send(priv, RESET_TX);
-          irqrestore(irqs);
+          leave_critical_section(irqs);
 
           /* Wait */
 
@@ -839,12 +842,12 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
 
           /* Atomic */
 
-          irqs = irqsave();
+          irqs = enter_critical_section();
           priv->msgs = &msgs[indx];
           priv->byte = priv->msgs->buffer;
           priv->bit = 0;
           stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0);
-          irqrestore(irqs);
+          leave_critical_section(irqs);
 
           /* Wait */
 
@@ -861,12 +864,12 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
 
           /* Atomic */
 
-          irqs = irqsave();
+          irqs = enter_critical_section();
           priv->msgs = &msgs[indx];
           priv->byte = priv->msgs->buffer;
           priv->bit = 0;
           stm32_1wire_send(priv, READ_TX);
-          irqrestore(irqs);
+          leave_critical_section(irqs);
 
           /* Wait */
 
@@ -884,10 +887,10 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
 
   /* Atomic */
 
-  irqs = irqsave();
+  irqs = enter_critical_section();
   priv->msgs = NULL;
   ret = priv->result;
-  irqrestore(irqs);
+  leave_critical_section(irqs);
 
   /* Release the port for re-use by other clients */
 
@@ -1027,49 +1030,49 @@ static int stm32_1wire_isr(struct stm32_1wire_priv_s *priv)
   return OK;
 }
 
-#ifdef CONFIG_STM32_1WIRE1
+#ifdef CONFIG_STM32_USART1_1WIREDRIVER
 static int up_interrupt_1wire1(int irq, void *context)
 {
   return stm32_1wire_isr(&stm32_1wire1_priv);
 }
 #endif
-#ifdef CONFIG_STM32_1WIRE2
+#ifdef CONFIG_STM32_USART2_1WIREDRIVER
 static int up_interrupt_1wire2(int irq, void *context)
 {
   return stm32_1wire_isr(&stm32_1wire2_priv);
 }
 #endif
-#ifdef CONFIG_STM32_1WIRE3
+#ifdef CONFIG_STM32_USART3_1WIREDRIVER
 static int up_interrupt_1wire3(int irq, void *context)
 {
   return stm32_1wire_isr(&stm32_1wire3_priv);
 }
 #endif
-#ifdef CONFIG_STM32_1WIRE4
+#ifdef CONFIG_STM32_UART4_1WIREDRIVER
 static int up_interrupt_1wire4(int irq, void *context)
 {
   return stm32_1wire_isr(&stm32_1wire4_priv);
 }
 #endif
-#ifdef CONFIG_STM32_1WIRE5
+#ifdef CONFIG_STM32_UART5_1WIREDRIVER
 static int up_interrupt_1wire5(int irq, void *context)
 {
   return stm32_1wire_isr(&stm32_1wire5_priv);
 }
 #endif
-#ifdef CONFIG_STM32_1WIRE6
+#ifdef CONFIG_STM32_USART6_1WIREDRIVER
 static int up_interrupt_1wire6(int irq, void *context)
 {
   return stm32_1wire_isr(&stm32_1wire6_priv);
 }
 #endif
-#ifdef CONFIG_STM32_1WIRE7
+#ifdef CONFIG_STM32_UART7_1WIREDRIVER
 static int up_interrupt_1wire7(int irq, void *context)
 {
   return stm32_1wire_isr(&stm32_1wire7_priv);
 }
 #endif
-#ifdef CONFIG_STM32_1WIRE8
+#ifdef CONFIG_STM32_UART8_1WIREDRIVER
 static int up_interrupt_1wire8(int irq, void *context)
 {
   return stm32_1wire_isr(&stm32_1wire8_priv);
@@ -1213,42 +1216,42 @@ FAR struct onewire_dev_s *up_1wireinitialize(int port)
 
   switch (port)
     {
-#ifdef CONFIG_STM32_1WIRE1
+#ifdef CONFIG_STM32_USART1_1WIREDRIVER
     case 1:
       priv = &stm32_1wire1_priv;
       break;
 #endif
-#ifdef CONFIG_STM32_1WIRE2
+#ifdef CONFIG_STM32_USART2_1WIREDRIVER
     case 2:
       priv = &stm32_1wire2_priv;
       break;
 #endif
-#ifdef CONFIG_STM32_1WIRE3
+#ifdef CONFIG_STM32_USART3_1WIREDRIVER
     case 3:
       priv = &stm32_1wire3_priv;
       break;
 #endif
-#ifdef CONFIG_STM32_1WIRE4
+#ifdef CONFIG_STM32_UART4_1WIREDRIVER
     case 4:
       priv = &stm32_1wire4_priv;
       break;
 #endif
-#ifdef CONFIG_STM32_1WIRE5
+#ifdef CONFIG_STM32_UART5_1WIREDRIVER
     case 5:
       priv = &stm32_1wire5_priv;
       break;
 #endif
-#ifdef CONFIG_STM32_1WIRE6
+#ifdef CONFIG_STM32_USART6_1WIREDRIVER
     case 6:
       priv = &stm32_1wire6_priv;
       break;
 #endif
-#ifdef CONFIG_STM32_1WIRE7
+#ifdef CONFIG_STM32_UART7_1WIREDRIVER
     case 7:
       priv = &stm32_1wire7_priv;
       break;
 #endif
-#ifdef CONFIG_STM32_1WIRE8
+#ifdef CONFIG_STM32_UART8_1WIREDRIVER
     case 8:
       priv = &stm32_1wire8_priv;
       break;
@@ -1273,7 +1276,7 @@ FAR struct onewire_dev_s *up_1wireinitialize(int port)
    * power-up hardware and configure GPIOs.
    */
 
-  irqs = irqsave();
+  irqs = enter_critical_section();
 
   if (priv->refs++ == 0)
     {
@@ -1281,7 +1284,7 @@ FAR struct onewire_dev_s *up_1wireinitialize(int port)
       stm32_1wire_init(priv);
     }
 
-  irqrestore(irqs);
+  leave_critical_section(irqs);
   return (struct onewire_dev_s *)inst;
 }
 
@@ -1307,16 +1310,16 @@ int up_1wireuninitialize(FAR struct onewire_dev_s *dev)
       return ERROR;
     }
 
-  irqs = irqsave();
+  irqs = enter_critical_section();
 
   if (--priv->refs)
     {
-      irqrestore(irqs);
+      leave_critical_section(irqs);
       kmm_free(priv);
       return OK;
     }
 
-  irqrestore(irqs);
+  leave_critical_section(irqs);
 
   /* Disable power and other HW resource (GPIO's) */
 
@@ -1331,3 +1334,5 @@ int up_1wireuninitialize(FAR struct onewire_dev_s *dev)
   kmm_free(dev);
   return OK;
 }
+
+#endif /* HAVE_1WIREDRIVER */

arch/arm/src/stm32/stm32_1wire.h

@@ -42,62 +42,12 @@
 
 #include <nuttx/config.h>
 
-#include "chip.h"
+#include "stm32_uart.h"
-
-#if defined(CONFIG_STM32_STM32L15XX)
-#  include "chip/stm32l15xxx_uart.h"
-#elif defined(CONFIG_STM32_STM32F10XX)
-#  include "chip/stm32f10xxx_uart.h"
-#elif defined(CONFIG_STM32_STM32F20XX)
-#  include "chip/stm32f20xxx_uart.h"
-#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
-#  include "chip/stm32f30xxx_uart.h"
-#elif defined(CONFIG_STM32_STM32F40XX)
-#  include "chip/stm32f40xxx_uart.h"
-#else
-#  error "Unsupported STM32 UART"
-#endif
 
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Check 1-Wire and U(S)ART conflicting */
-
-#if defined(CONFIG_STM32_1WIRE1) && defined(CONFIG_STM32_USART1)
-#  undef CONFIG_STM32_1WIRE1
-#endif
-#if defined(CONFIG_STM32_1WIRE2) && defined(CONFIG_STM32_USART2)
-#  undef CONFIG_STM32_1WIRE2
-#endif
-#if defined(CONFIG_STM32_1WIRE3) && defined(CONFIG_STM32_USART3)
-#  undef CONFIG_STM32_1WIRE3
-#endif
-#if defined(CONFIG_STM32_1WIRE4) && defined(CONFIG_STM32_UART4)
-#  undef CONFIG_STM32_1WIRE4
-#endif
-#if defined(CONFIG_STM32_1WIRE5) && defined(CONFIG_STM32_UART5)
-#  undef CONFIG_STM32_1WIRE5
-#endif
-#if defined(CONFIG_STM32_1WIRE6) && defined(CONFIG_STM32_USART6)
-#  undef CONFIG_STM32_1WIRE6
-#endif
-#if defined(CONFIG_STM32_1WIRE7) && defined(CONFIG_STM32_UART7)
-#  undef CONFIG_STM32_1WIRE7
-#endif
-#if defined(CONFIG_STM32_1WIRE8) && defined(CONFIG_STM32_UART8)
-#  undef CONFIG_STM32_1WIRE8
-#endif
-
-/* Is there a 1-Wire enabled? */
-
-#if defined(CONFIG_STM32_1WIRE1) || defined(CONFIG_STM32_1WIRE2) || \
-    defined(CONFIG_STM32_1WIRE3) || defined(CONFIG_STM32_1WIRE4) || \
-    defined(CONFIG_STM32_1WIRE5) || defined(CONFIG_STM32_1WIRE6) || \
-    defined(CONFIG_STM32_1WIRE7) || defined(CONFIG_STM32_1WIRE8)
-#  define HAVE_1WIRE 1
-#endif
-
 /************************************************************************************
  * Public Types
  ************************************************************************************/

arch/arm/src/stm32/stm32_lowputc.c

@@ -436,7 +436,7 @@ void up_lowputc(char ch)
 
 void stm32_lowsetup(void)
 {
-#if defined(HAVE_UART)
+#if defined(HAVE_SERIALDRIVER)
   uint32_t mapr;
 #if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
   uint32_t cr;
@@ -559,7 +559,7 @@ void stm32_lowsetup(void)
   putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
 
 #endif /* HAVE_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
-#endif /* HAVE_UART */
+#endif /* HAVE_SERIALDRIVER */
 }
 
 #elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
@@ -568,7 +568,7 @@ void stm32_lowsetup(void)
 
 void stm32_lowsetup(void)
 {
-#if defined(HAVE_UART)
+#if defined(HAVE_SERIALDRIVER)
 #if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
   uint32_t cr;
 #endif
@@ -638,7 +638,7 @@ void stm32_lowsetup(void)
   putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
 
 #endif /* HAVE_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
-#endif /* HAVE_UART */
+#endif /* HAVE_SERIALDRIVER */
 }
 
 #else

arch/arm/src/stm32/stm32_serial.c

@@ -272,7 +272,7 @@
 #endif
 
 #ifdef USE_SERIALDRIVER
-#ifdef HAVE_UART
+#ifdef HAVE_SERIALDRIVER
 
 /****************************************************************************
  * Private Types
@@ -386,28 +386,28 @@ static int  up_pm_prepare(struct pm_callback_s *cb, int domain,
                           enum pm_state_e pmstate);
 #endif
 
-#ifdef CONFIG_STM32_USART1
+#ifdef CONFIG_STM32_USART1_SERIALDRIVER
 static int up_interrupt_usart1(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_USART2
+#ifdef CONFIG_STM32_USART2_SERIALDRIVER
 static int up_interrupt_usart2(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_USART3
+#ifdef CONFIG_STM32_USART3_SERIALDRIVER
 static int up_interrupt_usart3(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_SERIALDRIVER
 static int up_interrupt_uart4(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_SERIALDRIVER
 static int up_interrupt_uart5(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_USART6
+#ifdef CONFIG_STM32_USART6_SERIALDRIVER
 static int up_interrupt_usart6(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_SERIALDRIVER
 static int up_interrupt_uart7(int irq, void *context);
 #endif
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_SERIALDRIVER
 static int up_interrupt_uart8(int irq, void *context);
 #endif
 
@@ -459,7 +459,7 @@ static const struct uart_ops_s g_uart_dma_ops =
 
 /* I/O buffers */
 
-#ifdef CONFIG_STM32_USART1
+#ifdef CONFIG_STM32_USART1_SERIALDRIVER
 static char g_usart1rxbuffer[CONFIG_USART1_RXBUFSIZE];
 static char g_usart1txbuffer[CONFIG_USART1_TXBUFSIZE];
 # ifdef CONFIG_USART1_RXDMA
@@ -467,7 +467,7 @@ static char g_usart1rxfifo[RXDMA_BUFFER_SIZE];
 # endif
 #endif
 
-#ifdef CONFIG_STM32_USART2
+#ifdef CONFIG_STM32_USART2_SERIALDRIVER
 static char g_usart2rxbuffer[CONFIG_USART2_RXBUFSIZE];
 static char g_usart2txbuffer[CONFIG_USART2_TXBUFSIZE];
 # ifdef CONFIG_USART2_RXDMA
@@ -475,7 +475,7 @@ static char g_usart2rxfifo[RXDMA_BUFFER_SIZE];
 # endif
 #endif
 
-#ifdef CONFIG_STM32_USART3
+#ifdef CONFIG_STM32_USART3_SERIALDRIVER
 static char g_usart3rxbuffer[CONFIG_USART3_RXBUFSIZE];
 static char g_usart3txbuffer[CONFIG_USART3_TXBUFSIZE];
 # ifdef CONFIG_USART3_RXDMA
@@ -483,7 +483,7 @@ static char g_usart3rxfifo[RXDMA_BUFFER_SIZE];
 # endif
 #endif
 
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_SERIALDRIVER
 static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE];
 static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE];
 # ifdef CONFIG_UART4_RXDMA
@@ -491,7 +491,7 @@ static char g_uart4rxfifo[RXDMA_BUFFER_SIZE];
 # endif
 #endif
 
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_SERIALDRIVER
 static char g_uart5rxbuffer[CONFIG_UART5_RXBUFSIZE];
 static char g_uart5txbuffer[CONFIG_UART5_TXBUFSIZE];
 # ifdef CONFIG_UART5_RXDMA
@@ -499,7 +499,7 @@ static char g_uart5rxfifo[RXDMA_BUFFER_SIZE];
 # endif
 #endif
 
-#ifdef CONFIG_STM32_USART6
+#ifdef CONFIG_STM32_USART6_SERIALDRIVER
 static char g_usart6rxbuffer[CONFIG_USART6_RXBUFSIZE];
 static char g_usart6txbuffer[CONFIG_USART6_TXBUFSIZE];
 # ifdef CONFIG_USART6_RXDMA
@@ -507,7 +507,7 @@ static char g_usart6rxfifo[RXDMA_BUFFER_SIZE];
 # endif
 #endif
 
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_SERIALDRIVER
 static char g_uart7rxbuffer[CONFIG_UART7_RXBUFSIZE];
 static char g_uart7txbuffer[CONFIG_UART7_TXBUFSIZE];
 # ifdef CONFIG_UART7_RXDMA
@@ -515,7 +515,7 @@ static char g_uart7rxfifo[RXDMA_BUFFER_SIZE];
 # endif
 #endif
 
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_SERIALDRIVER
 static char g_uart8rxbuffer[CONFIG_UART8_RXBUFSIZE];
 static char g_uart8txbuffer[CONFIG_UART8_TXBUFSIZE];
 # ifdef CONFIG_UART8_RXDMA
@@ -525,7 +525,7 @@ static char g_uart8rxfifo[RXDMA_BUFFER_SIZE];
 
 /* This describes the state of the STM32 USART1 ports. */
 
-#ifdef CONFIG_STM32_USART1
+#ifdef CONFIG_STM32_USART1_SERIALDRIVER
 static struct up_dev_s g_usart1priv =
 {
   .dev =
@@ -587,7 +587,7 @@ static struct up_dev_s g_usart1priv =
 
 /* This describes the state of the STM32 USART2 port. */
 
-#ifdef CONFIG_STM32_USART2
+#ifdef CONFIG_STM32_USART2_SERIALDRIVER
 static struct up_dev_s g_usart2priv =
 {
   .dev =
@@ -649,7 +649,7 @@ static struct up_dev_s g_usart2priv =
 
 /* This describes the state of the STM32 USART3 port. */
 
-#ifdef CONFIG_STM32_USART3
+#ifdef CONFIG_STM32_USART3_SERIALDRIVER
 static struct up_dev_s g_usart3priv =
 {
   .dev =
@@ -711,7 +711,7 @@ static struct up_dev_s g_usart3priv =
 
 /* This describes the state of the STM32 UART4 port. */
 
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_SERIALDRIVER
 static struct up_dev_s g_uart4priv =
 {
   .dev =
@@ -777,7 +777,7 @@ static struct up_dev_s g_uart4priv =
 
 /* This describes the state of the STM32 UART5 port. */
 
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_SERIALDRIVER
 static struct up_dev_s g_uart5priv =
 {
   .dev =
@@ -843,7 +843,7 @@ static struct up_dev_s g_uart5priv =
 
 /* This describes the state of the STM32 USART6 port. */
 
-#ifdef CONFIG_STM32_USART6
+#ifdef CONFIG_STM32_USART6_SERIALDRIVER
 static struct up_dev_s g_usart6priv =
 {
   .dev =
@@ -905,7 +905,7 @@ static struct up_dev_s g_usart6priv =
 
 /* This describes the state of the STM32 UART7 port. */
 
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_SERIALDRIVER
 static struct up_dev_s g_uart7priv =
 {
   .dev =
@@ -940,11 +940,11 @@ static struct up_dev_s g_uart7priv =
   .usartbase      = STM32_UART7_BASE,
   .tx_gpio        = GPIO_UART7_TX,
   .rx_gpio        = GPIO_UART7_RX,
-#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_USART7_OFLOWCONTROL)
+#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART7_OFLOWCONTROL)
   .oflow          = true,
   .cts_gpio       = GPIO_UART7_CTS,
 #endif
-#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_USART7_IFLOWCONTROL)
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART7_IFLOWCONTROL)
   .iflow          = true,
   .rts_gpio       = GPIO_UART7_RTS,
 #endif
@@ -967,7 +967,7 @@ static struct up_dev_s g_uart7priv =
 
 /* This describes the state of the STM32 UART8 port. */
 
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_SERIALDRIVER
 static struct up_dev_s g_uart8priv =
 {
   .dev =
@@ -1002,11 +1002,11 @@ static struct up_dev_s g_uart8priv =
   .usartbase      = STM32_UART8_BASE,
   .tx_gpio        = GPIO_UART8_TX,
   .rx_gpio        = GPIO_UART8_RX,
-#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_USART8_OFLOWCONTROL)
+#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART8_OFLOWCONTROL)
   .oflow          = true,
   .cts_gpio       = GPIO_UART8_CTS,
 #endif
-#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_USART8_IFLOWCONTROL)
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART8_IFLOWCONTROL)
   .iflow          = true,
   .rts_gpio       = GPIO_UART8_RTS,
 #endif
@@ -1031,28 +1031,28 @@ static struct up_dev_s g_uart8priv =
 
 static struct up_dev_s * const uart_devs[STM32_NUSART] =
 {
-#ifdef CONFIG_STM32_USART1
+#ifdef CONFIG_STM32_USART1_SERIALDRIVER
   [0] = &g_usart1priv,
 #endif
-#ifdef CONFIG_STM32_USART2
+#ifdef CONFIG_STM32_USART2_SERIALDRIVER
   [1] = &g_usart2priv,
 #endif
-#ifdef CONFIG_STM32_USART3
+#ifdef CONFIG_STM32_USART3_SERIALDRIVER
   [2] = &g_usart3priv,
 #endif
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_SERIALDRIVER
   [3] = &g_uart4priv,
 #endif
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_SERIALDRIVER
   [4] = &g_uart5priv,
 #endif
-#ifdef CONFIG_STM32_USART6
+#ifdef CONFIG_STM32_USART6_SERIALDRIVER
   [5] = &g_usart6priv,
 #endif
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_SERIALDRIVER
   [6] = &g_uart7priv,
 #endif
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_SERIALDRIVER
   [7] = &g_uart8priv,
 #endif
 };
@@ -1376,49 +1376,49 @@ static void up_set_apb_clock(struct uart_dev_s *dev, bool on)
     {
     default:
       return;
-#ifdef CONFIG_STM32_USART1
+#ifdef CONFIG_STM32_USART1_SERIALDRIVER
     case STM32_USART1_BASE:
       rcc_en = RCC_APB2ENR_USART1EN;
       regaddr = STM32_RCC_APB2ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_USART2
+#ifdef CONFIG_STM32_USART2_SERIALDRIVER
     case STM32_USART2_BASE:
       rcc_en = RCC_APB1ENR_USART2EN;
       regaddr = STM32_RCC_APB1ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_USART3
+#ifdef CONFIG_STM32_USART3_SERIALDRIVER
     case STM32_USART3_BASE:
       rcc_en = RCC_APB1ENR_USART3EN;
       regaddr = STM32_RCC_APB1ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_SERIALDRIVER
     case STM32_UART4_BASE:
       rcc_en = RCC_APB1ENR_UART4EN;
       regaddr = STM32_RCC_APB1ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_SERIALDRIVER
     case STM32_UART5_BASE:
       rcc_en = RCC_APB1ENR_UART5EN;
       regaddr = STM32_RCC_APB1ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_USART6
+#ifdef CONFIG_STM32_USART6_SERIALDRIVER
     case STM32_USART6_BASE:
       rcc_en = RCC_APB2ENR_USART6EN;
       regaddr = STM32_RCC_APB2ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_SERIALDRIVER
     case STM32_UART7_BASE:
       rcc_en = RCC_APB1ENR_UART7EN;
       regaddr = STM32_RCC_APB1ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_SERIALDRIVER
     case STM32_UART8_BASE:
       rcc_en = RCC_APB1ENR_UART8EN;
       regaddr = STM32_RCC_APB1ENR;
@@ -2579,56 +2579,56 @@ static bool up_txready(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_STM32_USART1
+#ifdef CONFIG_STM32_USART1_SERIALDRIVER
 static int up_interrupt_usart1(int irq, void *context)
 {
   return up_interrupt_common(&g_usart1priv);
 }
 #endif
 
-#ifdef CONFIG_STM32_USART2
+#ifdef CONFIG_STM32_USART2_SERIALDRIVER
 static int up_interrupt_usart2(int irq, void *context)
 {
   return up_interrupt_common(&g_usart2priv);
 }
 #endif
 
-#ifdef CONFIG_STM32_USART3
+#ifdef CONFIG_STM32_USART3_SERIALDRIVER
 static int up_interrupt_usart3(int irq, void *context)
 {
   return up_interrupt_common(&g_usart3priv);
 }
 #endif
 
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_SERIALDRIVER
 static int up_interrupt_uart4(int irq, void *context)
 {
   return up_interrupt_common(&g_uart4priv);
 }
 #endif
 
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_SERIALDRIVER
 static int up_interrupt_uart5(int irq, void *context)
 {
   return up_interrupt_common(&g_uart5priv);
 }
 #endif
 
-#ifdef CONFIG_STM32_USART6
+#ifdef CONFIG_STM32_USART6_SERIALDRIVER
 static int up_interrupt_usart6(int irq, void *context)
 {
   return up_interrupt_common(&g_usart6priv);
 }
 #endif
 
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_SERIALDRIVER
 static int up_interrupt_uart7(int irq, void *context)
 {
   return up_interrupt_common(&g_uart7priv);
 }
 #endif
 
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_SERIALDRIVER
 static int up_interrupt_uart8(int irq, void *context)
 {
   return up_interrupt_common(&g_uart8priv);
@@ -2771,7 +2771,7 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain,
   return OK;
 }
 #endif
-#endif /* HAVE_UART */
+#endif /* HAVE_SERIALDRIVER */
 #endif /* USE_SERIALDRIVER */
 
 /****************************************************************************
@@ -2793,7 +2793,7 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain,
 #ifdef USE_EARLYSERIALINIT
 void up_earlyserialinit(void)
 {
-#ifdef HAVE_UART
+#ifdef HAVE_SERIALDRIVER
   unsigned i;
 
   /* Disable all USART interrupts */
@@ -2826,7 +2826,7 @@ void up_earlyserialinit(void)
 
 void up_serialinit(void)
 {
-#ifdef HAVE_UART
+#ifdef HAVE_SERIALDRIVER
   char devname[16];
   unsigned i;
   unsigned minor = 0;

arch/arm/src/stm32/stm32_uart.h

@@ -90,18 +90,97 @@
 #  undef CONFIG_STM32_USART1
 #endif
 
-/* Is there a USART enabled? */
+/* Sanity checks */
 
-#if defined(CONFIG_STM32_USART1) || defined(CONFIG_STM32_USART2) || \
+#if !defined(CONFIG_STM32_USART1)
-    defined(CONFIG_STM32_USART3) || defined(CONFIG_STM32_UART4)  || \
+#  undef CONFIG_STM32_USART1_SERIALDRIVER
-    defined(CONFIG_STM32_UART5)  || defined(CONFIG_STM32_USART6) || \
+#  undef CONFIG_STM32_USART1_1WIREDRIVER
-    defined(CONFIG_STM32_UART7)  || defined(CONFIG_STM32_UART8)
+#endif
-#  define HAVE_UART 1
+#if !defined(CONFIG_STM32_USART2)
+#  undef CONFIG_STM32_USART2_SERIALDRIVER
+#  undef CONFIG_STM32_USART2_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_USART3)
+#  undef CONFIG_STM32_USART3_SERIALDRIVER
+#  undef CONFIG_STM32_USART3_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_UART4)
+#  undef CONFIG_STM32_UART4_SERIALDRIVER
+#  undef CONFIG_STM32_UART4_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_UART5)
+#  undef CONFIG_STM32_UART5_SERIALDRIVER
+#  undef CONFIG_STM32_UART5_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_USART6)
+#  undef CONFIG_STM32_USART6_SERIALDRIVER
+#  undef CONFIG_STM32_USART6_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_UART7)
+#  undef CONFIG_STM32_UART7_SERIALDRIVER
+#  undef CONFIG_STM32_UART7_1WIREDRIVER
+#endif
+#if !defined(CONFIG_STM32_UART8)
+#  undef CONFIG_STM32_UART8_SERIALDRIVER
+#  undef CONFIG_STM32_UART8_1WIREDRIVER
+#endif
+
+/* Check 1-Wire and U(S)ART conflicts */
+
+#if defined(CONFIG_STM32_USART1_1WIREDRIVER) && defined(CONFIG_STM32_USART1_SERIALDRIVER)
+#  error Both CONFIG_STM32_USART1_1WIREDRIVER and CONFIG_STM32_USART1_SERIALDRIVER defined
+#  undef CONFIG_STM32_USART1_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_USART2_1WIREDRIVER) && defined(CONFIG_STM32_USART2_SERIALDRIVER)
+#  error Both CONFIG_STM32_USART2_1WIREDRIVER and CONFIG_STM32_USART2_SERIALDRIVER defined
+#  undef CONFIG_STM32_USART2_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_USART3_1WIREDRIVER) && defined(CONFIG_STM32_USART3_SERIALDRIVER)
+#  error Both CONFIG_STM32_USART3_1WIREDRIVER and CONFIG_STM32_USART3_SERIALDRIVER defined
+#  undef CONFIG_STM32_USART3_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_UART4_1WIREDRIVER) && defined(CONFIG_STM32_UART4_SERIALDRIVER)
+#  error Both CONFIG_STM32_UART4_1WIREDRIVER and CONFIG_STM32_UART4_SERIALDRIVER defined
+#  undef CONFIG_STM32_UART4_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_UART5_1WIREDRIVER) && defined(CONFIG_STM32_UART5_SERIALDRIVER)
+#  error Both CONFIG_STM32_UART5_1WIREDRIVER and CONFIG_STM32_UART5_SERIALDRIVER defined
+#  undef CONFIG_STM32_UART5_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_USART6_1WIREDRIVER) && defined(CONFIG_STM32_USART6_SERIALDRIVER)
+#  error Both CONFIG_STM32_USART6_1WIREDRIVER and CONFIG_STM32_USART6_SERIALDRIVER defined
+#  undef CONFIG_STM32_USART6_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_UART7_1WIREDRIVER) && defined(CONFIG_STM32_UART7_SERIALDRIVER)
+#  error Both CONFIG_STM32_UART7_1WIREDRIVER and CONFIG_STM32_UART7_SERIALDRIVER defined
+#  undef CONFIG_STM32_UART7_1WIREDRIVER
+#endif
+#if defined(CONFIG_STM32_UART8_1WIREDRIVER) && defined(CONFIG_STM32_UART8_SERIALDRIVER)
+#  error Both CONFIG_STM32_UART8_1WIREDRIVER and CONFIG_STM32_UART8_SERIALDRIVER defined
+#  undef CONFIG_STM32_UART8_1WIREDRIVER
+#endif
+
+/* Is the serial driver enabled? */
+
+#if defined(CONFIG_STM32_USART1_SERIALDRIVER) || defined(CONFIG_STM32_USART2_SERIALDRIVER) || \
+    defined(CONFIG_STM32_USART3_SERIALDRIVER) || defined(CONFIG_STM32_UART4_SERIALDRIVER)  || \
+    defined(CONFIG_STM32_UART5_SERIALDRIVER)  || defined(CONFIG_STM32_USART6_SERIALDRIVER) || \
+    defined(CONFIG_STM32_UART7_SERIALDRIVER)  || defined(CONFIG_STM32_UART8_SERIALDRIVER)
+#  define HAVE_SERIALDRIVER 1
+#endif
+
+/* Is the 1-Wire driver? */
+
+#if defined(CONFIG_STM32_USART1_1WIREDRIVER) || defined(CONFIG_STM32_USART2_1WIREDRIVER) || \
+    defined(CONFIG_STM32_USART3_1WIREDRIVER) || defined(CONFIG_STM32_UART4_1WIREDRIVER) || \
+    defined(CONFIG_STM32_UART5_1WIREDRIVER) || defined(CONFIG_STM32_USART6_1WIREDRIVER) || \
+    defined(CONFIG_STM32_UART7_1WIREDRIVER) || defined(CONFIG_STM32_UART8_1WIREDRIVER)
+#  define HAVE_1WIREDRIVER 1
 #endif
 
 /* Is there a serial console? */
 
-#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART1)
+#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART1_SERIALDRIVER)
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  undef CONFIG_USART3_SERIAL_CONSOLE
 #  undef CONFIG_UART4_SERIAL_CONSOLE
@@ -111,7 +190,7 @@
 #  undef CONFIG_UART8_SERIAL_CONSOLE
 #  define CONSOLE_UART 1
 #  define HAVE_CONSOLE 1
-#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART2)
+#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART2_SERIALDRIVER)
 #  undef CONFIG_USART1_SERIAL_CONSOLE
 #  undef CONFIG_USART3_SERIAL_CONSOLE
 #  undef CONFIG_UART4_SERIAL_CONSOLE
@@ -121,7 +200,7 @@
 #  undef CONFIG_UART8_SERIAL_CONSOLE
 #  define CONSOLE_UART 2
 #  define HAVE_CONSOLE 1
-#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART3)
+#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART3_SERIALDRIVER)
 #  undef CONFIG_USART1_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  undef CONFIG_UART4_SERIAL_CONSOLE
@@ -131,7 +210,7 @@
 #  undef CONFIG_UART8_SERIAL_CONSOLE
 #  define CONSOLE_UART 3
 #  define HAVE_CONSOLE 1
-#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART4)
+#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART4_SERIALDRIVER)
 #  undef CONFIG_USART1_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  undef CONFIG_USART3_SERIAL_CONSOLE
@@ -141,7 +220,7 @@
 #  undef CONFIG_UART8_SERIAL_CONSOLE
 #  define CONSOLE_UART 4
 #  define HAVE_CONSOLE 1
-#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART5)
+#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART5_SERIALDRIVER)
 #  undef CONFIG_USART1_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  undef CONFIG_USART3_SERIAL_CONSOLE
@@ -151,7 +230,7 @@
 #  undef CONFIG_UART8_SERIAL_CONSOLE
 #  define CONSOLE_UART 5
 #  define HAVE_CONSOLE 1
-#elif defined(CONFIG_USART6_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART6)
+#elif defined(CONFIG_USART6_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART6_SERIALDRIVER)
 #  undef CONFIG_USART1_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  undef CONFIG_USART3_SERIAL_CONSOLE
@@ -161,7 +240,7 @@
 #  undef CONFIG_UART8_SERIAL_CONSOLE
 #  define CONSOLE_UART 6
 #  define HAVE_CONSOLE 1
-#elif defined(CONFIG_UART7_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART7)
+#elif defined(CONFIG_UART7_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART7_SERIALDRIVER)
 #  undef CONFIG_USART1_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  undef CONFIG_USART3_SERIAL_CONSOLE
@@ -172,7 +251,7 @@
 #  undef CONFIG_UART8_SERIAL_CONSOLE
 #  define CONSOLE_UART 7
 #  define HAVE_CONSOLE 1
-#elif defined(CONFIG_UART8_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART8)
+#elif defined(CONFIG_UART8_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART8_SERIALDRIVER)
 #  undef CONFIG_USART1_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  undef CONFIG_USART3_SERIAL_CONSOLE
@@ -197,7 +276,7 @@
 
 /* DMA support is only provided if CONFIG_ARCH_DMA is in the NuttX configuration */
 
-#if !defined(HAVE_UART) || !defined(CONFIG_ARCH_DMA)
+#if !defined(HAVE_SERIALDRIVER) || !defined(CONFIG_ARCH_DMA)
 #  undef CONFIG_USART1_RXDMA
 #  undef CONFIG_USART2_RXDMA
 #  undef CONFIG_USART3_RXDMA
@@ -210,35 +289,35 @@
 
 /* Disable the DMA configuration on all unused USARTs */
 
-#ifndef CONFIG_STM32_USART1
+#ifndef CONFIG_STM32_USART1_SERIALDRIVER
 #  undef CONFIG_USART1_RXDMA
 #endif
 
-#ifndef CONFIG_STM32_USART2
+#ifndef CONFIG_STM32_USART2_SERIALDRIVER
 #  undef CONFIG_USART2_RXDMA
 #endif
 
-#ifndef CONFIG_STM32_USART3
+#ifndef CONFIG_STM32_USART3_SERIALDRIVER
 #  undef CONFIG_USART3_RXDMA
 #endif
 
-#ifndef CONFIG_STM32_UART4
+#ifndef CONFIG_STM32_UART4_SERIALDRIVER
 #  undef CONFIG_UART4_RXDMA
 #endif
 
-#ifndef CONFIG_STM32_UART5
+#ifndef CONFIG_STM32_UART5_SERIALDRIVER
 #  undef CONFIG_UART5_RXDMA
 #endif
 
-#ifndef CONFIG_STM32_USART6
+#ifndef CONFIG_STM32_USART6_SERIALDRIVER
 #  undef CONFIG_USART6_RXDMA
 #endif
 
-#ifndef CONFIG_STM32_UART7
+#ifndef CONFIG_STM32_UART7_SERIALDRIVER
 #  undef CONFIG_UART7_RXDMA
 #endif
 
-#ifndef CONFIG_STM32_UART8
+#ifndef CONFIG_STM32_UART8_SERIALDRIVER
 #  undef CONFIG_UART8_RXDMA
 #endif
 
@@ -276,21 +355,21 @@
 /* Is DMA used on all (enabled) USARTs */
 
 #define SERIAL_HAVE_ONLY_DMA 1
-#if defined(CONFIG_STM32_USART1) && !defined(CONFIG_USART1_RXDMA)
+#if defined(CONFIG_STM32_USART1_SERIALDRIVER) && !defined(CONFIG_USART1_RXDMA)
 #  undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_USART2) && !defined(CONFIG_USART2_RXDMA)
+#elif defined(CONFIG_STM32_USART2_SERIALDRIVER) && !defined(CONFIG_USART2_RXDMA)
 #  undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_USART3) && !defined(CONFIG_USART3_RXDMA)
+#elif defined(CONFIG_STM32_USART3_SERIALDRIVER) && !defined(CONFIG_USART3_RXDMA)
 #  undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_UART4) && !defined(CONFIG_UART4_RXDMA)
+#elif defined(CONFIG_STM32_UART4_SERIALDRIVER) && !defined(CONFIG_UART4_RXDMA)
 #  undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_UART5) && !defined(CONFIG_UART5_RXDMA)
+#elif defined(CONFIG_STM32_UART5_SERIALDRIVER) && !defined(CONFIG_UART5_RXDMA)
 #  undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_USART6) && !defined(CONFIG_USART6_RXDMA)
+#elif defined(CONFIG_STM32_USART6_SERIALDRIVER) && !defined(CONFIG_USART6_RXDMA)
 #  undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_UART7) && !defined(CONFIG_UART7_RXDMA)
+#elif defined(CONFIG_STM32_UART7_SERIALDRIVER) && !defined(CONFIG_UART7_RXDMA)
 #  undef SERIAL_HAVE_ONLY_DMA
-#elif defined(CONFIG_STM32_UART8) && !defined(CONFIG_UART8_RXDMA)
+#elif defined(CONFIG_STM32_UART8_SERIALDRIVER) && !defined(CONFIG_UART8_RXDMA)
 #  undef SERIAL_HAVE_ONLY_DMA
 #endif