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arm/riscv: remove redundant judgment

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Signed-off-by: hujun5 <hujun5@xiaomi.com>
This commit is contained in:
hujun5
2024-10-15 09:35:41 +08:00
committed by GUIDINGLI
parent aa0346610b
commit 49b9aa0f33
4 changed files with 26 additions and 48 deletions
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arch/arm/src/armv6-m/arm_svcall.c
+5 -12
View File
@@ -446,13 +446,11 @@ int arm_svcall(int irq, void *context, void *arg)
* switch.
*/
#ifdef CONFIG_DEBUG_SYSCALL_INFO
# ifndef CONFIG_DEBUG_SVCALL
if (cmd > SYS_switch_context)
# else
if (regs != tcb->xcp.regs)
# endif
{
restore_critical_section(tcb, this_cpu());
#ifdef CONFIG_DEBUG_SYSCALL_INFO
regs = (uint32_t *)tcb->xcp.regs;
svcinfo("SVCall Return:\n");
@@ -464,19 +462,14 @@ int arm_svcall(int irq, void *context, void *arg)
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcinfo(" PSR: %08x EXC_RETURN: %08x CONTROL: %08x\n",
regs[REG_XPSR], regs[REG_EXC_RETURN], regs[REG_CONTROL]);
#endif
}
# ifdef CONFIG_DEBUG_SVCALL
#ifdef CONFIG_DEBUG_SYSCALL_INFO
else
{
svcinfo("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif
if (regs != tcb->xcp.regs)
{
restore_critical_section(this_task(), this_cpu());
}
return OK;
}
arch/arm/src/armv7-m/arm_svcall.c
+5 -12
View File
@@ -456,13 +456,11 @@ int arm_svcall(int irq, void *context, void *arg)
* switch.
*/
#ifdef CONFIG_DEBUG_SYSCALL_INFO
# ifndef CONFIG_DEBUG_SVCALL
if (cmd > SYS_switch_context)
# else
if (regs != tcb->xcp.regs)
# endif
{
restore_critical_section(tcb, this_cpu());
#ifdef CONFIG_DEBUG_SYSCALL_INFO
regs = (uint32_t *)tcb->xcp.regs;
svcinfo("SVCall Return:\n");
@@ -474,19 +472,14 @@ int arm_svcall(int irq, void *context, void *arg)
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcinfo(" PSR: %08x EXC_RETURN: %08x CONTROL: %08x\n",
regs[REG_XPSR], regs[REG_EXC_RETURN], regs[REG_CONTROL]);
#endif
}
# ifdef CONFIG_DEBUG_SVCALL
#ifdef CONFIG_DEBUG_SYSCALL_INFO
else
{
svcinfo("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif
if (regs != tcb->xcp.regs)
{
restore_critical_section(this_task(), this_cpu());
}
return OK;
}
arch/arm/src/armv8-m/arm_svcall.c
+5 -12
View File
@@ -456,13 +456,11 @@ int arm_svcall(int irq, void *context, void *arg)
* switch.
*/
#ifdef CONFIG_DEBUG_SYSCALL_INFO
# ifndef CONFIG_DEBUG_SVCALL
if (cmd > SYS_switch_context)
# else
if (regs != tcb->xcp.regs)
# endif
{
restore_critical_section(tcb, this_cpu());
#ifdef CONFIG_DEBUG_SYSCALL_INFO
regs = (uint32_t *)tcb->xcp.regs;
svcinfo("SVCall Return:\n");
@@ -474,19 +472,14 @@ int arm_svcall(int irq, void *context, void *arg)
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcinfo(" PSR: %08x EXC_RETURN: %08x CONTROL: %08x\n",
regs[REG_XPSR], regs[REG_EXC_RETURN], regs[REG_CONTROL]);
#endif
}
# ifdef CONFIG_DEBUG_SVCALL
#ifdef CONFIG_DEBUG_SYSCALL_INFO
else
{
svcinfo("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif
if (regs != tcb->xcp.regs)
{
restore_critical_section(this_task(), this_cpu());
}
return OK;
}
arch/risc-v/src/common/riscv_swint.c
+11 -12
View File
@@ -342,21 +342,20 @@ int riscv_swint(int irq, void *context, void *arg)
* switch
*/
#ifdef CONFIG_DEBUG_SYSCALL_INFO
if (regs != new_regs)
{
svcinfo("SWInt Return: Context switch!\n");
up_dump_register(new_regs);
}
else
{
svcinfo("SWInt Return: %" PRIxPTR "\n", regs[REG_A0]);
}
#endif
if (regs != new_regs)
{
restore_critical_section(this_task(), this_cpu());
#ifdef CONFIG_DEBUG_SYSCALL_INFO
svcinfo("SWInt Return: Context switch!\n");
up_dump_register(new_regs);
#endif
}
else
{
#ifdef CONFIG_DEBUG_SYSCALL_INFO
svcinfo("SWInt Return: %" PRIxPTR "\n", regs[REG_A0]);
#endif
}
return OK;