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Add UG-9665SWAG01 driver

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3520 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2011-04-17 23:48:01 +00:00
parent 4597ac48b6
commit 486208f907
7 changed files with 773 additions and 9 deletions
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configs/lpcxpresso-lpc1768/src/lpcxpresso_internal.h
+1 -1
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@@ -199,7 +199,7 @@
* ----------------------------+-------+-------------- -----------------------------
*/
#define LPCXPRESSO_OLED_POWER (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN1)
#define LPCXPRESSO_OLED_POWER (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN1)
#define LPCXPRESSO_OLED_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN6)
#define LPCXPRESSO_OLED_DC (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN7)
configs/lpcxpresso-lpc1768/src/up_oled.c
+2 -1
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@@ -140,6 +140,7 @@ FAR struct lcd_dev_s *up_nxdrvinit(unsigned int devno)
/* And turn the OLED on (CONFIG_LCD_MAXPOWER should be 1) */
(void)lpc17_gpiowrite(LPCXPRESSO_OLED_POWER, true);
(void)dev->setpower(dev, CONFIG_LCD_MAXPOWER);
return dev;
}
@@ -176,7 +177,7 @@ int lm3s_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
{
/* Set GPIO to 1 for data, 0 for command */
lm3s_gpiowrite(OLEDDC_GPIO, !cmd);
(void)lpc17_gpiowrite(LPCXPRESSO_OLED_DC, !cmd);
return OK;
}
return -ENODEV;
drivers/lcd/Make.defs
+4
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@@ -48,5 +48,9 @@ ifeq ($(CONFIG_LCD_NOKIA6100),y)
LCD_CSRCS = nokia6100.c
endif
ifeq ($(CONFIG_LCD_UG9664HSWAG0),y)
LCD_CSRCS = ug-9664hswag0.c
endif
endif
drivers/lcd/skeleton.c
+1 -1
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@@ -1,7 +1,7 @@
/**************************************************************************************
* drivers/lcd/skeleton.c
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
drivers/lcd/ssd1305.h
+3 -2
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@@ -134,7 +134,7 @@
# define SSD1305_MSTRCONFIG_EXTVCC 0x8e /* Data 1: Select external Vcc */
#define SSD1305_DISPONDIM 0xac /* 0xac: Display ON in dim mode */
#define SSD1305_DISPOFF 0xae /* 0xae: Display OFF (sleep mode) */
#define SSD1305_DISPPN 0xaf /* 0xaf: Display ON in normal mode*/
#define SSD1305_DISPON 0xaf /* 0xaf: Display ON in normal mode */
#define SSD1305_SETPAGESTART 0xb0 /* 0xb0-b7: Set page start address */
# define SSD1305_PAGESTART_MASK 0x07
#define SSD1305_SETCOMNORMAL 0xc0 /* 0xc0: Set COM output, normal mode */
@@ -146,6 +146,7 @@
# define SSD1305_DCLKDIV_SHIFT (0) /* Data 1, Bits 0-3: DCLK divide ratio/frequency*/
# define SSD1305_DCLKDIV_MASK 0x0f
# define SSD1305_DCLKFREQ_SHIFT (4) /* Data 1, Bits 4-7: DCLK divide oscillator frequency */
# define SSD1305_DCLKFREQ_MASK 0xf0
#define SSD1305_SETCOLORMODE 0xd8 /* 0xd: Set area color and low power display modes */
# define SSD1305_COLORMODE_MONO 0x00 /* Data 1, Bits 4-5: 00=monochrome */
# define SSD1305_COLORMODE_COLOR 0x30 /* Data 1, Bits 4-5: 11=area color enable */
@@ -155,7 +156,7 @@
# define SSD1305_PHASE1_SHIFT (0) /* Data 1, Bits 0-3: Phase 1 period of up to 15 DCLK clocks */
# define SSD1305_PHASE1_MASK 0x0f
# define SSD1305_PHASE2_SHIFT (4) /* Data 1, Bits 4-7: Phase 2 period of up to 15 DCLK clocks */
# define SSD1305_PHASE2_MASK 0x0f
# define SSD1305_PHASE2_MASK 0xf0
#define SSD1305_SETCOMCONFIG 0xda /* 0xda: Set COM configuration */
# define SSD1305_COMCONFIG_SEQ 0x02 /* Data 1, Bit 4: 0=Sequential COM pin configuration */
# define SSD1305_COMCONFIG_ALT 0x12 /* Data 1, Bit 4: 1=Alternative COM pin configuration */
drivers/lcd/ug-9664hswag01.c
Executable
+757
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File diff suppressed because it is too large Load Diff
include/nuttx/fb.h
+5 -4
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@@ -53,9 +53,10 @@
/* Monochrome Formats *******************************************************/
#define FB_FMT_Y4 0 /* BPP=4, 4-bit uncompressed greyscale */
#define FB_FMT_Y8 1 /* BPP=8, 8-bit uncompressed greyscale */
#define FB_FMT_Y16 2 /* BPP=16, 16-bit uncompressed greyscale */
#define FB_FMT_Y1 0 /* BPP=4, monochrome */
#define FB_FMT_Y4 1 /* BPP=4, 4-bit uncompressed greyscale */
#define FB_FMT_Y8 2 /* BPP=8, 8-bit uncompressed greyscale */
#define FB_FMT_Y16 3 /* BPP=16, 16-bit uncompressed greyscale */
#define FB_FMT_GREY FB_FMT_Y8 /* BPP=8 */
#define FB_FMT_Y800 FB_FMT_Y8 /* BPP=8 */
@@ -65,7 +66,7 @@
/* Standard RGB */
#define FB_FMT_RGB1 3 /* BPP=1 */
#define FB_FMT_RGB1 FB_FMT_Y1 /* BPP=1 */
#define FB_FMT_RGB4 4 /* BPP=4 */
#define FB_FMT_RGB8 5 /* BPP=8 RGB palette index */
#define FB_FMT_RGB8_332 6 /* BPP=8 R=3, G=3, B=2 */