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EFM32 USB: A few more naming conversions... still a long way to go
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@@ -2010,6 +2010,11 @@
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#define _USB_DSTS_SOFFN_MASK 0x3FFF00UL /* Bit mask for USB_SOFFN */
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#define _USB_DSTS_SOFFN_DEFAULT 0x00000000UL /* Mode DEFAULT for USB_DSTS */
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#define USB_DSTS_SOFFN_DEFAULT (_USB_DSTS_SOFFN_DEFAULT << 8) /* Shifted mode DEFAULT for USB_DSTS */
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#define _USB_DSTS_SOFFN_EVENODD_MASK 0x000100UL /* Bit mask for USB_SOFFN even/odd bit*/
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#define _USB_DSTS_SOFFN_EVEN 0 /* Frame number even */
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#define _USB_DSTS_SOFFN_ODD 1 /* Frame number odd */
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#define USB_DSTS_SOFFN_EVEN (_USB_DSTS_SOFFN_EVEN << 8) /* Frame number even */
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#define USB_DSTS_SOFFN_ODD (_USB_DSTS_SOFFN_ODD << 8) /* Frame number odd */
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/* Bit fields for USB DIEPMSK */
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File diff suppressed because it is too large
Load Diff
@@ -809,7 +809,7 @@ static void efm32_chan_configure(FAR struct efm32_usbhost_s *priv, int chidx)
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/* Make sure host channel interrupts are enabled. */
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efm32_modifyreg(EFM32_USB_GINTMSK, 0, USB_GINT_HC);
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efm32_modifyreg(EFM32_USB_GINTMSK, 0, USB_GINTMSK_HC);
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/* Program the HCCHAR register */
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@@ -2301,7 +2301,7 @@ static inline void efm32_gint_sofisr(FAR struct efm32_usbhost_s *priv)
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/* Clear pending SOF interrupt */
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efm32_putreg(EFM32_USB_GINTSTS, USB_GINT_SOF);
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efm32_putreg(EFM32_USB_GINTSTS, USB_GINTSTS_SOF);
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}
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#endif
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@@ -2329,7 +2329,7 @@ static inline void efm32_gint_rxflvlisr(FAR struct efm32_usbhost_s *priv)
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/* Disable the RxFIFO non-empty interrupt */
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intmsk = efm32_getreg(EFM32_USB_GINTMSK);
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intmsk &= ~USB_GINT_RXFLVL;
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intmsk &= ~USB_GINTMSK_RXFLVL;
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efm32_putreg(EFM32_USB_GINTMSK, intmsk);
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/* Read and pop the next status from the Rx FIFO */
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@@ -2402,7 +2402,7 @@ static inline void efm32_gint_rxflvlisr(FAR struct efm32_usbhost_s *priv)
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/* Re-enable the RxFIFO non-empty interrupt */
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intmsk |= USB_GINT_RXFLVL;
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intmsk |= USB_GINTMSK_RXFLVL;
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efm32_putreg(EFM32_USB_GINTMSK, intmsk);
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}
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@@ -2446,7 +2446,7 @@ static inline void efm32_gint_nptxfeisr(FAR struct efm32_usbhost_s *priv)
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{
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/* Disable further Tx FIFO empty interrupts and bail. */
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efm32_modifyreg(EFM32_USB_GINTMSK, USB_GINT_NPTXFE, 0);
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efm32_modifyreg(EFM32_USB_GINTMSK, USB_GINTMSK_NPTXFE, 0);
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return;
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}
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@@ -2484,7 +2484,7 @@ static inline void efm32_gint_nptxfeisr(FAR struct efm32_usbhost_s *priv)
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else
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{
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efm32_modifyreg(EFM32_USB_GINTMSK, USB_GINT_NPTXFE, 0);
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efm32_modifyreg(EFM32_USB_GINTMSK, USB_GINTMSK_NPTXFE, 0);
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}
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/* Write the next group of packets into the Tx FIFO */
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@@ -2535,7 +2535,7 @@ static inline void efm32_gint_ptxfeisr(FAR struct efm32_usbhost_s *priv)
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{
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/* Disable further Tx FIFO empty interrupts and bail. */
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efm32_modifyreg(EFM32_USB_GINTMSK, USB_GINT_PTXFE, 0);
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efm32_modifyreg(EFM32_USB_GINTMSK, USB_GINTMSK_PTXFE, 0);
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return;
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}
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@@ -2573,7 +2573,7 @@ static inline void efm32_gint_ptxfeisr(FAR struct efm32_usbhost_s *priv)
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else
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{
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efm32_modifyreg(EFM32_USB_GINTMSK, USB_GINT_PTXFE, 0);
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efm32_modifyreg(EFM32_USB_GINTMSK, USB_GINTMSK_PTXFE, 0);
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}
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/* Write the next group of packets into the Tx FIFO */
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@@ -2647,6 +2647,7 @@ static inline void efm32_gint_hprtisr(FAR struct efm32_usbhost_s *priv)
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uint32_t hcfg;
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usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT, 0);
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/* Read the port status and control register (HPRT) */
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hprt = efm32_getreg(EFM32_USB_HPRT);
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@@ -2781,7 +2782,7 @@ static inline void efm32_gint_discisr(FAR struct efm32_usbhost_s *priv)
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/* Clear the dicsonnect interrupt */
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efm32_putreg(EFM32_USB_GINTSTS, USB_GINT_DISC);
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efm32_putreg(EFM32_USB_GINTSTS, USB_GINTSTS_DISC);
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}
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/*******************************************************************************
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@@ -2806,7 +2807,7 @@ static inline void efm32_gint_ipxfrisr(FAR struct efm32_usbhost_s *priv)
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/* Clear the incomplete isochronous OUT interrupt */
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efm32_putreg(EFM32_USB_GINTSTS, USB_GINT_IPXFR);
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efm32_putreg(EFM32_USB_GINTSTS, USB_GINTSTS_IPXFR);
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}
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/*******************************************************************************
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@@ -2859,7 +2860,7 @@ static int efm32_gint_isr(int irq, FAR void *context)
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/* Handle the start of frame interrupt */
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#ifdef CONFIG_EFM32_OTGFS_SOFINTR
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if ((pending & USB_GINT_SOF) != 0)
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if ((pending & USB_GINTSTS_SOF) != 0)
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{
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usbhost_vtrace1(OTGFS_VTRACE1_GINT_SOF, 0);
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efm32_gint_sofisr(priv);
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@@ -2868,7 +2869,7 @@ static int efm32_gint_isr(int irq, FAR void *context)
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/* Handle the RxFIFO non-empty interrupt */
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if ((pending & USB_GINT_RXFLVL) != 0)
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if ((pending & USB_GINTSTS_RXFLVL) != 0)
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{
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usbhost_vtrace1(OTGFS_VTRACE1_GINT_RXFLVL, 0);
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efm32_gint_rxflvlisr(priv);
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@@ -2876,7 +2877,7 @@ static int efm32_gint_isr(int irq, FAR void *context)
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/* Handle the non-periodic TxFIFO empty interrupt */
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if ((pending & USB_GINT_NPTXFE) != 0)
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if ((pending & USB_GINTSTS_NPTXFE) != 0)
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{
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usbhost_vtrace1(OTGFS_VTRACE1_GINT_NPTXFE, 0);
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efm32_gint_nptxfeisr(priv);
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@@ -2884,7 +2885,7 @@ static int efm32_gint_isr(int irq, FAR void *context)
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/* Handle the periodic TxFIFO empty interrupt */
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if ((pending & USB_GINT_PTXFE) != 0)
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if ((pending & USB_GINTSTS_PTXFE) != 0)
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{
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usbhost_vtrace1(OTGFS_VTRACE1_GINT_PTXFE, 0);
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efm32_gint_ptxfeisr(priv);
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@@ -2892,7 +2893,7 @@ static int efm32_gint_isr(int irq, FAR void *context)
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/* Handle the host channels interrupt */
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if ((pending & USB_GINT_HC) != 0)
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if ((pending & USB_GINTSTS_HC) != 0)
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{
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usbhost_vtrace1(OTGFS_VTRACE1_GINT_HC, 0);
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efm32_gint_hcisr(priv);
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@@ -2900,14 +2901,14 @@ static int efm32_gint_isr(int irq, FAR void *context)
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/* Handle the host port interrupt */
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if ((pending & USB_GINT_HPRT) != 0)
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if ((pending & USB_GINTSTS_HPRT) != 0)
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{
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efm32_gint_hprtisr(priv);
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}
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/* Handle the disconnect detected interrupt */
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if ((pending & USB_GINT_DISC) != 0)
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if ((pending & USB_GINTSTS_DISC) != 0)
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{
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usbhost_vtrace1(OTGFS_VTRACE1_GINT_DISC, 0);
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efm32_gint_discisr(priv);
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@@ -2915,7 +2916,7 @@ static int efm32_gint_isr(int irq, FAR void *context)
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/* Handle the incomplete periodic transfer */
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if ((pending & USB_GINT_IPXFR) != 0)
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if ((pending & USB_GINTSTS_IPXFR) != 0)
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{
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usbhost_vtrace1(OTGFS_VTRACE1_GINT_IPXFR, 0);
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efm32_gint_ipxfrisr(priv);
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@@ -3000,35 +3001,35 @@ static inline void efm32_hostinit_enable(void)
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/* Enable the host interrupts */
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/* Common interrupts:
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*
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* USB_GINT_WKUP : Resume/remote wakeup detected interrupt
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* USB_GINT_USBSUSP : USB suspend
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* USB_GINTMSK_WKUP : Resume/remote wakeup detected interrupt
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* USB_GINTMSK_USBSUSP : USB suspend
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*/
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regval = (USB_GINT_WKUP | USB_GINT_USBSUSP);
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regval = (USB_GINTMSK_WKUP | USB_GINTMSK_USBSUSP);
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/* If OTG were supported, we would need to enable the following as well:
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*
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* USB_GINT_OTG : OTG interrupt
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* USB_GINT_SRQ : Session request/new session detected interrupt
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* USB_GINT_CIDSCHG : Connector ID status change
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* USB_GINTMSK_OTG : OTG interrupt
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* USB_GINTMSK_SRQ : Session request/new session detected interrupt
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* USB_GINTMSK_CIDSCHG : Connector ID status change
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*/
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/* Host-specific interrupts
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*
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* USB_GINT_SOF : Start of frame
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* USB_GINT_RXFLVL : RxFIFO non-empty
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* USB_GINT_IISOOXFR : Incomplete isochronous OUT transfer
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* USB_GINT_HPRT : Host port interrupt
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* USB_GINT_HC : Host channels interrupt
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* USB_GINT_DISC : Disconnect detected interrupt
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* USB_GINTMSK_SOF : Start of frame
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* USB_GINTMSK_RXFLVL : RxFIFO non-empty
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* USB_GINTMSK_IISOOXFR : Incomplete isochronous OUT transfer
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* USB_GINTMSK_HPRT : Host port interrupt
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* USB_GINTMSK_HC : Host channels interrupt
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* USB_GINTMSK_DISC : Disconnect detected interrupt
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*/
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#ifdef CONFIG_EFM32_OTGFS_SOFINTR
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regval |= (USB_GINT_SOF | USB_GINT_RXFLVL | USB_GINT_IISOOXFR |
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USB_GINT_HPRT | USB_GINT_HC | USB_GINT_DISC);
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regval |= (USB_GINTMSK_SOF | USB_GINTMSK_RXFLVL | USB_GINTMSK_IISOOXFR |
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USB_GINTMSK_HPRT | USB_GINTMSK_HC | USB_GINTMSK_DISC);
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#else
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regval |= (USB_GINT_RXFLVL | USB_GINT_IPXFR | USB_GINT_HPRT |
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USB_GINT_HC | USB_GINT_DISC);
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regval |= (USB_GINTMSK_RXFLVL | USB_GINTMSK_IPXFR | USB_GINTMSK_HPRT |
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USB_GINTMSK_HC | USB_GINTMSK_DISC);
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#endif
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efm32_putreg(EFM32_USB_GINTMSK, regval);
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}
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@@ -3075,12 +3076,12 @@ static void efm32_txfe_enable(FAR struct efm32_usbhost_s *priv, int chidx)
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default:
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case OTGFS_EPTYPE_CTRL: /* Non periodic transfer */
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case OTGFS_EPTYPE_BULK:
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regval |= USB_GINT_NPTXFE;
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regval |= USB_GINTMSK_NPTXFE;
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break;
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case OTGFS_EPTYPE_INTR: /* Periodic transfer */
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case OTGFS_EPTYPE_ISOC:
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regval |= USB_GINT_PTXFE;
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regval |= USB_GINTMSK_PTXFE;
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break;
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}
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