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LM32: Progress on interrupt and serial driver.

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This commit is contained in:
Ramtin Amin
2016-11-04 14:04:43 -06:00
committed by Gregory Nutt
parent 8fe916e133
commit 45caca804a
17 changed files with 1270 additions and 622 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/misoc/Kconfig
+6 -6
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@@ -11,7 +11,7 @@ choice
config ARCH_CHIP_LM32 config ARCH_CHIP_LM32
bool "LM32" bool "LM32"
select MISOC_HAVE_UART0 select MISOC_HAVE_UART1
---help--- ---help---
LM32 Chip Selected LM32 Chip Selected
@@ -32,15 +32,15 @@ menu "MISOC Peripheral Support"
# These "hidden" settings determine is a peripheral option is available for the # These "hidden" settings determine is a peripheral option is available for the
# selection MCU # selection MCU
config MISOC_HAVE_UART0 config MISOC_HAVE_UART1
bool bool
default n default n
select UART0_SERIALDRIVER select UART1_SERIALDRIVER
config MISOC_UART0 config MISOC_UART1
bool "UART0" bool "UART1"
default n default n
select ARCH_HAVE_UART0 select ARCH_HAVE_UART1
select MISOC_UART select MISOC_UART
endmenu # MISOC Peripheral Support endmenu # MISOC Peripheral Support
arch/misoc/src/common/misoc.h
+64
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@@ -0,0 +1,64 @@
/****************************************************************************
* arch/misoc/src/common/serial.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Ramtin Amin <keytwo@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_MISOC_SRC_COMMON_MISOC_H
#define __ARCH_MISOC_SRC_COMMON_MISOC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Public Functions
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Name: up_serialinit
*
* Description:
* Register serial console and serial ports. This assumes that
* misoc_earlyserialinit was called previously.
*
****************************************************************************/
void misoc_serial_initialize(void);
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_MISOC_SRC_COMMON_MISOC_H */
arch/misoc/src/common/misoc_mdelay.c
+70
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@@ -0,0 +1,70 @@
/****************************************************************************
* arch/misoc/src/common/misoc_mdelay.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_mdelay
*
* Description:
* Delay inline for the requested number of milliseconds.
* *** NOT multi-tasking friendly ***
*
* ASSUMPTIONS:
* The setting CONFIG_BOARD_LOOPSPERMSEC has been calibrated
*
****************************************************************************/
void up_mdelay(unsigned int milliseconds)
{
volatile int i;
volatile int j;
for (i = 0; i < milliseconds; i++)
{
for (j = 0; j < CONFIG_BOARD_LOOPSPERMSEC; j++)
{
}
}
}
arch/misoc/src/common/misoc_serial.c
+685
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File diff suppressed because it is too large Load Diff
arch/misoc/src/lm32/Make.defs
+1 -1
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@@ -37,7 +37,7 @@
HEAD_ASRC = lm32_vectors.S HEAD_ASRC = lm32_vectors.S
CMN_ASRCS = CMN_ASRCS =
CMN_CSRCS = misoc_uart.c CMN_CSRCS = misoc_serial.c misoc_mdelay.c
CHIP_ASRCS = lm32_syscall.S CHIP_ASRCS = lm32_syscall.S
arch/misoc/src/lm32/Toolchain.defs
+2 -2
View File
@@ -87,8 +87,8 @@ endif
# Generic GNU toolchain on OS X, Linux or any typical Posix system # Generic GNU toolchain on OS X, Linux or any typical Posix system
ifeq ($(CONFIG_LM32_TOOLCHAIN),GNUL) ifeq ($(CONFIG_LM32_TOOLCHAIN),GNUL)
CROSSDEV ?= lm32-elf-- CROSSDEV ?= lm32-elf-
ARCROSSDEV ?= lm32-elf-- ARCROSSDEV ?= lm32-elf-
MAXOPTIMIZATION ?= -Os MAXOPTIMIZATION ?= -Os
endif endif
arch/misoc/src/lm32/lm32.h
+10 -11
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@@ -34,8 +34,8 @@
* *
****************************************************************************/ ****************************************************************************/
#ifndef __ARCH_MISOC_SRC_COMMON_LM32_H #ifndef __ARCH_MISOC_SRC_LM32_LM32_H
#define __ARCH_MISOC_SRC_COMMON_LM32_H #define __ARCH_MISOC_SRC_LM32_LM32_H
/**************************************************************************** /****************************************************************************
* Included Files * Included Files
@@ -141,13 +141,17 @@ void lm32_copystate(uint32_t *dest, uint32_t *src);
void lm32_irq_initialize(void); void lm32_irq_initialize(void);
/* System timer *************************************************************/ /* Interrupt decode *********************************************************/
void lm32_timer_initialize(void); uint32_t *lm32_decodeirq(uint32_t intstat, uint32_t *regs);
/* Software interrupts ******************************************************/ /* Software interrupts ******************************************************/
uint32_t *lm32_swint(int irq, FAR void *context); int lm32_swint(int irq, FAR void *context);
/* System timer *************************************************************/
void lm32_timer_initialize(void);
/* Signal handling **********************************************************/ /* Signal handling **********************************************************/
@@ -163,10 +167,5 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits);
void lm32_dumpstate(void); void lm32_dumpstate(void);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#endif /* __ARCH_MISOC_SRC_LM32_LM32_H */
#endif /* __ARCH_MISOC_SRC_COMMON_LM32_H */
arch/misoc/src/lm32/lm32_config.h
+97
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@@ -0,0 +1,97 @@
/************************************************************************************
* arch/misoc/src/lm32/lm32_config.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Modified for LM32:
*
* Copyright (C) 2016 Ramin Amin. All rights reserved.
* Author: Ramtin Amin <keytwo@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_MISOC_SRC_LM32_LM32_CONFIG_H
#define __ARCH_MISOC_SRC_LM32_LM32_CONFIG_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <arch/chip/chip.h>
#include <arch/board/board.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* UARTs ****************************************************************************/
/* Are any UARTs enabled? */
#undef HAVE_UART_DEVICE
#if defined(CONFIG_MISOC_UART1) || defined(CONFIG_MISOC_UART2)
# define HAVE_UART_DEVICE 1
#endif
/* Is there a serial console? There should be no more than one defined. It
* could be on any UARTn, n=1,.. CHIP_NUARTS
*/
#if defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_MISOC_UART1)
# undef CONFIG_UART2_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_MISOC_UART2)
# undef CONFIG_UART1_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#else
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_UART2_SERIAL_CONSOLE
# undef HAVE_SERIAL_CONSOLE
#endif
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Inline Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
#endif /* __ARCH_MISOC_SRC_LM32_LM32_CONFIG_H */
arch/misoc/src/lm32/lm32_decodeirq.c
+1 -9
View File
@@ -61,18 +61,10 @@
* *
****************************************************************************/ ****************************************************************************/
uint32_t *lm32_decodeirq(uint32_t *regs) uint32_t *lm32_decodeirq(uint32_t intstat, uint32_t *regs)
{ {
uint32_t intstat;
int irq; int irq;
/* Read the pending interrupts */
/* REVISIT: How do I get the interupt status */
#warning Missing logic
intstat = 0;
/* REVIST: Do I need to mask the interrupt status with the IM? */
irqinfo("intstat=%08lx\n", (unsigned long)intstat); irqinfo("intstat=%08lx\n", (unsigned long)intstat);
/* Decode and dispatch interrupts */ /* Decode and dispatch interrupts */
arch/misoc/src/lm32/lm32_doirq.c
+3
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@@ -42,10 +42,13 @@
#include <stdint.h> #include <stdint.h>
#include <assert.h> #include <assert.h>
#include <debug.h>
#include <nuttx/irq.h> #include <nuttx/irq.h>
#include <nuttx/arch.h> #include <nuttx/arch.h>
#include <nuttx/board.h> #include <nuttx/board.h>
#include <arch/irq.h>
#include <arch/board/board.h> #include <arch/board/board.h>
#include "group/group.h" #include "group/group.h"
arch/misoc/src/lm32/lm32_initialize.c
+3 -2
View File
@@ -57,6 +57,7 @@
#include <arch/board/board.h> #include <arch/board/board.h>
#include "misoc.h"
#include "lm32.h" #include "lm32.h"
/**************************************************************************** /****************************************************************************
@@ -71,7 +72,7 @@ void up_initialize(void)
/* Initialize the serial driver */ /* Initialize the serial driver */
#warning REVISIT: Here you should all lm32_serial_initialize(). That initializes the entire serial driver, a part of the operation is the uart initialization. #warning REVISIT: Here you should all misoc_serial_initialize(). That initializes the entire serial driver, a part of the operation is the uart initialization.
uart_init(); misoc_serial_initialize();
} }
arch/misoc/src/lm32/lm32_swint.c
+2 -16
View File
@@ -130,7 +130,7 @@ static void dispatch_syscall(void)
* *
****************************************************************************/ ****************************************************************************/
uint32_t *lm32_swint(int irq, FAR void *context) int lm32_swint(int irq, FAR void *context)
{ {
uint32_t *regs = (uint32_t *)context; uint32_t *regs = (uint32_t *)context;
@@ -313,19 +313,5 @@ uint32_t *lm32_swint(int irq, FAR void *context)
} }
#endif #endif
/* If a context switch occurred while processing the interrupt then return OK;
* g_current_regs may have change value. If we return any value different
* from the input regs, then the lower level will know that a context
* switch occurred during interrupt processing.
*/
regs = (uint32_t *)g_current_regs;
/* Set g_current_regs to NULL to indicate that we are no longer in an
* interrupt handler.
*/
g_current_regs = NULL;
return regs;
} }
arch/misoc/src/lm32/lm32_vectors.S
+75 -73
View File
@@ -143,101 +143,103 @@ _do_reset:
.clearBSS: .clearBSS:
be r1, r3, .callMain be r1, r3, .callMain
sw (r1+0), r0 sw (r1+0), r0
addi r1, r1, 4 addi r1, r1, 4
bi .clearBSS bi .clearBSS
.callMain: .callMain:
bi os_start bi os_start
.save_all: .save_all:
addi sp, sp, -136 addi sp, sp, -136
sw (sp+REG_X0), r0 sw (sp+REG_X0), r0
sw (sp+REG_X1), r1 sw (sp+REG_X1), r1
sw (sp+REG_X2), r2 sw (sp+REG_X2), r2
sw (sp+REG_X3), r3 sw (sp+REG_X3), r3
sw (sp+REG_X4), r4 sw (sp+REG_X4), r4
sw (sp+REG_X5), r5 sw (sp+REG_X5), r5
sw (sp+REG_X6), r6 sw (sp+REG_X6), r6
sw (sp+REG_X7), r7 sw (sp+REG_X7), r7
sw (sp+REG_X8), r8 sw (sp+REG_X8), r8
sw (sp+REG_X9), r9 sw (sp+REG_X9), r9
sw (sp+REG_X10), r10 sw (sp+REG_X10), r10
sw (sp+REG_X11), r11 sw (sp+REG_X11), r11
sw (sp+REG_X12), r12 sw (sp+REG_X12), r12
sw (sp+REG_X13), r13 sw (sp+REG_X13), r13
sw (sp+REG_X14), r14 sw (sp+REG_X14), r14
sw (sp+REG_X15), r15 sw (sp+REG_X15), r15
sw (sp+REG_X16), r16 sw (sp+REG_X16), r16
sw (sp+REG_X17), r17 sw (sp+REG_X17), r17
sw (sp+REG_X18), r18 sw (sp+REG_X18), r18
sw (sp+REG_X19), r19 sw (sp+REG_X19), r19
sw (sp+REG_X20), r20 sw (sp+REG_X20), r20
sw (sp+REG_X21), r21 sw (sp+REG_X21), r21
sw (sp+REG_X22), r22 sw (sp+REG_X22), r22
sw (sp+REG_X23), r23 sw (sp+REG_X23), r23
sw (sp+REG_X24), r24 sw (sp+REG_X24), r24
sw (sp+REG_X25), r25 sw (sp+REG_X25), r25
sw (sp+REG_GP), r26 sw (sp+REG_GP), r26
sw (sp+REG_FP), r27 sw (sp+REG_FP), r27
sw (sp+REG_SP), r28 sw (sp+REG_SP), r28
/* reg RA done later */ /* reg RA done later */
sw (sp+REG_EA), r30 sw (sp+REG_EA), r30
sw (sp+REG_BA), r31 sw (sp+REG_BA), r31
/* ra needs to be moved from initial stack location */ /* ra needs to be moved from initial stack location */
lw r1, (sp+ 136) w r1, (sp+ 136)
sw (sp+REG_RA), r1 sw (sp+REG_RA), r1
/* Get IE/REG_INT_CTX */
/* get IE/REG_INT_CTX */
rcsr r1, IE rcsr r1, IE
sw (sp+REG_INT_CTX), r1 sw (sp+REG_INT_CTX), r1
/* the 2nd argument is the regs pointer */ /* The 2nd argument is the regs pointer */
addi r2, sp, 0
addi r2, sp, 0
ret ret
.restore_all_and_eret: .restore_all_and_eret:
/* r1 should have the place where we restore ! */ /* r1 should have the place where we restore ! */
lw r2, (r1+REG_X2) w r2, (r1+REG_X2)
lw r3, (r1+REG_X3) w r3, (r1+REG_X3)
lw r4, (r1+REG_X4) w r4, (r1+REG_X4)
lw r5, (r1+REG_X5) w r5, (r1+REG_X5)
lw r6, (r1+REG_X6) w r6, (r1+REG_X6)
lw r7, (r1+REG_X7) w r7, (r1+REG_X7)
lw r8, (r1+REG_X8) w r8, (r1+REG_X8)
lw r9, (r1+REG_X9) w r9, (r1+REG_X9)
lw r10, (r1+REG_X10) w r10, (r1+REG_X10)
lw r11, (r1+REG_X11) w r11, (r1+REG_X11)
lw r12, (r1+REG_X12) w r12, (r1+REG_X12)
lw r13, (r1+REG_X13) w r13, (r1+REG_X13)
lw r14, (r1+REG_X14) w r14, (r1+REG_X14)
lw r15, (r1+REG_X15) w r15, (r1+REG_X15)
lw r16, (r1+REG_X16) w r16, (r1+REG_X16)
lw r17, (r1+REG_X17) w r17, (r1+REG_X17)
lw r18, (r1+REG_X18) w r18, (r1+REG_X18)
lw r19, (r1+REG_X19) w r19, (r1+REG_X19)
lw r20, (r1+REG_X20) w r20, (r1+REG_X20)
lw r21, (r1+REG_X21) w r21, (r1+REG_X21)
lw r22, (r1+REG_X22) w r22, (r1+REG_X22)
lw r23, (r1+REG_X23) w r23, (r1+REG_X23)
lw r24, (r1+REG_X24) w r24, (r1+REG_X24)
lw r25, (r1+REG_X25) w r25, (r1+REG_X25)
lw r26, (r1+REG_GP) w r26, (r1+REG_GP)
lw r27, (r1+REG_FP) w r27, (r1+REG_FP)
lw r28, (r1+REG_SP) w r28, (r1+REG_SP)
lw r29, (r1+REG_RA) w r29, (r1+REG_RA)
lw r30, (r1+REG_EA) w r30, (r1+REG_EA)
lw r31, (r1+REG_BA) w r31, (r1+REG_BA)
lw r1, (r1+REG_INT_CTX) lw r1, (r1+REG_INT_CTX)
wcsr IE, r1 wcsr IE, r1
lw r1, (r1+REG_X1) w r1, (r1+REG_X1)
addi sp, sp, 136 addi sp, sp, 136
eret eret
/* This global variable is unsigned long g_idle_topstack and is /* This global variable is unsigned long g_idle_topstack and is
configs/misoc/include/generated/csr.h
+195 -342
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File diff suppressed because it is too large Load Diff
configs/misoc/include/generated/mem.h
+3 -42
View File
@@ -1,44 +1,5 @@
/**************************************************************************** #ifndef __GENERATED_MEM_H
* configs/misoc/include/generated/mem.h #define __GENERATED_MEM_H
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Ramtin Amin <keytwo@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __CONFIGS_MISOC_INCLUDE_GENERATED_MEM_H
#define __CONFIGS_MISOC_INCLUDE_GENERATED_MEM_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define ROM_BASE 0x00000000 #define ROM_BASE 0x00000000
#define ROM_SIZE 0x00008000 #define ROM_SIZE 0x00008000
@@ -49,4 +10,4 @@
#define MAIN_RAM_BASE 0x40000000 #define MAIN_RAM_BASE 0x40000000
#define MAIN_RAM_SIZE 0x00800000 #define MAIN_RAM_SIZE 0x00800000
#endif /* __CONFIGS_MISOC_INCLUDE_GENERATED_MEM_H / #endif
configs/misoc/include/generated/regions.ld
+1 -2
View File
@@ -1,5 +1,4 @@
MEMORY MEMORY {
{
rom : ORIGIN = 0x00000000, LENGTH = 0x00008000 rom : ORIGIN = 0x00000000, LENGTH = 0x00008000
sram : ORIGIN = 0x10000000, LENGTH = 0x00001000 sram : ORIGIN = 0x10000000, LENGTH = 0x00001000
main_ram : ORIGIN = 0x40000000, LENGTH = 0x00800000 main_ram : ORIGIN = 0x40000000, LENGTH = 0x00800000
configs/misoc/include/generated/sdram_phy.h
+52 -116
View File
@@ -1,56 +1,20 @@
/**************************************************************************** #ifndef __GENERATED_SDRAM_PHY_H
* configs/misoc/include/generated/common.h #define __GENERATED_SDRAM_PHY_H
* #include <hw/common.h>
* Copyright (C) 2016 Gregory Nutt. All rights reserved. #include <generated/csr.h>
* Author: Ramtin Amin <keytwo@gmail.com> #include <hw/flags.h>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __CONFIGS_MISOC_INCLUDE_GENERATED_SDRAM_PHY_H
#define __CONFIGS_MISOC_INCLUDE_GENERATED_SDRAM_PHY_H
/****************************************************************************
* Included Filese
****************************************************************************/
#include "hw/common.h"
#include "hw/flags.h"
#include <arch/board/generated/csr.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define DFII_NPHASES 1 #define DFII_NPHASES 1
static void cdelay(int i);
static void command_p0(int cmd)
{
sdram_dfii_pi0_command_write(cmd);
sdram_dfii_pi0_command_issue_write(1);
}
#define sdram_dfii_pird_address_write(X) sdram_dfii_pi0_address_write(X) #define sdram_dfii_pird_address_write(X) sdram_dfii_pi0_address_write(X)
#define sdram_dfii_piwr_address_write(X) sdram_dfii_pi0_address_write(X) #define sdram_dfii_piwr_address_write(X) sdram_dfii_pi0_address_write(X)
@@ -62,83 +26,55 @@
#define DFII_PIX_DATA_SIZE CSR_SDRAM_DFII_PI0_WRDATA_SIZE #define DFII_PIX_DATA_SIZE CSR_SDRAM_DFII_PI0_WRDATA_SIZE
/**************************************************************************** const unsigned int sdram_dfii_pix_wrdata_addr[1] = {
* Private Data CSR_SDRAM_DFII_PI0_WRDATA_ADDR
****************************************************************************/
const unsigned int sdram_dfii_pix_wrdata_addr[1] =
{
CSR_SDRAM_DFII_PI0_WRDATA_ADDR
}; };
const unsigned int sdram_dfii_pix_rddata_addr[1] = const unsigned int sdram_dfii_pix_rddata_addr[1] = {
{ CSR_SDRAM_DFII_PI0_RDDATA_ADDR
CSR_SDRAM_DFII_PI0_RDDATA_ADDR
}; };
/****************************************************************************
* Private Functions
****************************************************************************/
static void cdelay(int i);
static void command_p0(int cmd)
{
sdram_dfii_pi0_command_write(cmd);
sdram_dfii_pi0_command_issue_write(1);
}
static void init_sequence(void) static void init_sequence(void)
{ {
/* Bring CKE high */ /* Bring CKE high */
sdram_dfii_pi0_address_write(0x0);
sdram_dfii_pi0_baddress_write(0);
sdram_dfii_control_write(DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N);
cdelay(20000);
sdram_dfii_pi0_address_write(0x0); /* Precharge All */
sdram_dfii_pi0_baddress_write(0); sdram_dfii_pi0_address_write(0x400);
sdram_dfii_control_write(DFII_CONTROL_CKE | DFII_CONTROL_ODT | sdram_dfii_pi0_baddress_write(0);
DFII_CONTROL_RESET_N); command_p0(DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
cdelay(20000);
/* Precharge All */ /* Load Mode Register / Reset DLL, CL=2, BL=1 */
sdram_dfii_pi0_address_write(0x120);
sdram_dfii_pi0_baddress_write(0);
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
cdelay(200);
sdram_dfii_pi0_address_write(0x400); /* Precharge All */
sdram_dfii_pi0_baddress_write(0); sdram_dfii_pi0_address_write(0x400);
command_p0(DFII_COMMAND_RAS | DFII_COMMAND_WE | DFII_COMMAND_CS); sdram_dfii_pi0_baddress_write(0);
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
/* Load Mode Register / Reset DLL, CL=2, BL=1 */ /* Auto Refresh */
sdram_dfii_pi0_address_write(0x0);
sdram_dfii_pi0_baddress_write(0);
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_CS);
cdelay(4);
sdram_dfii_pi0_address_write(0x120); /* Auto Refresh */
sdram_dfii_pi0_baddress_write(0); sdram_dfii_pi0_address_write(0x0);
command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_WE | sdram_dfii_pi0_baddress_write(0);
DFII_COMMAND_CS); command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_CS);
cdelay(200); cdelay(4);
/* Precharge All */ /* Load Mode Register / CL=2, BL=1 */
sdram_dfii_pi0_address_write(0x20);
sdram_dfii_pi0_baddress_write(0);
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
cdelay(200);
sdram_dfii_pi0_address_write(0x400);
sdram_dfii_pi0_baddress_write(0);
command_p0(DFII_COMMAND_RAS | DFII_COMMAND_WE | DFII_COMMAND_CS);
/* Auto Refresh */
sdram_dfii_pi0_address_write(0x0);
sdram_dfii_pi0_baddress_write(0);
command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_CS);
cdelay(4);
/* Auto Refresh */
sdram_dfii_pi0_address_write(0x0);
sdram_dfii_pi0_baddress_write(0);
command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_CS);
cdelay(4);
/* Load Mode Register / CL=2, BL=1 */
sdram_dfii_pi0_address_write(0x20);
sdram_dfii_pi0_baddress_write(0);
command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_WE |
DFII_COMMAND_CS);
cdelay(200);
} }
#endif
#endif /* __CONFIGS_MISOC_INCLUDE_GENERATED_SDRAM_PHY_H