mirror of
https://github.com/apache/nuttx.git
synced 2026-05-30 05:16:47 +08:00
LM32: Progress on interrupt and serial driver.
This commit is contained in:
Ramtin Amin
committed by
Gregory Nutt
Gregory Nutt
parent
8fe916e133
commit
45caca804a
+6
-6
@@ -11,7 +11,7 @@ choice
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config ARCH_CHIP_LM32
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bool "LM32"
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select MISOC_HAVE_UART0
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select MISOC_HAVE_UART1
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---help---
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LM32 Chip Selected
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@@ -32,15 +32,15 @@ menu "MISOC Peripheral Support"
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# These "hidden" settings determine is a peripheral option is available for the
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# selection MCU
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config MISOC_HAVE_UART0
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config MISOC_HAVE_UART1
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bool
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default n
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select UART0_SERIALDRIVER
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select UART1_SERIALDRIVER
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config MISOC_UART0
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bool "UART0"
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config MISOC_UART1
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bool "UART1"
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default n
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select ARCH_HAVE_UART0
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select ARCH_HAVE_UART1
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select MISOC_UART
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endmenu # MISOC Peripheral Support
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@@ -0,0 +1,64 @@
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/****************************************************************************
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* arch/misoc/src/common/serial.h
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Ramtin Amin <keytwo@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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||||
* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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||||
*
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||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_MISOC_SRC_COMMON_MISOC_H
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#define __ARCH_MISOC_SRC_COMMON_MISOC_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/****************************************************************************
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* Name: up_serialinit
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*
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* Description:
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* Register serial console and serial ports. This assumes that
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* misoc_earlyserialinit was called previously.
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*
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****************************************************************************/
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void misoc_serial_initialize(void);
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_MISOC_SRC_COMMON_MISOC_H */
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@@ -0,0 +1,70 @@
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/****************************************************************************
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* arch/misoc/src/common/misoc_mdelay.c
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_mdelay
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*
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* Description:
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* Delay inline for the requested number of milliseconds.
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* *** NOT multi-tasking friendly ***
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*
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* ASSUMPTIONS:
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* The setting CONFIG_BOARD_LOOPSPERMSEC has been calibrated
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*
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****************************************************************************/
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void up_mdelay(unsigned int milliseconds)
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{
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volatile int i;
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volatile int j;
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for (i = 0; i < milliseconds; i++)
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{
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for (j = 0; j < CONFIG_BOARD_LOOPSPERMSEC; j++)
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{
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}
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}
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}
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File diff suppressed because it is too large
Load Diff
@@ -37,7 +37,7 @@
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HEAD_ASRC = lm32_vectors.S
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CMN_ASRCS =
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CMN_CSRCS = misoc_uart.c
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CMN_CSRCS = misoc_serial.c misoc_mdelay.c
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CHIP_ASRCS = lm32_syscall.S
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@@ -87,8 +87,8 @@ endif
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# Generic GNU toolchain on OS X, Linux or any typical Posix system
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ifeq ($(CONFIG_LM32_TOOLCHAIN),GNUL)
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CROSSDEV ?= lm32-elf--
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ARCROSSDEV ?= lm32-elf--
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CROSSDEV ?= lm32-elf-
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ARCROSSDEV ?= lm32-elf-
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MAXOPTIMIZATION ?= -Os
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endif
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+10
-11
@@ -34,8 +34,8 @@
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*
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****************************************************************************/
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#ifndef __ARCH_MISOC_SRC_COMMON_LM32_H
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#define __ARCH_MISOC_SRC_COMMON_LM32_H
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#ifndef __ARCH_MISOC_SRC_LM32_LM32_H
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#define __ARCH_MISOC_SRC_LM32_LM32_H
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/****************************************************************************
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* Included Files
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@@ -141,13 +141,17 @@ void lm32_copystate(uint32_t *dest, uint32_t *src);
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void lm32_irq_initialize(void);
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/* System timer *************************************************************/
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/* Interrupt decode *********************************************************/
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void lm32_timer_initialize(void);
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uint32_t *lm32_decodeirq(uint32_t intstat, uint32_t *regs);
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/* Software interrupts ******************************************************/
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uint32_t *lm32_swint(int irq, FAR void *context);
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int lm32_swint(int irq, FAR void *context);
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/* System timer *************************************************************/
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void lm32_timer_initialize(void);
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/* Signal handling **********************************************************/
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@@ -163,10 +167,5 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits);
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void lm32_dumpstate(void);
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_MISOC_SRC_COMMON_LM32_H */
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#endif /* __ARCH_MISOC_SRC_LM32_LM32_H */
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@@ -0,0 +1,97 @@
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/************************************************************************************
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* arch/misoc/src/lm32/lm32_config.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Modified for LM32:
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*
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* Copyright (C) 2016 Ramin Amin. All rights reserved.
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* Author: Ramtin Amin <keytwo@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
|
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* distribution.
|
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* 3. Neither the name NuttX nor the names of its contributors may be
|
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* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_MISOC_SRC_LM32_LM32_CONFIG_H
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#define __ARCH_MISOC_SRC_LM32_LM32_CONFIG_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <arch/chip/chip.h>
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#include <arch/board/board.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* UARTs ****************************************************************************/
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/* Are any UARTs enabled? */
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#undef HAVE_UART_DEVICE
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#if defined(CONFIG_MISOC_UART1) || defined(CONFIG_MISOC_UART2)
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# define HAVE_UART_DEVICE 1
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#endif
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/* Is there a serial console? There should be no more than one defined. It
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* could be on any UARTn, n=1,.. CHIP_NUARTS
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*/
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#if defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_MISOC_UART1)
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_MISOC_UART2)
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#else
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef HAVE_SERIAL_CONSOLE
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#endif
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_MISOC_SRC_LM32_LM32_CONFIG_H */
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@@ -61,18 +61,10 @@
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*
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****************************************************************************/
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uint32_t *lm32_decodeirq(uint32_t *regs)
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uint32_t *lm32_decodeirq(uint32_t intstat, uint32_t *regs)
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{
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uint32_t intstat;
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int irq;
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/* Read the pending interrupts */
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/* REVISIT: How do I get the interupt status */
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#warning Missing logic
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intstat = 0;
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/* REVIST: Do I need to mask the interrupt status with the IM? */
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irqinfo("intstat=%08lx\n", (unsigned long)intstat);
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/* Decode and dispatch interrupts */
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@@ -42,10 +42,13 @@
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/board.h>
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#include <arch/irq.h>
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#include <arch/board/board.h>
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#include "group/group.h"
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@@ -57,6 +57,7 @@
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#include <arch/board/board.h>
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#include "misoc.h"
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#include "lm32.h"
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/****************************************************************************
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@@ -71,7 +72,7 @@ void up_initialize(void)
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/* Initialize the serial driver */
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#warning REVISIT: Here you should all lm32_serial_initialize(). That initializes the entire serial driver, a part of the operation is the uart initialization.
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#warning REVISIT: Here you should all misoc_serial_initialize(). That initializes the entire serial driver, a part of the operation is the uart initialization.
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uart_init();
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misoc_serial_initialize();
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}
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@@ -130,7 +130,7 @@ static void dispatch_syscall(void)
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*
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****************************************************************************/
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uint32_t *lm32_swint(int irq, FAR void *context)
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int lm32_swint(int irq, FAR void *context)
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{
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uint32_t *regs = (uint32_t *)context;
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@@ -313,19 +313,5 @@ uint32_t *lm32_swint(int irq, FAR void *context)
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}
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#endif
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/* If a context switch occurred while processing the interrupt then
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* g_current_regs may have change value. If we return any value different
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* from the input regs, then the lower level will know that a context
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* switch occurred during interrupt processing.
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*/
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regs = (uint32_t *)g_current_regs;
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/* Set g_current_regs to NULL to indicate that we are no longer in an
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* interrupt handler.
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*/
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g_current_regs = NULL;
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return regs;
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return OK;
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}
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@@ -143,101 +143,103 @@ _do_reset:
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.clearBSS:
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be r1, r3, .callMain
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sw (r1+0), r0
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addi r1, r1, 4
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sw (r1+0), r0
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addi r1, r1, 4
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bi .clearBSS
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.callMain:
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bi os_start
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.save_all:
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addi sp, sp, -136
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sw (sp+REG_X0), r0
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sw (sp+REG_X1), r1
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sw (sp+REG_X2), r2
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sw (sp+REG_X3), r3
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sw (sp+REG_X4), r4
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sw (sp+REG_X5), r5
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||||
sw (sp+REG_X6), r6
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||||
sw (sp+REG_X7), r7
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sw (sp+REG_X8), r8
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sw (sp+REG_X9), r9
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sw (sp+REG_X10), r10
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sw (sp+REG_X11), r11
|
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sw (sp+REG_X12), r12
|
||||
sw (sp+REG_X13), r13
|
||||
sw (sp+REG_X14), r14
|
||||
sw (sp+REG_X15), r15
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sw (sp+REG_X16), r16
|
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sw (sp+REG_X17), r17
|
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sw (sp+REG_X18), r18
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sw (sp+REG_X19), r19
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sw (sp+REG_X20), r20
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sw (sp+REG_X21), r21
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sw (sp+REG_X22), r22
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sw (sp+REG_X23), r23
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sw (sp+REG_X24), r24
|
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sw (sp+REG_X25), r25
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addi sp, sp, -136
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sw (sp+REG_X0), r0
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sw (sp+REG_X1), r1
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sw (sp+REG_X2), r2
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sw (sp+REG_X3), r3
|
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sw (sp+REG_X4), r4
|
||||
sw (sp+REG_X5), r5
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sw (sp+REG_X6), r6
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sw (sp+REG_X7), r7
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sw (sp+REG_X8), r8
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sw (sp+REG_X9), r9
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sw (sp+REG_X10), r10
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sw (sp+REG_X11), r11
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sw (sp+REG_X12), r12
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sw (sp+REG_X13), r13
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sw (sp+REG_X14), r14
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sw (sp+REG_X15), r15
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sw (sp+REG_X16), r16
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sw (sp+REG_X17), r17
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sw (sp+REG_X18), r18
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sw (sp+REG_X19), r19
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sw (sp+REG_X20), r20
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sw (sp+REG_X21), r21
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sw (sp+REG_X22), r22
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sw (sp+REG_X23), r23
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sw (sp+REG_X24), r24
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sw (sp+REG_X25), r25
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sw (sp+REG_GP), r26
|
||||
sw (sp+REG_FP), r27
|
||||
sw (sp+REG_SP), r28
|
||||
sw (sp+REG_GP), r26
|
||||
sw (sp+REG_FP), r27
|
||||
sw (sp+REG_SP), r28
|
||||
|
||||
/* reg RA done later */
|
||||
|
||||
sw (sp+REG_EA), r30
|
||||
sw (sp+REG_BA), r31
|
||||
sw (sp+REG_EA), r30
|
||||
sw (sp+REG_BA), r31
|
||||
|
||||
/* ra needs to be moved from initial stack location */
|
||||
|
||||
lw r1, (sp+ 136)
|
||||
sw (sp+REG_RA), r1
|
||||
w r1, (sp+ 136)
|
||||
sw (sp+REG_RA), r1
|
||||
|
||||
/* Get IE/REG_INT_CTX */
|
||||
|
||||
/* get IE/REG_INT_CTX */
|
||||
rcsr r1, IE
|
||||
sw (sp+REG_INT_CTX), r1
|
||||
sw (sp+REG_INT_CTX), r1
|
||||
|
||||
/* the 2nd argument is the regs pointer */
|
||||
addi r2, sp, 0
|
||||
/* The 2nd argument is the regs pointer */
|
||||
|
||||
addi r2, sp, 0
|
||||
ret
|
||||
|
||||
.restore_all_and_eret:
|
||||
/* r1 should have the place where we restore ! */
|
||||
|
||||
lw r2, (r1+REG_X2)
|
||||
lw r3, (r1+REG_X3)
|
||||
lw r4, (r1+REG_X4)
|
||||
lw r5, (r1+REG_X5)
|
||||
lw r6, (r1+REG_X6)
|
||||
lw r7, (r1+REG_X7)
|
||||
lw r8, (r1+REG_X8)
|
||||
lw r9, (r1+REG_X9)
|
||||
lw r10, (r1+REG_X10)
|
||||
lw r11, (r1+REG_X11)
|
||||
lw r12, (r1+REG_X12)
|
||||
lw r13, (r1+REG_X13)
|
||||
lw r14, (r1+REG_X14)
|
||||
lw r15, (r1+REG_X15)
|
||||
lw r16, (r1+REG_X16)
|
||||
lw r17, (r1+REG_X17)
|
||||
lw r18, (r1+REG_X18)
|
||||
lw r19, (r1+REG_X19)
|
||||
lw r20, (r1+REG_X20)
|
||||
lw r21, (r1+REG_X21)
|
||||
lw r22, (r1+REG_X22)
|
||||
lw r23, (r1+REG_X23)
|
||||
lw r24, (r1+REG_X24)
|
||||
lw r25, (r1+REG_X25)
|
||||
lw r26, (r1+REG_GP)
|
||||
lw r27, (r1+REG_FP)
|
||||
lw r28, (r1+REG_SP)
|
||||
lw r29, (r1+REG_RA)
|
||||
lw r30, (r1+REG_EA)
|
||||
lw r31, (r1+REG_BA)
|
||||
lw r1, (r1+REG_INT_CTX)
|
||||
w r2, (r1+REG_X2)
|
||||
w r3, (r1+REG_X3)
|
||||
w r4, (r1+REG_X4)
|
||||
w r5, (r1+REG_X5)
|
||||
w r6, (r1+REG_X6)
|
||||
w r7, (r1+REG_X7)
|
||||
w r8, (r1+REG_X8)
|
||||
w r9, (r1+REG_X9)
|
||||
w r10, (r1+REG_X10)
|
||||
w r11, (r1+REG_X11)
|
||||
w r12, (r1+REG_X12)
|
||||
w r13, (r1+REG_X13)
|
||||
w r14, (r1+REG_X14)
|
||||
w r15, (r1+REG_X15)
|
||||
w r16, (r1+REG_X16)
|
||||
w r17, (r1+REG_X17)
|
||||
w r18, (r1+REG_X18)
|
||||
w r19, (r1+REG_X19)
|
||||
w r20, (r1+REG_X20)
|
||||
w r21, (r1+REG_X21)
|
||||
w r22, (r1+REG_X22)
|
||||
w r23, (r1+REG_X23)
|
||||
w r24, (r1+REG_X24)
|
||||
w r25, (r1+REG_X25)
|
||||
w r26, (r1+REG_GP)
|
||||
w r27, (r1+REG_FP)
|
||||
w r28, (r1+REG_SP)
|
||||
w r29, (r1+REG_RA)
|
||||
w r30, (r1+REG_EA)
|
||||
w r31, (r1+REG_BA)
|
||||
lw r1, (r1+REG_INT_CTX)
|
||||
wcsr IE, r1
|
||||
lw r1, (r1+REG_X1)
|
||||
addi sp, sp, 136
|
||||
w r1, (r1+REG_X1)
|
||||
addi sp, sp, 136
|
||||
eret
|
||||
|
||||
/* This global variable is unsigned long g_idle_topstack and is
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,44 +1,5 @@
|
||||
/****************************************************************************
|
||||
* configs/misoc/include/generated/mem.h
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Ramtin Amin <keytwo@gmail.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __CONFIGS_MISOC_INCLUDE_GENERATED_MEM_H
|
||||
#define __CONFIGS_MISOC_INCLUDE_GENERATED_MEM_H
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
#ifndef __GENERATED_MEM_H
|
||||
#define __GENERATED_MEM_H
|
||||
|
||||
#define ROM_BASE 0x00000000
|
||||
#define ROM_SIZE 0x00008000
|
||||
@@ -49,4 +10,4 @@
|
||||
#define MAIN_RAM_BASE 0x40000000
|
||||
#define MAIN_RAM_SIZE 0x00800000
|
||||
|
||||
#endif /* __CONFIGS_MISOC_INCLUDE_GENERATED_MEM_H /
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,4 @@
|
||||
MEMORY
|
||||
{
|
||||
MEMORY {
|
||||
rom : ORIGIN = 0x00000000, LENGTH = 0x00008000
|
||||
sram : ORIGIN = 0x10000000, LENGTH = 0x00001000
|
||||
main_ram : ORIGIN = 0x40000000, LENGTH = 0x00800000
|
||||
|
||||
@@ -1,56 +1,20 @@
|
||||
/****************************************************************************
|
||||
* configs/misoc/include/generated/common.h
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Ramtin Amin <keytwo@gmail.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __CONFIGS_MISOC_INCLUDE_GENERATED_SDRAM_PHY_H
|
||||
#define __CONFIGS_MISOC_INCLUDE_GENERATED_SDRAM_PHY_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Filese
|
||||
****************************************************************************/
|
||||
|
||||
#include "hw/common.h"
|
||||
#include "hw/flags.h"
|
||||
|
||||
#include <arch/board/generated/csr.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
#ifndef __GENERATED_SDRAM_PHY_H
|
||||
#define __GENERATED_SDRAM_PHY_H
|
||||
#include <hw/common.h>
|
||||
#include <generated/csr.h>
|
||||
#include <hw/flags.h>
|
||||
|
||||
#define DFII_NPHASES 1
|
||||
|
||||
static void cdelay(int i);
|
||||
|
||||
static void command_p0(int cmd)
|
||||
{
|
||||
sdram_dfii_pi0_command_write(cmd);
|
||||
sdram_dfii_pi0_command_issue_write(1);
|
||||
}
|
||||
|
||||
|
||||
#define sdram_dfii_pird_address_write(X) sdram_dfii_pi0_address_write(X)
|
||||
#define sdram_dfii_piwr_address_write(X) sdram_dfii_pi0_address_write(X)
|
||||
|
||||
@@ -62,83 +26,55 @@
|
||||
|
||||
#define DFII_PIX_DATA_SIZE CSR_SDRAM_DFII_PI0_WRDATA_SIZE
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
const unsigned int sdram_dfii_pix_wrdata_addr[1] =
|
||||
{
|
||||
CSR_SDRAM_DFII_PI0_WRDATA_ADDR
|
||||
const unsigned int sdram_dfii_pix_wrdata_addr[1] = {
|
||||
CSR_SDRAM_DFII_PI0_WRDATA_ADDR
|
||||
};
|
||||
|
||||
const unsigned int sdram_dfii_pix_rddata_addr[1] =
|
||||
{
|
||||
CSR_SDRAM_DFII_PI0_RDDATA_ADDR
|
||||
const unsigned int sdram_dfii_pix_rddata_addr[1] = {
|
||||
CSR_SDRAM_DFII_PI0_RDDATA_ADDR
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
static void cdelay(int i);
|
||||
|
||||
static void command_p0(int cmd)
|
||||
{
|
||||
sdram_dfii_pi0_command_write(cmd);
|
||||
sdram_dfii_pi0_command_issue_write(1);
|
||||
}
|
||||
|
||||
static void init_sequence(void)
|
||||
{
|
||||
/* Bring CKE high */
|
||||
/* Bring CKE high */
|
||||
sdram_dfii_pi0_address_write(0x0);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
sdram_dfii_control_write(DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N);
|
||||
cdelay(20000);
|
||||
|
||||
sdram_dfii_pi0_address_write(0x0);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
sdram_dfii_control_write(DFII_CONTROL_CKE | DFII_CONTROL_ODT |
|
||||
DFII_CONTROL_RESET_N);
|
||||
cdelay(20000);
|
||||
/* Precharge All */
|
||||
sdram_dfii_pi0_address_write(0x400);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
|
||||
|
||||
/* Precharge All */
|
||||
/* Load Mode Register / Reset DLL, CL=2, BL=1 */
|
||||
sdram_dfii_pi0_address_write(0x120);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
|
||||
cdelay(200);
|
||||
|
||||
sdram_dfii_pi0_address_write(0x400);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
command_p0(DFII_COMMAND_RAS | DFII_COMMAND_WE | DFII_COMMAND_CS);
|
||||
/* Precharge All */
|
||||
sdram_dfii_pi0_address_write(0x400);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
|
||||
|
||||
/* Load Mode Register / Reset DLL, CL=2, BL=1 */
|
||||
/* Auto Refresh */
|
||||
sdram_dfii_pi0_address_write(0x0);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_CS);
|
||||
cdelay(4);
|
||||
|
||||
sdram_dfii_pi0_address_write(0x120);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_WE |
|
||||
DFII_COMMAND_CS);
|
||||
cdelay(200);
|
||||
/* Auto Refresh */
|
||||
sdram_dfii_pi0_address_write(0x0);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_CS);
|
||||
cdelay(4);
|
||||
|
||||
/* Precharge All */
|
||||
/* Load Mode Register / CL=2, BL=1 */
|
||||
sdram_dfii_pi0_address_write(0x20);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
|
||||
cdelay(200);
|
||||
|
||||
sdram_dfii_pi0_address_write(0x400);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
command_p0(DFII_COMMAND_RAS | DFII_COMMAND_WE | DFII_COMMAND_CS);
|
||||
|
||||
/* Auto Refresh */
|
||||
|
||||
sdram_dfii_pi0_address_write(0x0);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_CS);
|
||||
cdelay(4);
|
||||
|
||||
/* Auto Refresh */
|
||||
|
||||
sdram_dfii_pi0_address_write(0x0);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_CS);
|
||||
cdelay(4);
|
||||
|
||||
/* Load Mode Register / CL=2, BL=1 */
|
||||
|
||||
sdram_dfii_pi0_address_write(0x20);
|
||||
sdram_dfii_pi0_baddress_write(0);
|
||||
command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_WE |
|
||||
DFII_COMMAND_CS);
|
||||
cdelay(200);
|
||||
}
|
||||
|
||||
#endif /* __CONFIGS_MISOC_INCLUDE_GENERATED_SDRAM_PHY_H
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user