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arch: Fix the stack boundary calculation and check

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All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
Xiang Xiao
2021-04-07 23:50:51 +08:00
committed by David Sidrane
parent 15932fa9ea
commit 3f67c67aaf
126 changed files with 210 additions and 281 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/arm/arm_assert.c
+2 -2
View File
@@ -194,7 +194,7 @@ static void up_dumpstate(void)
* stack?
*/
if (sp < istackbase && sp > istackbase - istacksize)
if (sp < istackbase && sp >= istackbase - istacksize)
{
/* Yes.. dump the interrupt stack */
@@ -240,7 +240,7 @@ static void up_dumpstate(void)
* stack memory.
*/
if (sp > ustackbase || sp <= ustackbase - ustacksize)
if (sp >= ustackbase || sp < ustackbase - ustacksize)
{
_alert("ERROR: Stack pointer is not within allocated stack\n");
up_stackdump(ustackbase - ustacksize, ustackbase);
arch/arm/src/arm/arm_head.S
+1 -1
View File
@@ -642,7 +642,7 @@ __start:
.Linitparms:
.long _sbss
.long _ebss
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE
#if !defined(CONFIG_PAGING) && !defined(CONFIG_BOOT_RUNFROMFLASH)
arch/arm/src/arm/arm_nommuhead.S
+1 -1
View File
@@ -145,7 +145,7 @@ __start:
.Lbssinit:
.long _sbss
.long _ebss
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE
#ifdef CONFIG_BOOT_RUNFROMFLASH
.Ldatainit:
arch/arm/src/arm/arm_vectors.S
+1 -2
View File
@@ -429,8 +429,7 @@ arm_vectorfiq:
g_intstackalloc:
.skip (CONFIG_ARCH_INTERRUPTSTACK & ~3)
g_intstackbase:
.skip 4
.size g_intstackbase, 4
.size g_intstackbase, 0
.size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~3)
#endif
arch/arm/src/armv6-m/arm_assert.c
+3 -3
View File
@@ -232,7 +232,7 @@ static void up_dumpstate(void)
* stack?
*/
if (sp < istackbase && sp > istackbase - istacksize)
if (sp < istackbase && sp >= istackbase - istacksize)
{
/* Yes.. dump the interrupt stack */
@@ -266,7 +266,7 @@ static void up_dumpstate(void)
* stack memory.
*/
if (sp <= ustackbase && sp > ustackbase - ustacksize)
if (sp < ustackbase && sp >= ustackbase - ustacksize)
{
up_stackdump(sp, ustackbase);
}
@@ -288,7 +288,7 @@ static void up_dumpstate(void)
* stack memory.
*/
if (sp > ustackbase || sp <= ustackbase - ustacksize)
if (sp >= ustackbase || sp < ustackbase - ustacksize)
{
_alert("ERROR: Stack pointer is not within allocated stack\n");
up_stackdump(ustackbase - ustacksize, ustackbase);
arch/arm/src/armv6-m/arm_vectors.c
+1 -1
View File
@@ -50,7 +50,7 @@
* Pre-processor Definitions
****************************************************************************/
#define IDLE_STACK ((unsigned)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define IDLE_STACK ((unsigned)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
#ifndef ARMV6M_PERIPHERAL_INTERRUPTS
# error ARMV6M_PERIPHERAL_INTERRUPTS must be defined to the number of I/O interrupts to be supported
arch/arm/src/armv7-a/arm_assert.c
+2 -2
View File
@@ -263,7 +263,7 @@ static void up_dumpstate(void)
#if CONFIG_ARCH_INTERRUPTSTACK > 7
/* Does the current stack pointer lie within the interrupt stack? */
if (sp > istackbase - istacksize && sp < istackbase)
if (sp >= istackbase - istacksize && sp < istackbase)
{
/* Yes.. dump the interrupt stack */
@@ -292,7 +292,7 @@ static void up_dumpstate(void)
* stack memory.
*/
if (sp > ustackbase - ustacksize && sp < ustackbase)
if (sp >= ustackbase - ustacksize && sp < ustackbase)
{
_alert("User Stack\n", sp);
up_stackdump(sp, ustackbase);
arch/arm/src/armv7-a/arm_head.S
+3 -3
View File
@@ -736,11 +736,11 @@ arm_data_initialize:
.Lstackpointer:
#ifdef CONFIG_BOOT_SDRAM_DATA
.long IDLE_STACK_VBASE+CONFIG_IDLETHREAD_STACKSIZE-4
.long IDLE_STACK_VBASE+CONFIG_IDLETHREAD_STACKSIZE
#elif defined(CONFIG_SMP)
.long _enoinit+CONFIG_IDLETHREAD_STACKSIZE-4
.long _enoinit+CONFIG_IDLETHREAD_STACKSIZE
#else
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE
#endif
.size .Lstackpointer, . -.Lstackpointer
arch/arm/src/armv7-a/arm_pghead.S
+2 -2
View File
@@ -762,9 +762,9 @@ arm_data_initialize:
.Lstackpointer:
#ifdef CONFIG_BOOT_SDRAM_DATA
.long IDLE_STACK_VBASE+CONFIG_IDLETHREAD_STACKSIZE-4
.long IDLE_STACK_VBASE+CONFIG_IDLETHREAD_STACKSIZE
#else
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE
#endif
.size .Lstackpointer, . -.Lstackpointer
arch/arm/src/armv7-a/arm_vectors.S
+2 -4
View File
@@ -979,8 +979,7 @@ arm_vectorfiq:
g_intstackalloc:
.skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7)
g_intstackbase:
.skip 4
.size g_intstackbase, 4
.size g_intstackbase, 0
.size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~7)
/****************************************************************************
@@ -995,8 +994,7 @@ g_intstackbase:
g_fiqstackalloc:
.skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7)
g_fiqstackbase:
.skip 4
.size g_fiqstackbase, 4
.size g_fiqstackbase, 0
.size g_fiqstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~7)
#endif /* !CONFIG_SMP && CONFIG_ARCH_INTERRUPTSTACK > 7 */
arch/arm/src/armv7-m/arm_assert.c
+3 -3
View File
@@ -244,7 +244,7 @@ static void up_dumpstate(void)
* stack?
*/
if (sp < istackbase && sp > istackbase - istacksize)
if (sp < istackbase && sp >= istackbase - istacksize)
{
/* Yes.. dump the interrupt stack */
@@ -278,7 +278,7 @@ static void up_dumpstate(void)
* stack memory.
*/
if (sp <= ustackbase && sp > ustackbase - ustacksize)
if (sp < ustackbase && sp >= ustackbase - ustacksize)
{
up_stackdump(sp, ustackbase);
}
@@ -303,7 +303,7 @@ static void up_dumpstate(void)
* stack memory.
*/
if (sp > ustackbase || sp <= ustackbase - ustacksize)
if (sp >= ustackbase || sp < ustackbase - ustacksize)
{
_alert("ERROR: Stack pointer is not within the allocated stack\n");
up_stackdump(ustackbase - ustacksize, ustackbase);
arch/arm/src/armv7-m/arm_vectors.c
+1 -1
View File
@@ -45,7 +45,7 @@
* Pre-processor Definitions
****************************************************************************/
#define IDLE_STACK ((unsigned)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define IDLE_STACK ((unsigned)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
#ifndef ARMV7M_PERIPHERAL_INTERRUPTS
# error ARMV7M_PERIPHERAL_INTERRUPTS must be defined to the number of I/O interrupts to be supported
arch/arm/src/armv7-r/arm_assert.c
+3 -3
View File
@@ -245,7 +245,7 @@ static void up_dumpstate(void)
if (rtcb->xcp.kstack)
{
kstackbase = (uint32_t)rtcb->xcp.kstack +
CONFIG_ARCH_KERNEL_STACKSIZE - 4;
CONFIG_ARCH_KERNEL_STACKSIZE;
_alert("Kernel stack:\n");
_alert(" base: %08x\n", kstackbase);
@@ -256,7 +256,7 @@ static void up_dumpstate(void)
#if CONFIG_ARCH_INTERRUPTSTACK > 7
/* Does the current stack pointer lie within the interrupt stack? */
if (sp > istackbase - istacksize && sp < istackbase)
if (sp >= istackbase - istacksize && sp < istackbase)
{
/* Yes.. dump the interrupt stack */
@@ -285,7 +285,7 @@ static void up_dumpstate(void)
* stack memory.
*/
if (sp > ustackbase - ustacksize && sp < ustackbase)
if (sp >= ustackbase - ustacksize && sp < ustackbase)
{
_alert("User Stack\n", sp);
up_stackdump(sp, ustackbase);
arch/arm/src/armv7-r/arm_vectors.S
+2 -4
View File
@@ -933,8 +933,7 @@ arm_vectorfiq:
g_intstackalloc:
.skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7)
g_intstackbase:
.skip 4
.size g_intstackbase, 4
.size g_intstackbase, 0
.size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~7)
/****************************************************************************
@@ -949,8 +948,7 @@ g_intstackbase:
g_fiqstackalloc:
.skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7)
g_fiqstackbase:
.skip 4
.size g_fiqstackbase, 4
.size g_fiqstackbase, 0
.size g_fiqstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~7)
#endif /* CONFIG_ARCH_INTERRUPTSTACK > 7 */
arch/arm/src/armv8-m/arm_assert.c
+3 -3
View File
@@ -244,7 +244,7 @@ static void up_dumpstate(void)
* stack?
*/
if (sp < istackbase && sp > istackbase - istacksize)
if (sp < istackbase && sp >= istackbase - istacksize)
{
/* Yes.. dump the interrupt stack */
@@ -278,7 +278,7 @@ static void up_dumpstate(void)
* stack memory.
*/
if (sp <= ustackbase && sp > ustackbase - ustacksize)
if (sp < ustackbase && sp >= ustackbase - ustacksize)
{
up_stackdump(sp, ustackbase);
}
@@ -303,7 +303,7 @@ static void up_dumpstate(void)
* stack memory.
*/
if (sp > ustackbase || sp <= ustackbase - ustacksize)
if (sp >= ustackbase || sp < ustackbase - ustacksize)
{
_alert("ERROR: Stack pointer is not within the allocated stack\n");
up_stackdump(ustackbase - ustacksize, ustackbase);
arch/arm/src/armv8-m/arm_vectors.c
+1 -1
View File
@@ -45,7 +45,7 @@
* Pre-processor Definitions
****************************************************************************/
#define IDLE_STACK ((unsigned)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define IDLE_STACK ((unsigned)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
#ifndef ARMV8M_PERIPHERAL_INTERRUPTS
# error ARMV8M_PERIPHERAL_INTERRUPTS must be defined to the number of I/O interrupts to be supported
arch/arm/src/c5471/c5471_vectors.S
+1 -2
View File
@@ -463,8 +463,7 @@ arm_vectoraddrexcptn:
g_intstackalloc:
.skip (CONFIG_ARCH_INTERRUPTSTACK & ~3)
g_intstackbase:
.skip 4
.size g_intstackbase, 4
.size g_intstackbase, 0
.size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~3)
#endif
.end
arch/arm/src/cxd56xx/cxd56_start.c
+2 -2
View File
@@ -271,10 +271,10 @@ void __start(void)
__asm__ __volatile__("\tmsr msp, %0\n" :
: "r" ((uint32_t)&_ebss +
CONFIG_IDLETHREAD_STACKSIZE - 4));
CONFIG_IDLETHREAD_STACKSIZE));
__asm__ __volatile__("\tmsr psp, %0\n" :
: "r" ((uint32_t)&_ebss +
CONFIG_IDLETHREAD_STACKSIZE - 4));
CONFIG_IDLETHREAD_STACKSIZE));
#ifndef CONFIG_CXD56_SUBCORE
cpuid = getreg32(CPU_ID);
arch/arm/src/efm32/efm32_start.c
+1 -3
View File
@@ -54,9 +54,7 @@
* ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/eoss3/eoss3_start.c
+1 -3
View File
@@ -47,9 +47,7 @@
* ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/imxrt/imxrt_start.c
-3
View File
@@ -66,9 +66,6 @@
* here.
*/
#define IDLE_STACK ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE - 4)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Private Function prototypes
****************************************************************************/
arch/arm/src/kinetis/kinetis_start.c
+1 -3
View File
@@ -77,9 +77,7 @@ static void go_nx_start(void *pv, unsigned int nbytes)
* NOTE: ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/kl/kl_start.c
+1 -2
View File
@@ -58,8 +58,7 @@
* 0x2000:3fff - End of SRAM and end of heap (assuming 16KB of SRAM)
*/
#define IDLE_STACK ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
#define IDLE_STACK ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/lc823450/lc823450_start.c
+1 -3
View File
@@ -76,9 +76,7 @@
* ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/lpc17xx_40xx/lpc17_40_start.c
+1 -3
View File
@@ -51,9 +51,7 @@
* ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/lpc214x/lpc214x_head.S
+1 -1
View File
@@ -593,7 +593,7 @@ __start:
LC0: .long _sbss
.long _ebss
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE
LC2: .long _eronly /* Where .data defaults are stored in FLASH */
.long _sdata /* Where .data needs to reside in SDRAM */
arch/arm/src/lpc2378/lpc23xx_head.S
+1 -1
View File
@@ -210,7 +210,7 @@ __start:
LC0: .long _sbss
.long _ebss
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE
LC2: .long _eronly /* Where .data defaults are stored in FLASH */
.long _sdata /* Where .data needs to reside in SDRAM */
arch/arm/src/max326xx/common/max326_start.c
+1 -2
View File
@@ -59,8 +59,7 @@
* 0x2001:7fff - End of SRAM and end of heap (assuming 96KB of SRAM)
*/
#define IDLE_STACK ((uint32_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE - 4)
#define HEAP_BASE ((uint32_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
#define IDLE_STACK ((uint32_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Name: showprogress
arch/arm/src/nuc1xx/nuc_start.c
+1 -2
View File
@@ -55,8 +55,7 @@
* 0x2000:3fff - End of SRAM and end of heap (assuming 16KB of SRAM)
*/
#define IDLE_STACK ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
#define IDLE_STACK ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/rp2040/rp2040_start.c
+1 -2
View File
@@ -43,8 +43,7 @@
* Pre-processor Definitions
****************************************************************************/
#define IDLE_STACK ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
#define IDLE_STACK ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/s32k1xx/s32k1xx_start.c
+1 -3
View File
@@ -89,9 +89,7 @@
* NOTE: ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Name: showprogress
arch/arm/src/sam34/sam_start.c
+1 -3
View File
@@ -50,9 +50,7 @@
* ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/samd2l2/sam_start.c
+1 -2
View File
@@ -55,8 +55,7 @@
* 0x2000:ffff - End of SRAM and end of heap (assuming 64KB of SRAM)
*/
#define IDLE_STACK ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
#define IDLE_STACK ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/samd5e5/sam_start.c
+1 -3
View File
@@ -52,9 +52,7 @@
* ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/samv7/sam_start.c
-1
View File
@@ -61,7 +61,6 @@
* 0x2005:ffff - End of internal SRAM and end of heap (a
*/
#define IDLE_STACK ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
arch/arm/src/stm32/stm32_start.c
+1 -3
View File
@@ -49,9 +49,7 @@
* ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/stm32f0l0g0/stm32_start.c
+1 -2
View File
@@ -42,8 +42,7 @@
* Pre-processor Definitions
****************************************************************************/
#define IDLE_STACK ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
#define IDLE_STACK ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/stm32f7/stm32_start.c
-1
View File
@@ -61,7 +61,6 @@
* 0x2005:ffff - End of internal SRAM and end of heap (a
*/
#define IDLE_STACK ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
arch/arm/src/stm32h7/stm32_start.c
-1
View File
@@ -62,7 +62,6 @@
* 0x2005:ffff - End of internal SRAM and end of heap (a
*/
#define IDLE_STACK ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
arch/arm/src/stm32l4/stm32l4_start.c
-1
View File
@@ -62,7 +62,6 @@
#define SRAM2_START STM32L4_SRAM2_BASE
#define SRAM2_END (SRAM2_START + STM32L4_SRAM2_SIZE)
#define IDLE_STACK ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/* g_idle_topstack: _sbss is the start of the BSS region as defined by the
arch/arm/src/stm32l5/stm32l5_start.c
-1
View File
@@ -64,7 +64,6 @@
#define SRAM2_START STM32L5_SRAM2_BASE
#define SRAM2_END (SRAM2_START + STM32L5_SRAM2_SIZE)
#define IDLE_STACK ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE - 4)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/* g_idle_topstack: _sbss is the start of the BSS region as defined by the
arch/arm/src/str71x/str71x_head.S
+1 -1
View File
@@ -589,7 +589,7 @@ dtor_end:
LC0: .long _sbss
.long _ebss
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE
LC2: .long _eronly /* Where .data defaults are stored in FLASH */
.long _sdata /* Where .data needs to reside in SDRAM */
arch/arm/src/tiva/cc13xx/cc13xx_start.c
+1 -3
View File
@@ -54,9 +54,7 @@
* ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/tiva/common/lmxx_tm4c_start.c
+1 -3
View File
@@ -53,9 +53,7 @@
* ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
* Public Data
arch/arm/src/xmc4/xmc4_start.c
-1
View File
@@ -74,7 +74,6 @@ static void go_nx_start(void *pv, unsigned int nbytes)
* 0x2002:ffff - End of internal SRAM and end of heap (a
*/
#define IDLE_STACK ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/****************************************************************************
arch/avr/src/at90usb/at90usb_exceptions.S
+2 -2
View File
@@ -148,13 +148,13 @@ excpt_common:
* Name: up_interruptstack
****************************************************************************************************/
#if CONFIG_ARCH_INTERRUPTSTACK > 0
#if CONFIG_ARCH_INTERRUPTSTACK > 3
.bss
.align 4
.globl up_interruptstack
.type up_interruptstack, object
up_interruptstack:
.skip CONFIG_ARCH_INTERRUPTSTACK
.skip (CONFIG_ARCH_INTERRUPTSTACK & ~3)
.Lintstackbase:
.size up_interruptstack, .-up_interruptstack
#endif
arch/avr/src/at90usb/at90usb_head.S
+1 -1
View File
@@ -33,7 +33,7 @@
/* Stack is allocated just after uninitialized data and just before the heap */
#define STACKBASE (_enoinit+CONFIG_IDLETHREAD_STACKSIZE-1)
#define STACKBASE (_enoinit+CONFIG_IDLETHREAD_STACKSIZE)
/* The RAMPZ register is only available for CPUs with more than 64Kb of FLASH.
* Only the AT90USB646, 647, 1286, and 1287 are supported by this file.
arch/avr/src/atmega/atmega_head.S
+1 -1
View File
@@ -36,7 +36,7 @@
/* Stack is allocated just after uninitialized data and just before the heap */
#define STACKBASE (_enoinit+CONFIG_IDLETHREAD_STACKSIZE-1)
#define STACKBASE (_enoinit+CONFIG_IDLETHREAD_STACKSIZE)
/* The RAMPZ register is only available for CPUs with more than 64Kb of FLASH.
* At present, only the ATMega128 is supported so RAMPZ should always be
arch/avr/src/avr/up_createstack.c
+1 -1
View File
@@ -189,7 +189,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
* stack are referenced as positive word offsets from sp.
*/
top_of_stack = (size_t)tcb->stack_alloc_ptr + stack_size - 1;
top_of_stack = (size_t)tcb->stack_alloc_ptr + stack_size;
/* Save the adjusted stack values in the struct tcb_s */
arch/avr/src/avr/up_dumpstate.c
+4 -4
View File
@@ -145,7 +145,7 @@ void up_dumpstate(void)
/* Get the limits on the interrupt stack memory */
#if CONFIG_ARCH_INTERRUPTSTACK > 0
istackbase = (uint16_t)&g_intstackbase - 1;
istackbase = (uint16_t)&g_intstackbase;
istacksize = CONFIG_ARCH_INTERRUPTSTACK;
/* Show interrupt stack info */
@@ -162,7 +162,7 @@ void up_dumpstate(void)
* stack?
*/
if (sp <= istackbase && sp > istackbase - istacksize)
if (sp < istackbase && sp >= istackbase - istacksize)
{
/* Yes.. dump the interrupt stack */
@@ -196,7 +196,7 @@ void up_dumpstate(void)
* stack memory.
*/
if (sp <= ustackbase && sp > ustackbase - ustacksize)
if (sp < ustackbase && sp >= ustackbase - ustacksize)
{
up_stackdump(sp, ustackbase);
}
@@ -217,7 +217,7 @@ void up_dumpstate(void)
* stack memory.
*/
if (sp > ustackbase || sp <= ustackbase - ustacksize)
if (sp >= ustackbase || sp < ustackbase - ustacksize)
{
_alert("ERROR: Stack pointer is not within allocated stack\n");
up_stackdump(ustackbase - ustacksize, ustackbase);

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