arch/arm/src/tiva: Fix compilation errors on Tiva ADC code when ADC is enable. Please several cosmetic changes to files made during code review.

arch/arm/src/tiva/tiva_adclib.c

@@ -43,7 +43,9 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
- * This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
+ * This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver
+ * Library.
+ *
  ****************************************************************************/
 
 /****************************************************************************
@@ -82,13 +84,8 @@
     (((((div) << ADC_CC_CLKDIV_SHIFT) & ADC_CC_CLKDIV_MASK) | \
     ((src) & ADC_CC_CS_MASK)) & (ADC_CC_CLKDIV_MASK + ADC_CC_CS_MASK))
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
+#define INTERNAL_VREF  0x00
+#define EXTERNAL_VREF  0x01
 
 /****************************************************************************
  * Private Data
@@ -180,14 +177,6 @@ static uint32_t ain2gpio[] =
 #endif
 };
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -220,18 +209,19 @@ void tiva_adc_one_time_init(uint32_t clock, uint8_t sample_rate)
   if (one_time_init == false)
     {
       ainfo("performing ADC one-time initialization...\n");
-      /* set clock */
+
+      /* Set clock */
 
       tiva_adc_clock(clock);
 
-      /* set sampling rate */
+      /* Set sampling rate */
 
       tiva_adc_sample_rate(sample_rate);
 
 #ifdef CONFIG_ARCH_CHIP_TM4C129
-      /* voltage reference */
+      /* Voltage reference */
 
-      tiva_adc_vref();
+      tiva_adc_vref(INTERNAL_VREF);
 #endif
       one_time_init = true;
     }
@@ -247,8 +237,8 @@ void tiva_adc_one_time_init(uint32_t clock, uint8_t sample_rate)
  * Name: tiva_adc_configure
  *
  * Description:
- *   Performs configuration of a single ADC, it's valid sample sequencers and
- *   available steps.
+ *   Performs configuration of a single ADC, it's valid sample sequencers
+ *   and available steps.
  *
  ****************************************************************************/
 
@@ -298,14 +288,14 @@ void tiva_adc_configure(struct tiva_adc_cfg_s *cfg)
 void tiva_adc_sse_cfg(uint8_t adc, uint8_t sse,
                       struct tiva_adc_sse_cfg_s *ssecfg)
 {
+  uint8_t priority = ssecfg->priority;
+  uint8_t trigger  = ssecfg->trigger;
+
   ainfo("configure ADC%d SSE%d...\n", adc, sse);
 #ifdef CONFIG_DEBUG_ANALOG
   ainfo("priority=%d trigger=%d...\n", ssecfg->priority, ssecfg->trigger);
 #endif
 
-  uint8_t priority = ssecfg->priority;
-  uint8_t trigger  = ssecfg->trigger;
-
   /* Ensure SSE is disabled before configuring */
 
   tiva_adc_sse_enable(adc, sse, false);
@@ -326,11 +316,6 @@ void tiva_adc_sse_cfg(uint8_t adc, uint8_t sse,
 
 void tiva_adc_step_cfg(struct tiva_adc_step_cfg_s *stepcfg)
 {
-#ifdef CONFIG_DEBUG_ANALOG
-  ainfo("  shold=0x%02x flags=0x%02x ain=%d...\n",
-        stepcfg->shold, stepcfg->flags, stepcfg->ain);
-#endif
-
   uint8_t  adc   = stepcfg->adc;
   uint8_t  sse   = stepcfg->sse;
   uint8_t  step  = stepcfg->step;
@@ -342,8 +327,12 @@ void tiva_adc_step_cfg(struct tiva_adc_step_cfg_s *stepcfg)
   uint32_t gpio  = ain2gpio[stepcfg->ain];
 
   ainfo("configure ADC%d SSE%d STEP%d...\n", adc, sse, step);
+#ifdef CONFIG_DEBUG_ANALOG
+  ainfo("  shold=0x%02x flags=0x%02x ain=%d...\n",
+        stepcfg->shold, stepcfg->flags, stepcfg->ain);
+#endif
 
-  /* Configure the AIN GPIO for analog input if not flagged to be muxed to
+  /* Configure the AIN GPIO for analog input if not flagged to be mux'ed to
    * the internal temperature sensor
    */
 
@@ -356,7 +345,7 @@ void tiva_adc_step_cfg(struct tiva_adc_step_cfg_s *stepcfg)
 
   tiva_adc_sse_register_chn(adc, sse, step, ain);
   tiva_adc_sse_differential(adc, sse, step, 0); /* TODO: update when differential
-                                        * support is added. */
+                                                 * support is added. */
 #ifdef CONFIG_EXPERIMENTAL
   tiva_adc_sse_sample_hold_time(adc, sse, step, shold);
 #endif
@@ -393,8 +382,6 @@ uint8_t tiva_adc_get_ain(uint8_t adc, uint8_t sse, uint8_t step)
   return (ssmux >> ADC_SSMUX_MUX_SHIFT(step));
 }
 
-/* IRQS *********************************************************************/
-
 /****************************************************************************
  * Name: tiva_adc_irq_attach
  *
@@ -464,8 +451,6 @@ int tiva_adc_getirq(uint8_t adc, uint8_t sse)
   return sse2irq[SSE_IDX(adc, sse)];
 }
 
-/* Peripheral (base) level **************************************************/
-
 /****************************************************************************
  * Name: tiva_adc_enable
  *
@@ -538,32 +523,34 @@ void tiva_adc_clock(uint32_t freq)
   modifyreg32(ccreg, ADC_CC_CS_MASK, (ADC_CC_CS_PIOSC & ADC_CC_CS_MASK));
 
 #elif defined (CONFIG_ARCH_CHIP_TM4C129)
-  /* check clock bounds and specific match cases */
+  /* Check clock bounds and specific match cases */
 
   uint32_t clk_src = 0;
   uint32_t div = 0;
+  uintptr_t ccreg;
+
   if (freq > TIVA_ADC_CLOCK_MAX)
     {
       clk_src = ADC_CC_CS_SYSPLL;
-      div = (BOARD_FVCO_FREQUENCY / TIVA_ADC_CLOCK_MAX);
+      div     = (BOARD_FVCO_FREQUENCY / TIVA_ADC_CLOCK_MAX);
     }
   else if (freq < TIVA_ADC_CLOCK_MIN)
     {
       clk_src = ADC_CC_CS_PIOSC;
-      div = 1;
+      div     = 1;
     }
   else if (freq == XTAL_FREQUENCY)
     {
       clk_src = ADC_CC_CS_MOSC;
-      div = 1;
+      div     = 1;
     }
   else
     {
       clk_src = ADC_CC_CS_SYSPLL;
-      div = (BOARD_FVCO_FREQUENCY / freq);
+      div     = (BOARD_FVCO_FREQUENCY / freq);
     }
 
-  uintptr_t ccreg = (TIVA_ADC0_BASE + TIVA_ADC_CC_OFFSET);
+  ccreg = (TIVA_ADC0_BASE + TIVA_ADC_CC_OFFSET);
   modifyreg32(ccreg, ADC_CC_CLKDIV_MASK, CLOCK_CONFIG(div, clk_src));
 #else
 #  error Unsupported architecture reported
@@ -661,8 +648,6 @@ uint32_t tiva_adc_int_status(uint8_t adc)
   return ris;
 }
 
-/* Sample sequencer (SSE) functions *****************************************/
-
 /****************************************************************************
  * Name: tiva_adc_sse_enable
  *
@@ -682,9 +667,10 @@ uint32_t tiva_adc_int_status(uint8_t adc)
 
 uint8_t tiva_adc_sse_enable(uint8_t adc, uint8_t sse, bool state)
 {
+  uintptr_t actssreg = TIVA_ADC_ACTSS(adc);
+
   ainfo("ADC%d SSE%d=%01d\n", adc, sse, state);
 
-  uintptr_t actssreg = TIVA_ADC_ACTSS(adc);
   if (state == true)
     {
       modifyreg32(actssreg, 0, (1 << sse));
@@ -797,7 +783,7 @@ void tiva_adc_sse_int_enable(uint8_t adc, uint8_t sse, bool state)
  * Name: tiva_adc_sse_int_status
  *
  * Description:
- *   Returns interrupt status for the specificed SSE
+ *   Returns interrupt status for the specified SSE
  *
  * Input Parameters:
  *   adc - which ADC peripherals' interrupt status to retrieve
@@ -819,8 +805,8 @@ bool tiva_adc_sse_int_status(uint8_t adc, uint8_t sse)
  *   Clears the interrupt bit for the SSE.
  *
  * Input Parameters:
- *   adc - peripheral state
- *   sse - sample sequencer
+ *   adc   - peripheral state
+ *   sse   - sample sequencer
  *   state - sample sequencer
  *
  ****************************************************************************/
@@ -881,8 +867,8 @@ uint8_t tiva_adc_sse_data(uint8_t adc, uint8_t sse, int32_t *buf)
  *   the lowest. There can be no duplicate values.
  *
  * Input Parameters:
- *   adc - peripheral state
- *   sse - sample sequencer
+ *   adc      - peripheral state
+ *   sse      - sample sequencer
  *   priority - conversion priority
  *
  ****************************************************************************/

arch/arm/src/tiva/tiva_adclow.c

@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/tiva/tiva_adclow.c
  *
- *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016-2018 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2015 TRD2 Inc. All rights reserved.
  *   Author: Calvin Maguranis <calvin.maguranis@trd2inc.com>
  *           Gregory Nutt <gnutt@nuttx.org>
@@ -129,11 +129,6 @@
 #define SEM_PROCESS_PRIVATE 0
 #define SEM_PROCESS_SHARED  1
 
-/* DEBUG ********************************************************************/
-
-#ifdef CONFIG_DEBUG_ANALOG
-#endif
-
 /****************************************************************************
  * Public Functions
  * **************************************************************************/
@@ -179,12 +174,12 @@ struct tiva_adc_s
 
 struct tiva_adc_sse_s
 {
-  sem_t exclsem;      /* Mutual exclusion semaphore */
-  struct work_s work; /* Supports the interrupt handling "bottom half" */
-  bool cfg;           /* Configuration state */
-  bool ena;           /* Sample sequencer operation state */
-  uint8_t adc;        /* Parent peripheral */
-  uint8_t num;        /* SSE number */
+  sem_t exclsem;         /* Mutual exclusion semaphore */
+  struct work_s work;    /* Supports the interrupt handling "bottom half" */
+  bool cfg;              /* Configuration state */
+  bool ena;              /* Sample sequencer operation state */
+  uint8_t adc;           /* Parent peripheral */
+  uint8_t num;           /* SSE number */
 };
 
 /****************************************************************************
@@ -414,12 +409,12 @@ static int tiva_adc_bind(FAR struct adc_dev_s *dev,
 
 static void tiva_adc_reset(struct adc_dev_s *dev)
 {
-  ainfo("Resetting...\n");
-
   struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
   struct tiva_adc_sse_s *sse;
   uint8_t s;
 
+  ainfo("Resetting...\n");
+
   tiva_adc_rxint(dev, false);
 
   for (s = 0; s < 4; ++s)
@@ -446,12 +441,12 @@ static void tiva_adc_reset(struct adc_dev_s *dev)
 
 static int tiva_adc_setup(struct adc_dev_s *dev)
 {
-  ainfo("Setup\n");
-
   struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
   struct tiva_adc_sse_s *sse;
   uint8_t s = 0;
 
+  ainfo("Setup\n");
+
   priv->ena = true;
 
   for (s = 0; s < 4; ++s)
@@ -480,8 +475,8 @@ static int tiva_adc_setup(struct adc_dev_s *dev)
 static void tiva_adc_shutdown(struct adc_dev_s *dev)
 {
   struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
-  ainfo("Shutdown\n");
 
+  ainfo("Shutdown\n");
   DEBUGASSERT(priv->ena);
 
   /* Resetting the ADC peripheral disables interrupts and all SSEs */
@@ -515,13 +510,12 @@ static void tiva_adc_shutdown(struct adc_dev_s *dev)
 
 static void tiva_adc_rxint(struct adc_dev_s *dev, bool enable)
 {
-  ainfo("RXINT=%d\n", enable);
-
   struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
   struct tiva_adc_sse_s *sse;
   uint32_t trigger;
   uint8_t s = 0;
 
+  ainfo("RXINT=%d\n", enable);
   DEBUGASSERT(priv->ena);
 
   for (s = 0; s < 4; ++s)
@@ -665,6 +659,7 @@ static int tiva_adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg)
 
 static void tiva_adc_read(void *arg)
 {
+  struct tiva_adc_s     *priv;
   struct tiva_adc_sse_s *sse        = (struct tiva_adc_sse_s *)arg;
   struct adc_dev_s      *dev        = 0;
   int                    irq        = tiva_adc_getirq(sse->adc, sse->num);
@@ -694,6 +689,8 @@ static void tiva_adc_read(void *arg)
       return;
     }
 
+  priv = (struct tiva_adc_s *)dev->ad_priv;
+
   /* Verify that the upper-half driver has bound its callback functions */
 
   if (priv->cb != NULL)
@@ -737,7 +734,7 @@ static void tiva_adc_interrupt(struct tiva_adc_sse_s *sse)
 
   DEBUGASSERT(sse->ena == true);
 
-  /* disable further  interrupts. Interrupts will be re-enabled
+  /* Disable further  interrupts. Interrupts will be re-enabled
    * after the worker thread executes.
    */
 
@@ -946,14 +943,14 @@ int tiva_adc_initialize(const char *devpath, struct tiva_adc_cfg_s *cfg,
 
 void tiva_adc_lock(FAR struct tiva_adc_s *priv, int sse)
 {
-  ainfo("Locking...\n");
-
   struct tiva_adc_sse_s *s = g_sses[SSE_IDX(priv->devno, sse)];
   int ret;
 #ifdef CONFIG_DEBUG_ANALOG
   uint16_t loop_count = 0;
 #endif
 
+  ainfo("Locking...\n");
+
   do
     {
       ret = nxsem_wait(&s->exclsem);
@@ -986,13 +983,11 @@ void tiva_adc_lock(FAR struct tiva_adc_s *priv, int sse)
 
 void tiva_adc_unlock(FAR struct tiva_adc_s *priv, int sse)
 {
-  ainfo("Unlocking\n");
   struct tiva_adc_sse_s *s = g_sses[SSE_IDX(priv->devno, sse)];
+  ainfo("Unlocking\n");
   nxsem_post(&s->exclsem);
 }
 
-/* DEBUG ********************************************************************/
-
 #ifdef CONFIG_DEBUG_ANALOG
 
 /****************************************************************************
@@ -1041,6 +1036,7 @@ static void tiva_adc_runtimeobj_vals(void)
 {
   struct tiva_adc_sse_s *sse;
   uint8_t s;
+
 #  ifdef CONFIG_TIVA_ADC0
   ainfo("ADC0 [0x%08x] cfg=%d ena=%d devno=%d\n",
          &adc0, adc0.cfg, adc0.ena, adc0.devno);