Initial version

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@68 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2007-03-16 15:52:58 +00:00
parent 5414a30484
commit 34415a3108
50 changed files with 6840 additions and 0 deletions
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############################################################
# Make.defs
#
# Copyright (C) 2007 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name Gregory Nutt nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################
include ${TOPDIR}/.config
ifeq ("${CONFIG_DEBUG}","y")
ARCHOPTIMIZATION = -g
else
ARCHOPTIMIZATION = -Os -fno-strict-aliasing -fno-strength-reduce \
-fomit-frame-pointer
endif
ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float -fno-builtin
ARCHPICFLAGS = -fpic
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow
ARCHDEFINES =
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHSCRIPT = -T$(TOPDIR)/arch/$(CONFIG_ARCH)/ld.script
CROSSDEV = arm-elf-
CC = $(CROSSDEV)gcc
LD = $(CROSSDEV)ld
AR = $(CROSSDEV)ar rcs
NM = $(CROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
$(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifeq ("${CONFIG_DEBUG}","y")
LDFLAGS += -g
endif
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############################################################
# defconfig
#
# Copyright (C) 2007 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name Gregory Nutt nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################
#
# architecture selection
#
# CONFIG_ARCH - identifies the arch subdirectory
# CONFIG_ARCH_name - for use in C code
# CONFIG_ROM_VECTORS - unique to dm320
# CONFIG_DRAM_START/SIZE - Describes the installed DRAM.
# CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
#
CONFIG_ARCH=dm320
CONFIG_ARCH_DM320=y
CONFIG_ROM_VECTORS=n
CONFIG_DRAM_START=0x01100000
CONFIG_DRAM_SIZE=0x02000000
CONFIG_DRAM_NUTTXENTRY=0x01108000
CONFIG_ARCH_STACKDUMP=y
#
# DM320 specific device driver settings
#
# CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the
# console and ttys0 (default is the UART0).
# CONFIG_UARTn_HWFLOWCONTROL - enables hardware flow control
# CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received.
# This specific the size of the receive buffer
# CONFIG_UARTn_TXBUFSIZE - Characters are buffered before
# being sent. This specific the size of the transmit buffer
# CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be
# CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8.
# CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
# CONFIG_UARTn_2STOP - Two stop bits
#
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_UART1_SERIAL_CONSOLE=n
CONFIG_UART0_HWFLOWCONTROL=n
CONFIG_UART1_HWFLOWCONTROL=n
CONFIG_UART0_TXBUFSIZE=256
CONFIG_UART1_TXBUFSIZE=256
CONFIG_UART0_RXBUFSIZE=256
CONFIG_UART1_RXBUFSIZE=256
CONFIG_UART0_BAUD=115200
CONFIG_UART1_BAUD=115200
CONFIG_UART0_BITS=8
CONFIG_UART1_BITS=8
CONFIG_UART0_PARITY=0
CONFIG_UART1_PARITY=0
CONFIG_UART0_2STOP=0
CONFIG_UART1_2STOP=0
#
# General OS setup
#
# CONFIG_EXAMPLE - identifies the subdirectory in examples
# that will be used in the build
# CONFIG_DEBUG - enables built-in debug options
# CONFIG_DEBUG_VERBOSE - enables verbose debug output
# CONFIG_MM_REGIONS - If the architecture includes multiple
# regions of memory to allocate from, this specifies the
# number of memory regions that the memory manager must
# handle and enables the API mm_addregion(start, end);
# CONFIG_HAVE_LOWPUTC - architecture supports low-level, boot
# time console output
# CONFIG_RR_INTERVAL - The round robin timeslice will be set
# this number of milliseconds; Round robin scheduling can
# be disabled by setting this value to zero.
# CONFIG_SCHED_INSTRUMENTATION - enables instrumentation in
# scheduler to monitor system performance
# CONFIG_TASK_NAME_SIZE - Spcifies that maximum size of a
# task name to save in the TCB. Useful if scheduler
# instrumentation is selected. Set to zero to disable.
# CONFIG_START_YEAR, CONFIG_START_MONTH, CONFIG_START_DAY -
# Used to initialize the internal time logic.
# CONFIG_JULIAN_TIME - Enables Julian time conversions
# CONFIG_DEV_CONSOLE - Set if architecture-specific logic
# provides /dev/console. Enables stdout, stderr, stdin.
#
CONFIG_EXAMPLE=ostest
CONFIG_DEBUG=n
CONFIG_DEBUG_VERBOSE=n
CONFIG_MM_REGIONS=1
CONFIG_ARCH_LOWPUTC=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_INSTRUMENTATION=n
CONFIG_TASK_NAME_SIZE=0
CONFIG_START_YEAR=2007
CONFIG_START_MONTH=2
CONFIG_START_DAY=13
CONFIG_JULIAN_TIME=n
CONFIG_DEV_CONSOLE=n
#
# The following can be used to disable categories of
# APIs supported by the OS. If the compiler supports
# weak functions, then it should not be necessary to
# disable functions unless you want to restrict usage
# of those APIs.
#
# There are certain dependency relationships in these
# features.
#
# o mq_notify logic depends on signals to awaken tasks
# waiting for queues to become full or empty.
# o pthread_condtimedwait() depends on signals to wake
# up waiting tasks.
#
CONFIG_DISABLE_CLOCK=n
CONFIG_DISABLE_PTHREAD=n
CONFIG_DISABLE_SIGNALS=n
CONFIG_DISABLE_MQUEUE=n
#
# Misc libc settings
#
# CONFIG_NOPRINTF_FIELDWIDTH - sprintf-related logic is a
# little smaller if we do not support fieldwidthes
#
CONFIG_NOPRINTF_FIELDWIDTH=n
#
# Allow for architecture optimized implementations
#
# The architecture can provide optimized versions of the
# following to improve sysem performance
#
CONFIG_ARCH_MEMCPY=n
CONFIG_ARCH_MEMCMP=n
CONFIG_ARCH_MEMMOVE=n
CONFIG_ARCH_MEMSET=n
CONFIG_ARCH_STRCMP=n
CONFIG_ARCH_STRCPY=n
CONFIG_ARCH_STRNCPY=n
CONFIG_ARCH_STRLEN=n
CONFIG_ARCH_BZERO=n
CONFIG_ARCH_KMALLOC=n
CONFIG_ARCH_KZMALLOC=n
CONFIG_ARCH_KFREE=n
#
# General build options
#
# CONFIG_RRLOAD_BINARY - make the rrload binary format used with
# BSPs from www.ridgerun.com
#
CONFIG_RRLOAD_BINARY=y
#
# Sizes of configurable things (0 disables)
#
# CONFIG_MAX_TASKS - The maximum number of simultaneously
# active tasks. This value must be a power of two.
# CONFIG_MAX_TASK_ARGS - This controls the maximum number of
# of parameters that a task may receive (i.e., maxmum value
# of 'argc')
# CONFIG_NPTHREAD_KEYS - The number of items of thread-
# specific data that can be retained
# CONFIG_NFILE_DESCRIPTORS - The maximum number of file
# descriptors (one for each open)
# CONFIG_NFILE_STREAMS - The maximum number of streams that
# can be fopen'ed
# CONFIG_NAME_MAX - The maximum size of a file name.
# CONFIG_STDIO_BUFFER_SIZE - Size of the buffer to allocate
# on fopen. (Only if CONFIG_NFILE_STREAMS > 0)
# CONFIG_NUNGET_CHARS - Number of characters that can be
# buffered by ungetc() (Only if CONFIG_NFILE_STREAMS > 0)
# CONFIG_PREALLOC_MQ_MSGS - The number of pre-allocated message
# structures. The system manages a pool of preallocated
# message structures to minimize dynamic allocations
# CONFIG_MQ_MAXMSGSIZE - Message structures are allocated with
# a fixed payload size given by this settin (does not include
# other message structure overhead.
# CONFIG_MAX_WDOGPARMS - Maximum number of parameters that
# can be passed to a watchdog handler
# CONFIG_PREALLOC_WDOGS - The number of pre-allocated watchdog
# structures. The system manages a pool of preallocated
# watchdog structures to minimize dynamic allocations
#
CONFIG_MAX_TASKS=64
CONFIG_MAX_TASK_ARGS=4
CONFIG_NPTHREAD_KEYS=4
CONFIG_NFILE_DESCRIPTORS=32
CONFIG_NFILE_STREAMS=16
CONFIG_NAME_MAX=32
CONFIG_STDIO_BUFFER_SIZE=1024
CONFIG_NUNGET_CHARS=2
CONFIG_PREALLOC_MQ_MSGS=32
CONFIG_MQ_MAXMSGSIZE=32
CONFIG_MAX_WDOGPARMS=4
CONFIG_PREALLOC_WDOGS=32
#
# Stack and heap information
#
# CONFIG_BOOT_FROM_FLASH - Some configurations support XIP
# operation from FLASH.
# CONFIG_CUSTOM_STACK - The up_ implementation will handle
# all stack operations outside of the nuttx model.
# CONFIG_STACK_POINTER - The initial stack pointer (arm7tdmi only)
# CONFIG_PROC_STACK_SIZE - The size of the initial stack
# CONFIG_PTHREAD_STACK_MIN - Minimum pthread stack size
# CONFIG_PTHREAD_STACK_DEFAULT - Default pthread stack size
# CONFIG_HEAP_BASE - The beginning of the heap
# CONFIG_HEAP_SIZE - The size of the heap
#
CONFIG_BOOT_FROM_FLASH=n
CONFIG_CUSTOM_STACK=n
CONFIG_STACK_POINTER=
CONFIG_PROC_STACK_SIZE=4096
CONFIG_PTHREAD_STACK_MIN=256
CONFIG_PTHREAD_STACK_DEFAULT=4096
CONFIG_HEAP_BASE=
CONFIG_HEAP_SIZE=
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/************************************************************
* arch.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/* This file should never be included directed but, rather,
* only indirectly through nuttx/arch.h
*/
#ifndef __ARCH_DM320_ARCH_H
#define __ARCH_DM320_ARCH_H
/************************************************************
* Included Files
************************************************************/
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Inline functions
************************************************************/
/************************************************************
* Public Types
************************************************************/
/************************************************************
* Public Variables
************************************************************/
/************************************************************
* Public Function Prototypes
************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __ARCH_DM320_ARCH_H */
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/************************************************************
* irq.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/* This file should never be included directed but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_DM320_IRQ_H
#define __ARCH_DM320_IRQ_H
/************************************************************
* Included Files
************************************************************/
/************************************************************
* Definitions
************************************************************/
/* IRQ Stack Frame Format:
*
* Context is always saved/restored in the same way:
*
* (1) stmia rx, {r0-r14}
* (2) then the PC and CPSR
*
* This results in the following set of indices that
* can be used to access individual registers in the
* xcp.regs array:
*/
#define REG_R0 (0)
#define REG_R1 (1)
#define REG_R2 (2)
#define REG_R3 (3)
#define REG_R4 (4)
#define REG_R5 (5)
#define REG_R6 (6)
#define REG_R7 (7)
#define REG_R8 (8)
#define REG_R9 (9)
#define REG_R10 (10)
#define REG_R11 (11)
#define REG_R12 (12)
#define REG_R13 (13)
#define REG_R14 (14)
#define REG_R15 (15)
#define REG_CPSR (16)
#define XCPTCONTEST_REGS (17)
#define XCPTCONTEXT_SIZE (4 * XCPTCONTEST_REGS)
#define REG_A1 REG_R0
#define REG_A2 REG_R1
#define REG_A3 REG_R2
#define REG_A4 REG_R3
#define REG_V1 REG_R4
#define REG_V2 REG_R5
#define REG_V3 REG_R6
#define REG_V4 REG_R7
#define REG_V5 REG_R8
#define REG_V6 REG_R9
#define REG_V7 REG_R10
#define REG_SB REG_R9
#define REG_SL REG_R10
#define REG_FP REG_R11
#define REG_IP REG_R12
#define REG_SP REG_R13
#define REG_LR REG_R14
#define REG_PC REG_R15
/* DM320 Interrupts */
#define DM320_IRQ_TMR0 0 /* IRQ0: Timer 0 Interrupt */
#define DM320_IRQ_TMR1 1 /* IRQ1: Timer 1 Interrupt */
#define DM320_IRQ_TMR2 2 /* IRQ2: Timer 2 Interrupt (CCD timer 0) */
#define DM320_IRQ_TMR3 3 /* IRQ3: Timer 3 Interrupt (CCD timer 1) */
#define DM320_IRQ_CCDVD0 4 /* IRQ4: CCD VD Interrupt #0 */
#define DM320_IRQ_CCDVD1 5 /* IRQ5: CCD VD Interrupt #1 */
#define DM320_IRQ_CCDWEN 6 /* IRQ6: CCD WEN Interrupt */
#define DM320_IRQ_VENC 7 /* IRQ7: Video Encoder Interrupt */
#define DM320_IRQ_SP0 8 /* IRQ8: Serial Port 0 Interrupt (with DMA) */
#define DM320_IRQ_SP1 9 /* IRQ9: Serial Port 1 Interrupt */
#define DM320_IRQ_EXTHOST 10 /* IRQ10: External host interrupt */
#define DM320_IRQ_IMGBUF 11 /* IRQ11: Image Buffer */
#define DM320_IRQ_UART0 12 /* IRQ12: UART0 Interrupt */
#define DM320_IRQ_UART1 13 /* IRQ13: UART1 Interrupt */
#define DM320_IRQ_USB0 14 /* IRQ14: USB 0 Interrupt (DMA) */
#define DM320_IRQ_USB1 15 /* IRQ15: USB 1 Interrupt (Core) */
#define DM320_IRQ_VLYNQ 16 /* IRQ16: VLYNQ Interrupt */
#define DM320_IRQ_MTC0 17 /* IRQ17: Memory Traffic Controller 0 (DMA) */
#define DM320_IRQ_MTC1 18 /* IRQ18: Memory Traffic Controller 1 (CFC_RDY) */
#define DM320_IRQ_MMCSD0 19 /* IRQ19: MMC/SD or MS 0 Interrupt */
#define DM320_IRQ_MMCSD1 20 /* IRQ20: MMC/SD or MS 1 Interrupt */
#define DM320_IRQ_EXT0 21 /* IRQ21: External Interrupt #0 (GIO0) */
#define DM320_IRQ_EXT1 22 /* IRQ22: External Interrupt #1 (GIO1) */
#define DM320_IRQ_EXT2 23 /* IRQ23: External Interrupt #2 (GIO2) */
#define DM320_IRQ_EXT3 24 /* IRQ24: External Interrupt #3 (GIO3) */
#define DM320_IRQ_EXT4 25 /* IRQ25: External Interrupt #4 (GIO4) */
#define DM320_IRQ_EXT5 26 /* IRQ26: External Interrupt #5 (GIO5) */
#define DM320_IRQ_EXT6 27 /* IRQ27: External Interrupt #6 (GIO6) */
#define DM320_IRQ_EXT7 28 /* IRQ28: External Interrupt #7 (GIO7) */
#define DM320_IRQ_EXT8 29 /* IRQ29: External Interrupt #8 (GIO8) */
#define DM320_IRQ_EXT9 30 /* IRQ30: External Interrupt #9 (GIO9) */
#define DM320_IRQ_EXT10 31 /* IRQ31: External Interrupt #10 (GIO10) */
#define DM320_IRQ_EXT11 32 /* IRQ32: External Interrupt #11 (GIO11) */
#define DM320_IRQ_EXT12 33 /* IRQ33: External Interrupt #12 (GIO12) */
#define DM320_IRQ_EXT13 34 /* IRQ34: External Interrupt #13 (GIO13) */
#define DM320_IRQ_EXT14 35 /* IRQ35: External Interrupt #14 (GIO14) */
#define DM320_IRQ_EXT15 36 /* IRQ36: External Interrupt #15 (GIO15) */
#define DM320_IRQ_PREV0 37 /* IRQ37: Preview Engine 0 (Preview Over) */
#define DM320_IRQ_PREV1 38 /* IRQ38: Preview Engine 1 (Preview Historgram Over) */
#define DM320_IRQ_WDT 39 /* IRQ39: Watchdog Timer Interrupt */
#define DM320_IRQ_I2C 40 /* IRQ40: I2C Interrupt */
#define DM320_IRQ_CLKC 41 /* IRQ41: Clock controller Interrupt (wake up) */
#define DM320_IRQ_E2ICE 42 /* IRQ42: Embedded ICE Interrupt */
#define DM320_IRQ_ARMCOMRX 43 /* IRQ43: ARMCOMM Receive Interrupt */
#define DM320_IRQ_ARMCOMTX 44 /* IRQ44: ARMCOMM Transmit Interrupt */
#define DM320_IRQ_RSV 45 /* IRQ45: Reserved Interrupt */
#define DM320_IRQ_SYSTIMER DM320_IRQ_TMR0
#define NR_IRQS (DM320_IRQ_RSV+1)
/************************************************************
* Public Types
************************************************************/
/* This struct defines the way the registers are stored. We
* need to save:
*
* 1 CPSR
* 7 Static registers, v1-v7 (aka r4-r10)
* 1 Frame pointer, fp (aka r11)
* 1 Stack pointer, sp (aka r13)
* 1 Return address, lr (aka r14)
* ---
* 11 (XCPTCONTEXT_USER_REG)
*
* On interrupts, we also need to save:
* 4 Volatile registers, a1-a4 (aka r0-r3)
* 1 Scratch Register, ip (aka r12)
*---
* 5 (XCPTCONTEXT_IRQ_REGS)
*
* For a total of 17 (XCPTCONTEST_REGS)
*/
#ifndef __ASSEMBLY__
struct xcptcontext
{
/* The following function pointer is non-zero if there
* are pending signals to be processed.
*/
void *sigdeliver; /* Actual type is sig_deliver_t */
/* These are saved copies of LR and CPSR used during
* signal processing.
*/
uint32 saved_pc;
uint32 saved_cpsr;
/* Register save area */
uint32 regs[XCPTCONTEST_REGS];
};
#endif
/************************************************************
* Inline functions
************************************************************/
#ifndef __ASSEMBLY__
/* Save the current interrupt enable state & disable IRQs */
static inline irqstate_t irqsave(void)
{
unsigned int flags;
unsigned int temp;
__asm__ __volatile__
(
"\tmrs %0, cpsr\n"
"\torr %1, %0, #128\n"
"\tmsr cpsr_c, %1"
: "=r" (flags), "=r" (temp)
:
: "memory");
return flags;
}
/* Restore saved IRQ & FIQ state */
static inline void irqrestore(irqstate_t flags)
{
__asm__ __volatile__
(
"msr cpsr_c, %0"
:
: "r" (flags)
: "memory");
}
static inline void system_call(swint_t func, int parm1,
int parm2, int parm3)
{
__asm__ __volatile__
(
"mov\tr0,%0\n\t"
"mov\tr1,%1\n\t"
"mov\tr2,%2\n\t"
"mov\tr3,%3\n\t"
"swi\t0x900001\n\t"
:
: "r" ((long)(func)), "r" ((long)(parm1)),
"r" ((long)(parm2)), "r" ((long)(parm3))
: "r0", "r1", "r2", "r3", "lr");
}
#endif
/************************************************************
* Public Variables
************************************************************/
/************************************************************
* Public Function Prototypes
************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_DM320_IRQ_H */
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/************************************************************
* limits.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
#ifndef __ARCH_LIMITS_H
#define __ARCH_LIMITS_H
/************************************************************
* Included Files
************************************************************/
/************************************************************
* Definitions
************************************************************/
#define SCHAR_MIN 0x80
#define SCHAR_MAX 0x7f
#define UCHAR_MAX 0xff
/* These could be different on machines where char is unsigned */
#define CHAR_MIN SCHAR_MIN
#define CHAR_MAX SCHAR_MAX
#define SHRT_MIN 0x8000
#define SHRT_MAX 0x7fff
#define USHRT_MAX 0xffff
#define INT_MIN 0x80000000
#define INT_MAX 0x7fffffff
#define UINT_MAX 0xffffffff
/* These change on 32-bit and 64-bit platforms */
#define LONG_MAX 0x80000000
#define LONG_MIN 0x7fffffff
#define ULONG_MAX 0xffffffff
#define LLONG_MAX 0x8000000000000000
#define LLONG_MIN 0x7fffffffffffffff
#define ULLONG_MAX 0xffffffffffffffff
#endif /* __ARCH_LIMITS_H */
+82
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/************************************************************
* types.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/* This file should never be included directed but, rather,
* only indirectly through sys/types.h
*/
#ifndef __ARCH_DM320_TYPES_H
#define __ARCH_DM320_TYPES_H
/************************************************************
* Included Files
************************************************************/
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Type Declarations
************************************************************/
#ifndef __ASSEMBLY__
/* These are the sizes of the standard GNU types */
typedef char sbyte;
typedef unsigned char ubyte;
typedef unsigned char uint8;
typedef unsigned char boolean;
typedef short sint16;
typedef unsigned short uint16;
typedef int sint32;
typedef unsigned int uint32;
typedef long long sint64;
typedef unsigned long long uint64;
/* This is the size of the interrupt state save returned by
* irqsave()
*/
typedef unsigned int irqstate_t;
#endif /* __ASSEMBLY__ */
/************************************************************
* Global Function Prototypes
************************************************************/
#endif /* __ARCH_DM320_TYPES_H */
+84
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/************************************************************
* ld.script
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
/* The OS entry point is here */
. = 0x01108000;
.text : {
_stext = ABSOLUTE(.);
*(.text)
*(.fixup)
*(.gnu.warning)
*(.rodata)
*(.glue_7)
*(.glue_7t)
*(.got) /* Global offset table */
_etext = ABSOLUTE(.);
}
_eronly = ABSOLUTE(.); /* See below */
. = ALIGN(4096);
.data : {
_sdata = ABSOLUTE(.);
*(.data)
CONSTRUCTORS
_edata = ABSOLUTE(.);
}
.bss : { /* BSS */
_sbss = ABSOLUTE(.);
*(.bss)
*(COMMON)
_ebss = ABSOLUTE(.);
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
+46
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#!/bin/sh
# setenv.sh
#
# Copyright (C) 2007 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name Gregory Nutt nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
if [ "$(basename $0)" = "setenv" ] ; then
echo "You must source this script, not run it!" 1>&2
exit 1
fi
if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi
WD=`pwd`
export BUILDROOT_BIN=${WD}/../buildroot/build_arm_nofpu/staging_dir/bin
export PATH=${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}
echo "PATH : ${PATH}"
+115
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############################################################
# Makefile
#
# Copyright (C) 2007 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name Gregory Nutt nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################
-include $(TOPDIR)/Make.defs
MKDEP = $(TOPDIR)/tools/mkdeps.sh
CFLAGS += -I$(TOPDIR)/sched
ASRCS = up_vectors.S up_saveusercontext.S up_fullcontextrestore.S \
up_restart.S up_cache.S
ifeq ($(CONFIG_DEBUG),y)
ASRCS += up_lowputc.S
endif
AOBJS = $(ASRCS:.S=.o)
CSRCS = up_boot.c up_initialize.c up_initialstate.c up_idle.c up_doirq.c \
up_irq.c up_syscall.c up_dataabort.c up_prefetchabort.c \
up_undefinedinsn.c up_interruptcontext.c up_timerisr.c \
up_createstack.c up_usestack.c up_releasestack.c \
up_exit.c up_assert.c up_blocktask.c up_unblocktask.c \
up_releasepending.c up_reprioritizertr.c up_copystate.c \
up_schedulesigaction.c up_sigdeliver.c \
up_delay.c up_allocateheap.c
COBJS = $(CSRCS:.c=.o)
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
LDFLAGS = $(ARCHSCRIPT)
EXTRA_LIBS =
LINKOBJS = up_head$(OBJEXT)
LINKLIBS =
LDPATHES = $(addprefix -L$(TOPDIR)/,$(dir $(LINKLIBS)))
LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(LINKLIBS))))
LIBGCC = ${shell $(CC) -print-libgcc-file-name}
all: up_head.o libarch$(LIBEXT)
$(AOBJS) $(LINKOBJS): %.o: %.S
$(CC) -c $(CFLAGS) -D__ASSEMBLY__ $< -o $@
$(COBJS): %.o: %.c
$(CC) -c $(CFLAGS) $< -o $@
libarch$(LIBEXT): $(OBJS)
( for obj in $(OBJS) ; do \
$(AR) $@ $${obj} || \
{ echo "$(AR) $@ $obj FAILED!" ; exit 1 ; } ; \
done ; )
nuttx: $(LINKOBJS)
$(LD) --entry=__start $(LDFLAGS) $(LDPATHES) -o $(TOPDIR)/$@ $(LINKOBJS) \
--start-group $(LDLIBS) --end-group $(EXTRA_LIBS) $(LIBGCC)
@$(NM) $(TOPDIR)/$@ | \
grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
sort > $(TOPDIR)/System.map
@export vflashstart=`$(OBJDUMP) --all-headers $(TOPDIR)/$@ | grep _vflashstart | cut -d' ' -f1`; \
if [ ! -z "$$vflashstart" ]; then \
$(OBJCOPY) --adjust-section-vma=.vector=0x$$vflashstart $(TOPDIR)/$@ $(TOPDIR)/$@.flashimage; \
mv $(TOPDIR)/$@.flashimage $(TOPDIR)/$@; \
fi
ifeq ($(CONFIG_RRLOAD_BINARY),y)
@$(TOPDIR)/tools/mkimage.sh $(TOPDIR)/$@ $(TOPDIR)/$@.rr
@if [ -w /tftpboot ] ; then \
cp -f $(TOPDIR)/$@.rr /tftpboot/$@.rr.${CONFIG_ARCH}; \
fi
endif
.depend: Makefile $(SRCS)
$(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
touch $@
depend: .depend
clean:
rm -f libarch$(LIBEXT) *.o *~
distclean: clean
rm -f Make.dep .depend
-include Make.dep
+256
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/************************************************************************************
* arm9.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARM9_H
#define __ARM9_H
/************************************************************************************
* Included Files
************************************************************************************/
#ifndef __ASSEMBLY__
# include <sys/types.h>
#endif
/**************************************************************************
* Conditional Compilation
**************************************************************************/
#undef CONFIG_ALIGNMENT_TRAP
#undef CONFIG_DCACHE_WRITETHROUGH
#undef CONFIG_CACHE_ROUND_ROBIN
#undef CONFIG_DCACHE_DISABLE
#undef CONFIG_ICACHE_DISABLE
/************************************************************************************
* Definitions
************************************************************************************/
/* ARM9EJS **************************************************************************/
/* PSR bits */
#define MODE_MASK 0x0000001f
#define USR26_MODE 0x00000000
#define FIQ26_MODE 0x00000001
#define IRQ26_MODE 0x00000002
#define SVC26_MODE 0x00000003
#define USR_MODE 0x00000010
#define FIQ_MODE 0x00000011
#define IRQ_MODE 0x00000012
#define SVC_MODE 0x00000013
#define ABT_MODE 0x00000017
#define UND_MODE 0x0000001b
#define MODE32_BIT 0x00000010
#define SYSTEM_MODE 0x0000001f
#define PSR_T_BIT 0x00000020
#define PSR_F_BIT 0x00000040
#define PSR_I_BIT 0x00000080
#define PSR_J_BIT 0x01000000
#define PSR_Q_BIT 0x08000000
#define PSR_V_BIT 0x10000000
#define PSR_C_BIT 0x20000000
#define PSR_Z_BIT 0x40000000
#define PSR_N_BIT 0x80000000
/* CR1 bits (CP#15 CR1) */
#define CR_M 0x00000001 /* MMU enable */
#define CR_A 0x00000002 /* Alignment abort enable */
#define CR_C 0x00000004 /* Dcache enable */
#define CR_W 0x00000008 /* Write buffer enable */
#define CR_P 0x00000010 /* 32-bit exception handler */
#define CR_D 0x00000020 /* 32-bit data address range */
#define CR_L 0x00000040 /* Implementation defined */
#define CR_B 0x00000080 /* Big endian */
#define CR_S 0x00000100 /* System MMU protection */
#define CR_R 0x00000200 /* ROM MMU protection */
#define CR_F 0x00000400 /* Implementation defined */
#define CR_Z 0x00000800 /* Implementation defined */
#define CR_I 0x00001000 /* Icache enable */
#define CR_V 0x00002000 /* Vectors relocated to 0xffff0000 */
#define CR_RR 0x00004000 /* Round Robin cache replacement */
#define CR_L4 0x00008000 /* LDR pc can set T bit */
#define CR_DT 0x00010000
#define CR_IT 0x00040000
#define CR_ST 0x00080000
#define CR_FI 0x00200000 /* Fast interrupt (lower latency mode) */
#define CR_U 0x00400000 /* Unaligned access operation */
#define CR_XP 0x00800000 /* Extended page tables */
#define CR_VE 0x01000000 /* Vectored interrupts */
/* Hardware page table definitions.
*
* Level 1 Descriptor (PMD)
*
* Common definitions.
*/
#define PMD_TYPE_MASK 0x00000003 /* Bits 1:0: Type of descriptor */
#define PMD_TYPE_FAULT 0x00000000
#define PMD_TYPE_COARSE 0x00000001
#define PMD_TYPE_SECT 0x00000002
#define PMD_TYPE_FINE 0x00000003
/* Bits 3:2: Depends on descriptor */
#define PMD_BIT4 0x00000010 /* Bit 4: Must be one */
#define PMD_DOMAIN_MASK 0x000001e0 /* Bits 8:5: Domain control bits */
#define PMD_DOMAIN(x) ((x) << 5)
#define PMD_PROTECTION 0x00000200 /* Bit 9: v5 only */
/* Bits 31:10: Depend on descriptor */
/* Level 1 Section Descriptor. Section descriptors allow fast, single
* level mapping between 1Mb address regions.
*/
/* Bits 1:0: Type of mapping */
#define PMD_SECT_BUFFERABLE 0x00000004 /* Bit 2: 1=bufferable */
#define PMD_SECT_CACHEABLE 0x00000008 /* Bit 3: 1=cacheable */
/* Bit 4: Common, must be one */
/* Bits 8:5: Common domain control */
/* Bit 9: Common protection */
#define PMD_SECT_AP_MASK 0x00000c00 /* Bits 11:10: Access permission */
#define PMD_SECT_AP_WRITE 0x00000400
#define PMD_SECT_AP_READ 0x00000800
/* Bits 19:20: Should be zero */
#define PMD_SECT_TEX_MASK 0xfff00000 /* Bits 31:20: v5, Physical page */
#define PMD_SECT_APX 0x00008000 /* Bit 15: v6 only */
#define PMD_SECT_S 0x00010000 /* Bit 16: v6 only */
#define PMD_SECT_nG 0x00020000 /* Bit 17: v6 only */
#define PMD_SECT_UNCACHED (0)
#define PMD_SECT_BUFFERED (PMD_SECT_BUFFERABLE)
#define PMD_SECT_WT (PMD_SECT_CACHEABLE)
#define PMD_SECT_WB (PMD_SECT_CACHEABLE|PMD_SECT_BUFFERABLE)
#define PMD_SECT_MINICACHE (PMD_SECT_TEX(1)|PMD_SECT_CACHEABLE)
#define PMD_SECT_WBWA (PMD_SECT_TEX(1)|PMD_SECT_CACHEABLE|PMD_SECT_BUFFERABLE)
/* Level 1 Coarse Table Descriptor. Coarse Table Descriptors support
* two level mapping between 16Kb memory regions.
*/
/* Bits 1:0: Type of mapping */
/* Bits 3:2: Should be zero */
/* Bit 4: Common, must be one */
/* Bits 8:5: Common domain control */
/* Bits 9: Should be zero */
#define PMD_COARSE_TEX_MASK 0xfffffc00 /* Bits 31:10: v5, Physical page */
/* Level 1 Fine Table Descriptor. Coarse Table Descriptors support
* two level mapping between 4Kb memory regions.
*/
/* Bits 1:0: Type of mapping */
/* Bits 3:2: Should be zero */
/* Bit 4: Common, must be one */
/* Bits 8:5: Common domain control */
/* Bits 11:9: Should be zero */
#define PMD_FINE_TEX_MASK 0xfffff000 /* Bits 31:12: v5, Physical page */
/* Level 2 Table Descriptor (PTE). -- All tables */
#define PTE_TYPE_MASK (3 << 0) /* Bits: 1:0: Type of mapping */
#define PTE_TYPE_FAULT (0 << 0) /* None */
#define PTE_TYPE_LARGE (1 << 0) /* 64Kb of memory */
#define PTE_TYPE_SMALL (2 << 0) /* 4Kb of memory */
#define PTE_TYPE_TINY (3 << 0) /* 1Kb of memory (v5)*/
#define PTE_BUFFERABLE (1 << 2) /* Bit 2: 1=bufferable */
#define PTE_CACHEABLE (1 << 3) /* Bit 3: 1=cacheable */
/* Bits 31:4: Depend on type */
/* Large page -- 64Kb */
/* Bits: 1:0: Type of mapping */
/* Bits: 3:2: Bufferable/cacheable */
#define PTE_LARGE_AP_MASK (0xff << 4) /* Bits 11:4 Access permissions */
#define PTE_LARGE_AP_UNO_SRO (0x00 << 4)
#define PTE_LARGE_AP_UNO_SRW (0x55 << 4)
#define PTE_LARGE_AP_URO_SRW (0xaa << 4)
#define PTE_LARGE_AP_URW_SRW (0xff << 4)
/* Bits 15:12: Should be zero */
#define PTE_LARGE_TEX_MASK 0xffff0000 /* Bits 31:16: v5, Physical page */
/* Small page -- 4Kb */
/* Bits: 1:0: Type of mapping */
/* Bits: 3:2: Bufferable/cacheable */
#define PTE_SMALL_AP_MASK (0xff << 4) /* Bits: 11:4: Access permissions */
#define PTE_SMALL_AP_UNO_SRO (0x00 << 4)
#define PTE_SMALL_AP_UNO_SRW (0x55 << 4)
#define PTE_SMALL_AP_URO_SRW (0xaa << 4)
#define PTE_SMALL_AP_URW_SRW (0xff << 4)
#define PTE_SMALL_TEX_MASK 0xfffff000 /* Bits: 31:12: Physical page */
/* Tiny page -- 1Kb */
/* Bits: 1:0: Type of mapping */
/* Bits: 3:2: Bufferable/cacheable */
#define PTE_EXT_AP_MASK (3 << 4) /* Bits: 5:4: Access persions */
#define PTE_EXT_AP_UNO_SRO (0 << 4)
#define PTE_EXT_AP_UNO_SRW (1 << 4)
#define PTE_EXT_AP_URO_SRW (2 << 4)
#define PTE_EXT_AP_URW_SRW (3 << 4)
/* Bits: 9:6: Should be zero */
#define PTE_TINY_TEX_MASK 0xfffffc00 /* Bits: 31:10: Physical page */
/* Default MMU flags for memory and IO */
#define MMU_MEMFLAGS \
(PMD_TYPE_SECT|PMD_SECT_WB|PMD_BIT4|PMD_SECT_AP_WRITE|PMD_SECT_AP_READ)
#define MMU_IOFLAGS \
(PMD_TYPE_SECT|PMD_BIT4|PMD_SECT_AP_WRITE|PMD_SECT_AP_READ)
#define MMU_L1_VECTORFLAGS (PMD_TYPE_COARSE|PMD_BIT4)
#define MMU_L2_VECTORFLAGS (PTE_TYPE_SMALL|PTE_SMALL_AP_UNO_SRW)
/* Mapped section size */
#define SECTION_SIZE (1 << 20) /* 1Mb */
/* We place the page tables 16K below the beginning of .text. The
* following value is assume to be the (virtual) start address of
* .text. Currently, we expect the least significant 16 bits to be
* 0x4000, but we could probably relax this restriction.
*/
#define PGTABLE_SIZE 0x00004000
#define NUTTX_START_VADDR (DM320_SDRAM_VADDR+PGTABLE_SIZE)
/************************************************************************************
* Inline Functions
************************************************************************************/
#ifndef __ASSEMBLY__
#endif
#endif /* __ARM9_H */
+105
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/************************************************************************************
* dm320.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __DM320_INTC_H
#define __DM320_INTC_H
/************************************************************************************
* Included Files
************************************************************************************/
#ifndef __ASSEMBLY__
# include <sys/types.h>
#endif
/************************************************************************************
* Definitions
************************************************************************************/
/* Interrupt Controller Registers */
#define DM320_INTC_FIQ0 (DM320_PERIPHERALS_VADDR + 0x0500) /* FIQ Interrupt Flag Register #0 */
#define DM320_INTC_FIQ1 (DM320_PERIPHERALS_VADDR + 0x0502) /* FIQ Interrupt Flag Register #1 */
#define DM320_INTC_FIQ2 (DM320_PERIPHERALS_VADDR + 0x0504) /* FIQ Interrupt Flag Register #2 */
#define DM320_INTC_IRQ0 (DM320_PERIPHERALS_VADDR + 0x0508) /* IRQ Interrupt Flag Register #0 */
#define DM320_INTC_IRQ1 (DM320_PERIPHERALS_VADDR + 0x050A) /* IRQ Interrupt Flag Register #1 */
#define DM320_INTC_IRQ2 (DM320_PERIPHERALS_VADDR + 0x050C) /* IRQ Interrupt Flag Register #2 */
#define DM320_INTC_FIQENTRY0 (DM320_PERIPHERALS_VADDR + 0x0510) /* FIQ Entry Address Register #0 */
#define DM320_INTC_FIQENTRY1 (DM320_PERIPHERALS_VADDR + 0x0512) /* FIQ Entry Address Register #1 */
#define DM320_INTC_FIQENTLCK0 (DM320_PERIPHERALS_VADDR + 0x0514) /* FIQ Lock Entry Address Register #1 */
#define DM320_INTC_FIQENTLCK1 (DM320_PERIPHERALS_VADDR + 0x0516) /* FIQ Lock Entry Address Register #1 */
#define DM320_INTC_IRQENTRY0 (DM320_PERIPHERALS_VADDR + 0x0518) /* IRQ Entry Address Register #0 */
#define DM320_INTC_IRQENTRY1 (DM320_PERIPHERALS_VADDR + 0x051A) /* IRQ Entry Address Register #1 */
#define DM320_INTC_IRQENTLCK0 (DM320_PERIPHERALS_VADDR + 0x051C) /* IRQ Lock Entry Address Register #1 */
#define DM320_INTC_IRQENTLCK1 (DM320_PERIPHERALS_VADDR + 0x051E) /* Lock Entry Address Register #1 */
#define DM320_INTC_FISEL0 (DM320_PERIPHERALS_VADDR + 0x0520) /* FIQ select register #0 */
#define DM320_INTC_FISEL1 (DM320_PERIPHERALS_VADDR + 0x0522) /* FIQ select register #1 */
#define DM320_INTC_FISEL2 (DM320_PERIPHERALS_VADDR + 0x0524) /* FIQ select register #2 */
#define DM320_INTC_EINT0 (DM320_PERIPHERALS_VADDR + 0x0528) /* Interrupt Enable Register #0 */
#define DM320_INTC_EINT1 (DM320_PERIPHERALS_VADDR + 0x052A) /* Interrupt Enable Register #1 */
#define DM320_INTC_EINT2 (DM320_PERIPHERALS_VADDR + 0x052C) /* Interrupt Enable Register #2 */
#define DM320_INTC_INTRAW (DM320_PERIPHERALS_VADDR + 0x0530) /* Interrupt Raw Register */
#define DM320_INTC_EABASE0 (DM320_PERIPHERALS_VADDR + 0x0538) /* Entry Table Base Address Register #0 */
#define DM320_INTC_EABASE1 (DM320_PERIPHERALS_VADDR + 0x053A) /* Entry Table Base Address Register #1 */
#define DM320_INTC_INTPRI00 (DM320_PERIPHERALS_VADDR + 0x0540) /* Interrupt Priority Register #0 */
#define DM320_INTC_INTPRI01 (DM320_PERIPHERALS_VADDR + 0x0542) /* Interrupt Priority Register #1 */
#define DM320_INTC_INTPRI02 (DM320_PERIPHERALS_VADDR + 0x0544) /* Interrupt Priority Register #2 */
#define DM320_INTC_INTPRI03 (DM320_PERIPHERALS_VADDR + 0x0546) /* Interrupt Priority Register #3 */
#define DM320_INTC_INTPRI04 (DM320_PERIPHERALS_VADDR + 0x0548) /* Interrupt Priority Register #4 */
#define DM320_INTC_INTPRI05 (DM320_PERIPHERALS_VADDR + 0x054A) /* Interrupt Priority Register #5 */
#define DM320_INTC_INTPRI06 (DM320_PERIPHERALS_VADDR + 0x054C) /* Interrupt Priority Register #6 */
#define DM320_INTC_INTPRI07 (DM320_PERIPHERALS_VADDR + 0x054E) /* Interrupt Priority Register #7 */
#define DM320_INTC_INTPRI08 (DM320_PERIPHERALS_VADDR + 0x0550) /* Interrupt Priority Register #8 */
#define DM320_INTC_INTPRI09 (DM320_PERIPHERALS_VADDR + 0x0552) /* Interrupt Priority Register #9 */
#define DM320_INTC_INTPRI10 (DM320_PERIPHERALS_VADDR + 0x0554) /* Interrupt Priority Register #10 */
#define DM320_INTC_INTPRI11 (DM320_PERIPHERALS_VADDR + 0x0556) /* Interrupt Priority Register #11 */
#define DM320_INTC_INTPRI12 (DM320_PERIPHERALS_VADDR + 0x0558) /* Interrupt Priority Register #12 */
#define DM320_INTC_INTPRI13 (DM320_PERIPHERALS_VADDR + 0x055A) /* Interrupt Priority Register #13 */
#define DM320_INTC_INTPRI14 (DM320_PERIPHERALS_VADDR + 0x055C) /* Interrupt Priority Register #14 */
#define DM320_INTC_INTPRI15 (DM320_PERIPHERALS_VADDR + 0x055E) /* Interrupt Priority Register #15 */
#define DM320_INTC_INTPRI16 (DM320_PERIPHERALS_VADDR + 0x0560) /* Interrupt Priority Register #16 */
#define DM320_INTC_INTPRI17 (DM320_PERIPHERALS_VADDR + 0x0562) /* Interrupt Priority Register #17 */
#define DM320_INTC_INTPRI18 (DM320_PERIPHERALS_VADDR + 0x0564) /* Interrupt Priority Register #18 */
#define DM320_INTC_INTPRI19 (DM320_PERIPHERALS_VADDR + 0x0566) /* Interrupt Priority Register #19 */
/************************************************************************************
* Inline Functions
************************************************************************************/
#ifndef __ASSEMBLY__
#endif
#endif /* __DM320_INTC_H */
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/************************************************************************************
* dm320-memorymap.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __DM320_MEMORYMAP_H
#define __DM320_MEMORYMAP_H
/************************************************************************************
* Included Files
************************************************************************************/
#ifndef __ASSEMBLY__
# include <sys/types.h>
#endif
/************************************************************************************
* Definitions
************************************************************************************/
/* Mapped base of all registers *****************************************************/
/* DM320 Physical Memory Map, where:
*
* CW = cachable with write buffering
* -W = Write buffering only
* -- = Neither
*
* The DM320 only has a single control line for external peripherals.
* To support more than one peripheral, most hardware will use an
* external memory decode logic, so that physical memory regions is
* in the hardware specific files dm320-*.h
*/
/* Section/Region Name Phys Address Size TLB Enty CW */
#define DM320_PERIPHERALS_PSECTION 0x00000000 /* 1Mb 1 section -- */
#define DM320_IRAM_PADDR 0x00000000 /* 16Kb 1 large page CW */
#define DM320_PERIPHERALS_PADDR 0x00030000 /* 4Kb 1 small pages -- */
#define DM320_DSP_ONCHIP_RAM_PADDR 0x00040000 /* 128Kb 1 large page -- */
#define DM320_AHB_PADDR 0x00060000 /* 4Kb 1 small page -- */
#define DM320_COPRO_SUB_PADDR 0x00080000 /* 128Kb -- */
#define DM320_FLASH_PSECTION 0x00100000 /* 16Mb many sections -- */
#define DM320_EXT_MEM_PADDR 0x00100000 /* 16Mb flash -- */
#define DM320_SDRAM_PSECTION 0x01000000 /* 496Mb many section -- */
#define DM320_SDRAM_PADDR 0x01000000 /* 496Mb many sections CW */
#define DM320_CFI_PSECTION 0x40000000 /* 16Mb 16 sections -- */
#define DM320_CFI_PADDR 0x40000000 /* 16Mb 16 sections -- */
#define DM320_SSFDC_PSECTION 0x48000000 /* 16Mb 16 sections -- */
#define DM320_SSFDC_PADDR 0x48000000 /* 16Mb 16 sections -- */
#define DM320_CE1_PSECTION 0x50000000 /* 16Mb 16 sections -- */
#define DM320_CE1_PADDR 0x50000000 /* 16Mb 16 sections -- */
#define DM320_CE2_PSECTION 0x60000000 /* 16Mb 16 sections -- */
#define DM320_CE2_PADDR 0x60000000 /* 16Mb 16 sections -- */
#define DM320_VLYNQ_PSECTION 0x70000000 /* 64MB 64 sections -- */
#define DM320_VLYNQ_PADDR 0x70000000 /* 64MB 64 sections -- */
#define DM320_USBOTG_PSECTION 0x80000000 /* 1Mb 1 section -- */
#define DM320_USBOTG_PADDR 0x80000000 /* 1Kb 1 small page -- */
/* Sizes of sections/regions */
/* Section / Region Name Size */
#define DM320_PERIPHERALS_NSECTIONS 1 /* 1Mb 1 section -- */
#define DM320_IRAM_SIZE (16*1024)
#define DM320_PERIPHERALS_SIZE (4*1024)
#define DM320_DSP_ONCHIP_RAM_SIZE (128*1024)
#define DM320_AHB_SIZE (4*1024)
#define DM320_COPRO_SUB_SIZE (128*1024)
#define DM320_FLASH_NSECTIONS 16 /* 16Mb 16 sections -- */
#define DM320_EXT_MEM_SIZE (16*1024*1024)
#define DM320_CFI_NSECTIONS 16 /* 16Mb 16 sections -- */
#define DM320_CFI_SIZE (16*1024*1024)
#define DM320_SSFDC_NSECTIONS 16 /* 16Mb 16 sections -- */
#define DM320_SSFDC_SIZE (16*1024*1024)
#define DM320_CE1_NSECTIONS 16 /* 16Mb 16 sections -- */
#define DM320_CE1_SIZE (16*1024*1024)
#define DM320_CE2_NSECTIONS 16 /* 16Mb 16 sections -- */
#define DM320_CE2_SIZE (16*1024*1024)
#define DM320_VLYNQ_NSECTIONS 64 /* 64MB 64 sections -- */
#define DM320_VLYNQ_SIZE (64*1024*1024)
#define DM320_USBOTG_NSECTIONS 1 /* 1Mb 1 section -- */
#define DM320_USBOTG_SIZE (1024)
/* DM320 Virtual Memory Map */
/* Section/Region Name Virt Address End Size CW */
#define DM320_SDRAM_VSECTION 0x00000000 /* 0x1effffff 496Mb CW */
#define DM320_SDRAM_VADDR 0x00000000 /* 0x1effffff 496Mb CW */
/* 0x1f000000 0xdfffffff UNMAPPED */
#define DM320_FLASH_VSECTION 0xc0000000 /* 0xc0ffffff 16Mb -- */
#define DM320_EXT_MEM_VADDR 0xc0000000 /* 0xc0ffffff 16Mb -- */
#define DM320_CFI_VSECTION 0xc4000000 /* 0xc4ffffff 16Mb -- */
#define DM320_CFI_VADDR 0xc4000000 /* 0xc4ffffff 16Mb -- */
#define DM320_SSFDC_VSECTION 0xc8000000 /* 0xc8ffffff 16Mb -- */
#define DM320_SSFDC_VADDR 0xc8000000 /* 0xc8ffffff 16Mb -- */
#define DM320_CE1_VSECTION 0xcc000000 /* 0xccffffff 16Mb -- */
#define DM320_CE1_VADDR 0xcc000000 /* 0xccffffff 16Mb -- */
#define DM320_CE2_VSECTION 0xd0000000 /* 0xd0ffffff 16Mb -- */
#define DM320_CE2_VADDR 0xd0000000 /* 0xd0ffffff 16Mb -- */
#define DM320_USBOTG_VSECTION 0xd4000000 /* 0xd40fffff 1Mb -- */
#define DM320_USBOTG_VADDR 0xd4000000 /* 0xd40003ff 1Kb -- */
#define DM320_VLYNQ_VSECTION 0xe0000000 /* 0xefffffff 64Mb -- */
#define DM320_VLYNQ_VADDR 0xe0000000 /* 0xefffffff 64Mb -- */
#define DM320_PERIPHERALS_VSECTION 0xf0000000 /* 0xf00fffff 1Mb -- */
#define DM320_IRAM_VADDR 0xf0000000 /* 0xf0003fff 16Kb -- */
#define DM320_PERIPHERALS_VADDR 0xf0030000 /* 0xf0030fff 4Kb -- */
#define DM320_DSP_ONCHIP_RAM_VADDR 0xf0040000 /* 0xf005ffff 128Kb -- */
#define DM320_AHB_VADDR 0xf0060000 /* 0xf0060fff 4Kb -- */
#define DM320_COPRO_SUB_VADDR 0xf0080000 /* 0xf009ffff 128Kb -- */
/* 0xf0100000 0xffefffff UNMAPPED */
#define DM320_VECTOR_VCOARSE 0xfff00000 /* 0xffffffff 1Mb -- */
/* 0xfff00000 0xfffeffff UNMAPPED */
#define DM320_VECTOR_VADDR 0xffff0000 /* 0xffff3fff 16Kb -- */
/* 0xffff4000 0xffffffff UNMAPPED */
/* Section MMU Flags Flags CW */
#define DM320_FLASH_MMUFLAGS MMU_IOFLAGS /* -- */
#define DM320_CFI_MMUFLAGS MMU_IOFLAGS /* -- */
#define DM320_SSFDC_MMUFLAGS MMU_IOFLAGS /* -- */
#define DM320_CE1_MMUFLAGS MMU_IOFLAGS /* -- */
#define DM320_CE2_MMUFLAGS MMU_IOFLAGS /* -- */
#define DM320_VLYNQ_MMUFLAGS MMU_IOFLAGS /* -- */
#define DM320_USBOTG_MMUFLAGS MMU_IOFLAGS /* -- */
#define DM320_PERIPHERALS_MMUFLAGS MMU_IOFLAGS /* -- */
/* 16Kb of memory is reserved at the beginning of SDRAM to hold the
* page table for the virtual mappings. A portion of this table is
* not accessible in the virtual address space (for normal operation).
* We will reuse this memory for coarse page tables as follows:
*/
#define PGTABLE_BASE_PADDR DM320_SDRAM_PADDR
#define PGTABLE_SDRAM_PADDR PGTABLE_BASE_PADDR
#define PGTABLE_COARSE_BASE_PADDR (PGTABLE_BASE_PADDR+0x00000800)
#define PGTABLE_COARSE_END_PADDR (PGTABLE_BASE_PADDR+0x00003000)
#define PTTABLE_PERIPHERALS_PADDR (PGTABLE_BASE_PADDR+0x00003000)
#define PGTABLE_END_PADDR (PGTABLE_BASE_PADDR+0x00004000)
#define PGTABLE_BASE_VADDR DM320_SDRAM_VADDR
#define PGTABLE_SDRAM_VADDR PGTABLE_BASE_VADDR
#define PGTABLE_COARSE_BASE_VADDR (PGTABLE_BASE_VADDR+0x00000800)
#define PGTABLE_COARSE_END_VADDR (PGTABLE_BASE_VADDR+0x00003000)
#define PTTABLE_PERIPHERALS_VADDR (PGTABLE_BASE_VADDR+0x00003000)
#define PGTABLE_END_VADDR (PGTABLE_BASE_VADDR+0x00004000)
#define PGTBALE_COARSE_TABLE_SIZE (4*256)
#define PGTABLE_COARSE_ALLOC (PGTABLE_COARSE_END_VADDR-PGTABLE_COARSE_BASE_VADDR)
#define PGTABLE_NCOARSE_TABLES (PGTABLE_COARSE_SIZE / PGTBALE_COARSE_TABLE_ALLOC)
/* This is the base address of the interrupt vectors on the ARM926 */
#define VECTOR_BASE DM320_VECTOR_VADDR
/* DM320 Peripheral Registers */
#define DM320_TIMER0_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0000) /* Timer 0 */
#define DM320_TIMER1_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0080) /* Timer 1 */
#define DM320_TIMER2_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0100) /* Timer 2 */
#define DM320_TIMER3_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0180) /* Timer 3 */
#define DM320_SERIAL0_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0200) /* Serial port 0 */
#define DM320_SERIAL1_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0280) /* Serial port 1 */
#define DM320_UART0_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0300) /* UART 0 */
#define DM320_UART1_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0380) /* UART 1 */
#define DM320_WDT_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0400) /* Watchdog timer */
#define DM320_MMCSD_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0480) /* MMC/SD */
#define DM320_INTC_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0500) /* Interrupt controller */
#define DM320_GIO_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0580) /* GIO */
#define DM320_DSPC_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0600) /* DSP controller */
#define DM320_OSD_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0680) /* OSD */
#define DM320_CCDC_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0700) /* CCD controller */
#define DM320_VENC_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0800) /* Video encoder */
#define DM320_CLKC_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0880) /* Clock controller */
#define DM320_BUSC_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0900) /* Bus controller */
#define DM320_SDRAMC_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0980) /* SDRAM controller */
#define DM320_EMIF_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0A00) /* External memory interface */
#define DM320_PREV_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0A80) /* Preview engine */
#define DM320_AF_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0B80) /* Hardware 3A (AF/AE/AWB) */
#define DM320_MSTICK_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0C80) /* Memory stick */
#define DM320_I2C_REGISTER_BASE (DM320_PERIPHERALS_VADDR + 0x0D80) /* I2C */
#define DM320_USB_REGISTER_BASE (DM320_USBOTG_VADDR + 0x0000) /* USB full speed OTG */
#define DM320_USBDMA_REGISTER_BASE (DM320_USBOTG_VADDR + 0x0200) /* USB DMA */
#define DM320_VLYNQ_REGISTER_BASE (DM320_AHB_VADDR + 0x0300) /* VLYNQ */
#define DM320_AHBBUSC_REGISTER_BASE (DM320_AHB_VADDR + 0x0F00) /* AHBBUSC */
/************************************************************************************
* Inline Functions
************************************************************************************/
#ifndef __ASSEMBLY__
#endif
#endif /* __DM320_MEMORYMAP_H */
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/************************************************************************************
* dm320-timer.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __DM320_TIMER_H
#define __DM320_TIMER_H
/************************************************************************************
* Included Files
************************************************************************************/
#ifndef __ASSEMBLY__
# include <sys/types.h>
#endif
/************************************************************************************
* Definitions
************************************************************************************/
/* Timer Registers */
#define DM320_TIMER0_TMMD (DM320_PERIPHERALS_VADDR + 0x0000) /* Timer 0 Mode */
#define DM320_TIMER0_TMPRSCL (DM320_PERIPHERALS_VADDR + 0x0004) /* Timer 0 Prescalar */
#define DM320_TIMER0_TMDIV (DM320_PERIPHERALS_VADDR + 0x0006) /* Timer 0 Divisor (count) */
#define DM320_TIMER0_TMTRG (DM320_PERIPHERALS_VADDR + 0x0008) /* Timer 0 One-Shot Trigger */
#define DM320_TIMER0_TMCNT (DM320_PERIPHERALS_VADDR + 0x000A) /* Timer 0 Count */
#define DM320_TIMER1_TMMD (DM320_PERIPHERALS_VADDR + 0x0080) /* Timer 1 Mode */
#define DM320_TIMER1_TMPRSCL (DM320_PERIPHERALS_VADDR + 0x0084) /* Timer 1 Prescalar */
#define DM320_TIMER1_TMDIV (DM320_PERIPHERALS_VADDR + 0x0086) /* Timer 1 Divisor (count) */
#define DM320_TIMER1_TMTRG (DM320_PERIPHERALS_VADDR + 0x0088) /* Timer 1 One-Shot Trigger */
#define DM320_TIMER1_TMCNT (DM320_PERIPHERALS_VADDR + 0x008A) /* Timer 1 Count */
#define DM320_TIMER2_TMMD (DM320_PERIPHERALS_VADDR + 0x0100) /* Timer 2 Mode */
#define DM320_TIMER2_TMPRSCL (DM320_PERIPHERALS_VADDR + 0x0104) /* Timer 2 Prescalar */
#define DM320_TIMER2_TMDIV (DM320_PERIPHERALS_VADDR + 0x0106) /* Timer 2 Divisor (count) */
#define DM320_TIMER2_TMTRG (DM320_PERIPHERALS_VADDR + 0x0108) /* Timer 2 One-Shot Trigger */
#define DM320_TIMER2_TMCNT (DM320_PERIPHERALS_VADDR + 0x010A) /* Timer 2 Count */
#define DM320_TIMER3_TMMD (DM320_PERIPHERALS_VADDR + 0x0180) /* Timer 2 Mode */
#define DM320_TIMER3_TMPRSCL (DM320_PERIPHERALS_VADDR + 0x0184) /* Timer 2 Prescalar */
#define DM320_TIMER3_TMDIV (DM320_PERIPHERALS_VADDR + 0x0186) /* Timer 2 Divisor (count) */
#define DM320_TIMER3_TMTRG (DM320_PERIPHERALS_VADDR + 0x0188) /* Timer 2 One-Shot Trigger */
#define DM320_TIMER3_TMCNT (DM320_PERIPHERALS_VADDR + 0x018A) /* Timer 2 Count */
/* Timer 0,1,2,3 Mode Register Bits: */
#define DM320_TMR_MODE_TEST_MASK 0x00fc /* Bits 7:2=Test */
#define DM320_TMR_MODE_MODE_MASK 0x0003 /* Bits 1:0=timer mode */
# define DM320_TMR_MODE_STOP 0x0000 /* Stop Timer */
# define DM320_TMR_MODE_ONESHOT 0x0001 /* Start one-shot timer */
# define DM320_TMR_MODE_FREERUN 0x0002 /* Start free-running timer */
/* Timer 0,1,2,3 Clock Select Register Bits: */
#define DM320_TMR_PRSCL_MASK 0x03ff /* Bits 0:9=Timer prescale value */
/* Timer 0,1,2,3 Clock Divisor (Count) Register Bits: */
#define DM320_TMR_DIV_MASK 0xffff /* Bits 0:15=Timer divisor value */
/* Timer 0,1,2,3 Timer One-Short Trigger Register Bits: */
#define DM320_TMR_TMTRG_MASK 0x0001 /* Bit 0=One short trigger */
# define DM320_TMR_TMTRG_START 0x0001 /* 1 starts one shot timer */
/* Timer 0,1,2,3 Timer Counter Register Bits: */
#define DM320_TMR_COUNT_MASK 0xffff /* Bits 0:15=Current counter value */
/************************************************************************************
* Inline Functions
************************************************************************************/
#ifndef __ASSEMBLY__
#endif
#endif /* __DM320_TIMER_H */
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/************************************************************************************
* dm320-uart.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __DM320_UART_H
#define __DM320_UART_H
/************************************************************************************
* Included Files
************************************************************************************/
#ifndef __ASSEMBLY__
# include <sys/types.h>
#endif
/************************************************************************************
* Definitions
************************************************************************************/
/* UART definitions *****************************************************************/
/* UART Registers (offsets from the register base) */
#define UART_DTRR 0 /* Data Transmission/Reception Register */
#define UART_BRSR 2 /* Bit Rate Set Register */
#define UART_MSR 4 /* Mode Set Register */
#define UART_RFCR 6 /* Reception FIFO Control Register */
#define UART_TFCR 8 /* Transmission FIFO Control Register */
#define UART_LCR 10 /* Line Control Register */
#define UART_SR 12 /* Status Register */
/* UART DTRR register bit definitions */
#define UART_DTRR_RVF 0x1000 /* Receive word valid flag */
#define UART_DTRR_BF 0x0800 /* Break flag */
#define UART_DTRR_FE 0x0400 /* Framing error */
#define UART_DTRR_ORF 0x0200 /* Overrun flag */
#define UART_DTRR_PEF 0x0100 /* Parity error */
#define UART_DTRR_DTR_MAS K 0x00ff /* Data transmit/receive */
/* UART BRSR register bit definitions */
/* The UART clock is half of the ARM clock */
#define UART_CLK (DM320_ARM_CLOCK / 2)
/* And baud rate = UART_CLK / 16 / (VALUE+1) */
#define UART_BAUD_2400 ((uint16)(((UART_CLK / 16) / 2400 ) - 1))
#define UART_BAUD_4800 ((uint16)(((UART_CLK / 16) / 4800 ) - 1))
#define UART_BAUD_9600 ((uint16)(((UART_CLK / 16) / 9600 ) - 1))
#define UART_BAUD_14400 ((uint16)(((UART_CLK / 16) / 14400 ) - 1))
#define UART_BAUD_19200 ((uint16)(((UART_CLK / 16) / 19200 ) - 1))
#define UART_BAUD_28800 ((uint16)(((UART_CLK / 16) / 28800 ) - 1))
#define UART_BAUD_38400 ((uint16)(((UART_CLK / 16) / 38400 ) - 1))
#define UART_BAUD_57600 ((uint16)(((UART_CLK / 16) / 57600 ) - 1))
#define UART_BAUD_115200 ((uint16)(((UART_CLK / 16) / 115200) - 1))
#define UART_BAUD_230400 ((uint16)(((UART_CLK / 16) / 230400) - 1))
#define UART_BAUD_460800 ((uint16)(((UART_CLK / 16) / 460800) - 1))
#define UART_BAUD_921600 ((uint16)(((UART_CLK / 16) / 921600) - 1))
/* UART MSR register bit definitions */
#define UART_MSR_MODE_BITS 0x001f /* Aata length, stop, & parity */
#define UART_MSR_CLS 0x0001 /* Char length (1=7bit, 0=8bit) */
#define UART_DATABIT_7 0x0001 /* Data bit = 7bit */
#define UART_DATABIT_8 0x0000 /* Data bit = 8bit */
#define UART_MSR_SBLS 0x0004 /* Stop bit length selection */
#define UART_STOPBIT_1 0x0000 /* Stop bit = 1bit */
#define UART_STOPBIT_2 0x0004 /* Stop bit = 2bit */
#define UART_MSR_PSB 0x0008 /* Parity selection bit */
#define UART_MSR_PEB 0x0010 /* Parity enable bit */
#define UART_NOPARITY 0x0000 /* No-parity */
#define UART_ODDPARITY 0x0018 /* Odd parity */
#define UART_EVENPARITY 0x0010 /* Even parity */
#define UART_MSR_RTSC 0x0020 /* RTS receive FIFO control */
#define UART_MSR_CSTC 0x0040 /* CTS send control */
#define UART_MSR_TOIC_MASK 0x0c00 /* Timeout interrupt control */
#define UART_MSR_TOIC_DIS 0x0000 /* Disabled */
#define UART_MSR_TOIC_3 0x0400 /* 3 bytes */
#define UART_MSR_TOIC_7 0x0800 /* 7 bytes */
#define UART_MSR_TOIC_15 0x0c00 /* 15 bytes */
#define UART_MSR_ALLIE 0xfc00 /* All interrupt bits */
#define UART_MSR_LSIE 0x1000 /* Line status change int. enable */
#define UART_MSR_REIE 0x2000 /* Receive error interrupt enable */
#define UART_MSR_TFTIE 0x4000 /* Transmit FIFO trigger int. enable */
#define UART_MSR_RFTIE 0x8000 /* Receive FIFO trigger int. enable */
#define UART_MSR_INIT (UART_NOPARITY | UART_STOPBIT_1 | UART_DATABIT_8)
/* UART RFCR register bit definitions */
#define UART_RFCR_RWC_MASK 0x003f /* Receive byte count */
#define UART_RFCR_RTL_MASK 0x0700 /* Receive trigger level */
#define UART_RFCR_RTL_1 0x0000 /* 1 byte */
#define UART_RFCR_RTL_4 0x0100 /* 4 bytes */
#define UART_RFCR_RTL_8 0x0200 /* 8 bytes */
#define UART_RFCR_RTL_16 0x0300 /* 16 bytes */
#define UART_RFCR_RTL_24 0x0400 /* 24 bytes */
#define UART_RFCR_RTL_32 0x0500 /* 32 bytes */
#define UART_RFCR_RDEF 0x4000 /* Receive data error flag */
#define UART_RFCR_RFCB 0x8000 /* Receive FIFO clear bit */
/* UART TFCR register bit definitions */
#define UART_TFCR_TWC_MASK 0x003f /* Transmit byte count */
#define UART_TFCR_TTL_MASK 0x0700 /* Transmit trigger level */
#define UART_TFCR_TTL_1 0x0000 /* 1 byte */
#define UART_TFCR_TTL_4 0x0100 /* 4 bytes */
#define UART_TFCR_TTL_8 0x0200 /* 8 bytes */
#define UART_TFCR_TTL_16 0x0300 /* 16 bytes */
#define UART_TFCR_TTL_24 0x0400 /* 24 bytes */
#define UART_TFCR_TTL_32 0x0500 /* 32 bytes */
#define UART_TFCR_TFCB 0x8000 /* Transmit FIFO clear bit */
/* UART LCR register bit definitions */
#define UART_LCR_RTS 0x0004 /* Current RTS value */
#define UART_LCR_CTS 0x0010 /* Current CTS value */
#define UART_LCR_DSR 0x0080 /* Current DSR value */
#define UART_LCR_BOC 0x0100 /* Break output control */
#define UART_LCR_UTST 0x4000 /* Test mode setting */
#define UART_LCR_INIT 0x0000
/* UART SR register bit definitions */
#define UART_SR_TREF 0x0001 /* Transmit register empty flag */
#define UART_SR_TFEF 0x0002 /* Transmit FIFO empty flag */
#define UART_SR_RFNEF 0x0004 /* Receive FIFO not empty flag */
#define UART_SR_TOIF 0x0100 /* Timeout Interrupt flag */
#define UART_SR_RFER 0x0200 /* Receive data error flag */
#define UART_SR_TFTI 0x0400 /* Transmit FIFO trigger level */
#define UART_SR_RFTI 0x0800 /* Receive FIFO trigger level */
#define UART_SR_CTSS 0x1000 /* CTS status */
#define UART_SR_DSRS 0x8000 /* DSR status */
/************************************************************************************
* Inline Functions
************************************************************************************/
#endif /* __DM320_UART_H */
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/************************************************************************************
* dm320.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __DM320_H
#define __DM320_H
/************************************************************************************
* Included Files
************************************************************************************/
#ifndef __ASSEMBLY__
# include <sys/types.h>
#endif
#include "arm9.h"
#include "ntosd.h"
#include "dm320-memorymap.h"
#include "dm320-uart.h"
#include "dm320-timer.h"
#include "dm320-intc.h"
/************************************************************************************
* Definitions
************************************************************************************/
/************************************************************************************
* Inline Functions
************************************************************************************/
#ifndef __ASSEMBLY__
# define getreg8(a) (*(volatile ubyte *)(a))
# define putreg8(v,a) (*(volatile ubyte *)(a) = (v))
# define getreg32(a) (*(volatile uint32 *)(a))
# define putreg32(v,a) (*(volatile uint32 *)(a) = (v))
/* Some compiler options will convert short loads and stores into byte loads
* and stores. We don't want this to happen for IO reads and writes!
*/
/* # define getreg16(a) (*(volatile uint16 *)(a)) */
static inline uint16 getreg16(unsigned int addr)
{
uint16 retval;
__asm__ __volatile__("\tldrh %0, [%1]\n\t" : "=r"(retval) : "r"(addr));
return retval;
}
/* define putreg16(v,a) (*(volatile uint16 *)(a) = (v)) */
static inline void putreg16(uint16 val, unsigned int addr)
{
__asm__ __volatile__("\tstrh %0, [%1]\n\t": : "r"(val), "r"(addr));
}
/* Most DM320 registers are 16-bits wide */
#define getreg(a) getreg16(1)
#define putreg(v,a) putreg16(v,a)
#endif
#endif /* __DM320_H */
+67
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/************************************************************************************
* ntosd.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __NTOSD_H
#define __NTOSD_H
/************************************************************************************
* Included Files
************************************************************************************/
#ifndef __ASSEMBLY__
# include <sys/types.h>
#endif
/************************************************************************************
* Definitions
************************************************************************************/
/* This platform has the ARM at 175 MHz and the DSP at 101.25 MHz */
#define DM320_ARM_CLOCK 175500000
#define DM320_SDR_CLOCK 101250000
#define DM320_DSP_CLOCK 101250000
#define DM320_AXL_CLOCK 175500000
#define DM320_AHB_CLOCK 87750000
/************************************************************************************
* Inline Functions
************************************************************************************/
#ifndef __ASSEMBLY__
#endif
#endif /* __NTOSD_H */
+77
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/************************************************************
* up_allocateheap.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
#include <nuttx/arch.h>
#include "up_internal.h"
/************************************************************
* Private Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Functions
************************************************************/
/************************************************************
* Public Functions
************************************************************/
/************************************************************
* Name: up_allocate_heap
*
* Description:
* The heap may be statically allocated by
* defining CONFIG_HEAP_BASE and CONFIG_HEAP_SIZE. If these
* are not defined, then this function will be called to
* dynamically set aside the heap region.
*
************************************************************/
void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
{
*heap_start = (FAR void*)g_heapbase;
*heap_size = (CONFIG_DRAM_START + CONFIG_DRAM_SIZE) - g_heapbase;
}
+180
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/************************************************************
* up_assert.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdlib.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Functions
************************************************************/
/************************************************************
* Name: up_getsp
************************************************************/
/* I don't know if the builtin to get SP is enabled */
static inline uint32 up_getsp(void)
{
uint32 sp;
__asm__
(
"\tmov %0, sp\n\t"
: "=r"(sp)
);
return sp;
}
/************************************************************
* Name: up_stackdump
************************************************************/
#ifdef CONFIG_ARCH_STACKDUMP
static void up_stackdump(void)
{
_TCB *rtcb = (_TCB*)g_readytorun.head;
uint32 stack_base = (uint32)rtcb->adj_stack_ptr;
uint32 sp = up_getsp();
lldbg("stack_base: %08x\n", stack_base);
lldbg("stack_size: %08x\n", rtcb->adj_stack_size);
lldbg("sp: %08x\n", sp);
if (sp >= stack_base || sp < stack_base - rtcb->adj_stack_size)
{
lldbg("ERROR: Stack pointer is not within allocated stack\n");
return;
}
else
{
uint32 stack = sp & ~0x1f;
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32 *ptr = (uint32*)stack;
lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
}
}
#else
# define up_stackdump()
#endif
/************************************************************
* Name: _up_assert
************************************************************/
static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */
{
/* Are we in an interrupt handler or the idle task? */
if (current_regs || ((_TCB*)g_readytorun.head)->pid == 0)
{
(void)irqsave();
for(;;)
{
}
}
else
{
exit(errorcode);
}
}
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_assert
************************************************************/
void up_assert(const ubyte *filename, int lineno)
{
#if CONFIG_TASK_NAME_SIZE > 0
_TCB *rtcb = (_TCB*)g_readytorun.head;
#endif
#if CONFIG_TASK_NAME_SIZE > 0
lldbg("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
lldbg("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
up_stackdump();
_up_assert(EXIT_FAILURE);
}
/************************************************************
* Name: up_assert_code
************************************************************/
void up_assert_code(const ubyte *filename, int lineno, int errorcode)
{
#if CONFIG_TASK_NAME_SIZE > 0
_TCB *rtcb = (_TCB*)g_readytorun.head;
#endif
#if CONFIG_TASK_NAME_SIZE > 0
lldbg("Assertion failed at file:%s line: %d task: %s error code: %d\n",
filename, lineno, rtcb->name, errorcode);
#else
lldbg("Assertion failed at file:%s line: %d error code: %d\n",
filename, lineno, errorcode);
#endif
up_stackdump();
_up_assert(errorcode);
}
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/************************************************************
* up_blocktask.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/arch.h>
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Private Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Funtions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_block_task
*
* Description:
* The currently executing task at the head of
* the ready to run list must be stopped. Save its context
* and move it to the inactive list specified by task_state.
*
* Inputs:
* tcb: Refers to a task in the ready-to-run list (normally
* the task at the the head of the list). It most be
* stopped, its context saved and moved into one of the
* waiting task lists. It it was the task at the head
* of the ready-to-run list, then a context to the new
* ready to run task must be performed.
* task_state: Specifies which waiting task list should be
* hold the blocked task TCB.
*
************************************************************/
void up_block_task(_TCB *tcb, tstate_t task_state)
{
/* Verify that the context switch can be performed */
if ((tcb->task_state < FIRST_READY_TO_RUN_STATE) ||
(tcb->task_state > LAST_READY_TO_RUN_STATE))
{
PANIC(OSERR_BADBLOCKSTATE);
}
else
{
_TCB *rtcb = (_TCB*)g_readytorun.head;
boolean switch_needed;
/* Remove the tcb task from the ready-to-run list. If we
* are blocking the task at the head of the task list (the
* most likely case), then a context switch to the next
* ready-to-run task is needed. In this case, it should
* also be true that rtcb == tcb.
*/
switch_needed = sched_removereadytorun(tcb);
/* Add the task to the specified blocked task list */
sched_addblocked(tcb, (tstate_t)task_state);
/* If there are any pending tasks, then add them to the g_readytorun
* task list now
*/
if (g_pendingtasks.head)
{
switch_needed |= sched_mergepending();
}
/* Now, perform the context switch if one is needed */
if (switch_needed)
{
/* Are we in an interrupt handler? */
if (current_regs)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
*/
up_copystate(rtcb->xcp.regs, current_regs);
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
rtcb = (_TCB*)g_readytorun.head;
dbg("New Active Task TCB=%p\n", rtcb);
/* Then switch contexts */
up_copystate(current_regs, rtcb->xcp.regs);
}
/* Copy the user C context into the TCB at the (old) head of the
* g_readytorun Task list. if up_saveusercontext returns a non-zero
* value, then this is really the previously running task restarting!
*/
else if (!up_saveusercontext(rtcb->xcp.regs))
{
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
rtcb = (_TCB*)g_readytorun.head;
dbg("New Active Task TCB=%p\n", rtcb);
/* Then switch contexts */
up_fullcontextrestore(rtcb->xcp.regs);
}
}
}
}
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/************************************************************************************
* up_boot.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include "up_internal.h"
#include "dm320.h"
/************************************************************************************
* Private Types
************************************************************************************/
/************************************************************************************
* Private Types
************************************************************************************/
struct section_mapping_s
{
uint32 physbase; /* Physical address of the region to be mapped */
uint32 virtbase; /* Virtual address of the region to be mapped */
uint32 mmuflags; /* MMU settings for the region (e.g., cache-able) */
uint32 nsections; /* Number of mappings in the region */
};
/************************************************************************************
* Public Variables
************************************************************************************/
extern uint32 _vector_start; /* Beginning of vector block */
extern uint32 _vector_end; /* End+1 of vector block */
/************************************************************************************
* Private Variables
************************************************************************************/
static const struct section_mapping_s section_mapping[] =
{
{ DM320_PERIPHERALS_PSECTION, DM320_PERIPHERALS_VSECTION,
DM320_PERIPHERALS_MMUFLAGS, DM320_PERIPHERALS_NSECTIONS},
{ DM320_FLASH_PSECTION, DM320_FLASH_VSECTION,
DM320_FLASH_MMUFLAGS, DM320_FLASH_NSECTIONS},
{ DM320_CFI_PSECTION, DM320_CFI_VSECTION,
DM320_CFI_MMUFLAGS, DM320_CFI_NSECTIONS},
{ DM320_SSFDC_PSECTION, DM320_SSFDC_VSECTION,
DM320_SSFDC_MMUFLAGS, DM320_SSFDC_NSECTIONS},
{ DM320_CE1_PSECTION, DM320_CE1_VSECTION,
DM320_CE1_MMUFLAGS, DM320_CE1_NSECTIONS},
{ DM320_CE2_PSECTION, DM320_CE2_VSECTION,
DM320_CE2_MMUFLAGS, DM320_CE2_NSECTIONS},
{ DM320_VLYNQ_PSECTION, DM320_VLYNQ_VSECTION,
DM320_VLYNQ_MMUFLAGS, DM320_VLYNQ_NSECTIONS},
{ DM320_USBOTG_PSECTION, DM320_USBOTG_VSECTION,
DM320_USBOTG_MMUFLAGS, DM320_USBOTG_NSECTIONS}
};
#define NMAPPINGS (sizeof(section_mapping) / sizeof(struct section_mapping_s))
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Name: up_setlevel1entry
************************************************************************************/
static inline void up_setlevel1entry(uint32 paddr, uint32 vaddr, uint32 mmuflags)
{
uint32 *pgtable = (uint32*)PGTABLE_BASE_VADDR;
uint32 index = vaddr >> 20;
/* Save the page table entry */
pgtable[index] = (paddr | mmuflags);
}
/************************************************************************************
* Name: up_setlevel2coarseentry
************************************************************************************/
static inline void up_setlevel2coarseentry(uint32 ctabvaddr, uint32 paddr,
uint32 vaddr, uint32 mmuflags)
{
uint32 *ctable = (uint32*)ctabvaddr;
uint32 index;
/* The coarse table divides a 1Mb address space up into 256 entries, each
* corresponding to 4Kb of address space. The coarse page table index is
* related to the offset from the beginning of 1Mb region.
*/
index = (vaddr & 0x000ff000) >> 12;
/* Save the coarse table entry */
ctable[index] = (paddr | mmuflags);
}
/************************************************************************************
* Name: up_setupmappings
************************************************************************************/
static void up_setupmappings(void)
{
int i, j;
for (i = 0; i < NMAPPINGS; i++)
{
uint32 sect_paddr = section_mapping[i].physbase;
uint32 sect_vaddr = section_mapping[i].virtbase;
uint32 mmuflags = section_mapping[i].mmuflags;
for (j = 0; j < section_mapping[i].nsections; j++)
{
up_setlevel1entry(sect_paddr, sect_vaddr, mmuflags);
sect_paddr += SECTION_SIZE;
sect_vaddr += SECTION_SIZE;
}
}
}
/************************************************************************************
* Name: up_vectormapping
************************************************************************************/
static void up_vectormapping(void)
{
uint32 vector_paddr = DM320_IRAM_PADDR;
uint32 vector_vaddr = DM320_VECTOR_VADDR;
uint32 end_paddr = vector_paddr + DM320_IRAM_SIZE;
/* We want to keep our interrupt vectors and interrupt-related logic in zero-wait
* state internal RAM (IRAM). The DM320 has 16Kb of IRAM positioned at physical
* address 0x0000:0000; we need to map this to 0xffff:0000.
*/
while (vector_paddr < end_paddr)
{
up_setlevel2coarseentry(PGTABLE_COARSE_BASE_VADDR,
vector_paddr,
vector_vaddr,
MMU_L2_VECTORFLAGS);
vector_paddr += 4096;
vector_vaddr += 4096;
}
/* Now set the level 1 descriptor to refer to the level 2 coarse page table. */
up_setlevel1entry(PGTABLE_COARSE_BASE_PADDR,
DM320_VECTOR_VCOARSE,
MMU_L1_VECTORFLAGS);
}
/************************************************************************************
* Name: up_copyvectorblock
************************************************************************************/
static void up_copyvectorblock(void)
{
uint32 *src = (uint32*)&_vector_start;
uint32 *end = (uint32*)&_vector_end;
uint32 *dest = (uint32*)VECTOR_BASE;
while (src < end)
{
*dest++ = *src++;
}
}
/************************************************************************************
* Public Functions
************************************************************************************/
void up_boot(void)
{
/* __start provided the basic MMU mappings for SDRAM. Now provide mappings for all
* IO regions (Including the vector region).
*/
up_setupmappings();
/* Provide a special mapping for the IRAM interrupt vector positioned in high
* memory.
*/
up_vectormapping();
/* Setup up vector block. _vector_start and _vector_end are exported from
* up_vector.S
*/
up_copyvectorblock();
}
+74
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/********************************************************************
* up_cache.S
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************/
/********************************************************************
* Included Files
********************************************************************/
#include <nuttx/config.h>
#include "up_internal.h"
#include "dm320.h"
/********************************************************************
* Definitions
********************************************************************/
#define CACHE_DLINESIZE 32
/********************************************************************
* Assembly Macros
********************************************************************/
/**************************************************************************
* Name: up_flushicache
**************************************************************************/
/* Esure coherency between the Icache and the Dcache in the region described
* by r0=start and r1=end.
*/
.globl up_flushicache
.type up_flushicache,%function
up_flushicache:
bic r0, r0, #CACHE_DLINESIZE - 1
1: mcr p15, 0, r0, c7, c10, 1 /* Clean D entry */
mcr p15, 0, r0, c7, c5, 1 /* Invalidate I entry */
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
blo 1b
mcr p15, 0, r0, c7, c10, 4 /* Drain WB */
mov pc, lr
.size up_flushicache, .-up_flushicache
.end
+75
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/************************************************************
* up_copystate.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Functions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_undefinedinsn
************************************************************/
/* A little faster than most memcpy's */
void up_copystate(uint32 *dest, uint32 *src)
{
int i;
for (i = 0; i < XCPTCONTEST_REGS; i++)
{
*dest++ = *src++;
}
}
+126
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/************************************************************
* up_createstack.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/kmalloc.h>
#include <nuttx/arch.h>
#include "up_internal.h"
/************************************************************
* Private Types
************************************************************/
/************************************************************
* Private Function Prototypes
************************************************************/
/************************************************************
* Global Functions
************************************************************/
/************************************************************
* Name: up_create_stack
*
* Description:
* Allocate a stack for a new thread and setup
* up stack-related information in the TCB.
*
* The following TCB fields must be initialized:
* adj_stack_size: Stack size after adjustment for hardware,
* processor, etc. This value is retained only for debug
* purposes.
* stack_alloc_ptr: Pointer to allocated stack
* adj_stack_ptr: Adjusted StatckAllocPtr for HW. The
* initial value of the stack pointer.
*
* Inputs:
* tcb: The TCB of new task
* stack_size: The requested stack size. At least this much
* must be allocated.
************************************************************/
STATUS up_create_stack(_TCB *tcb, size_t stack_size)
{
if (tcb->stack_alloc_ptr &&
tcb->adj_stack_size != stack_size)
{
sched_free(tcb->stack_alloc_ptr);
tcb->stack_alloc_ptr = NULL;
}
if (!tcb->stack_alloc_ptr)
{
tcb->stack_alloc_ptr = (uint32 *)kzmalloc(stack_size);
}
if (tcb->stack_alloc_ptr)
{
size_t top_of_stack;
size_t size_of_stack;
/* The Arm7Tdmi uses a push-down stack: the stack grows
* toward loweraddresses in memory. The stack pointer
* register, points to the lowest, valid work address
* (the "top" of the stack). Items on the stack are
* referenced as positive word offsets from sp.
*/
top_of_stack = (uint32)tcb->stack_alloc_ptr + stack_size - 4;
/* The Arm7Tdmi stack must be aligned at word (4 byte)
* boundaries. If necessary top_of_stack must be rounded
* down to the next boundary
*/
top_of_stack &= ~3;
size_of_stack = top_of_stack - (uint32)tcb->stack_alloc_ptr + 4;
/* Save the adjusted stack values in the _TCB */
tcb->adj_stack_ptr = (uint32*)top_of_stack;
tcb->adj_stack_size = size_of_stack;
return OK;
}
return ERROR;
}
+68
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/************************************************************
* up_dataabort.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Functions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_dataabort
************************************************************/
void up_dataabort(uint32 *regs)
{
PANIC(OSERR_ERREXCEPTION);
}
+102
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/************************************************************
* up_delay.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <unistd.h>
#include <semaphore.h>
#include <string.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/fs.h>
#include <arch/serial.h>
#include "dm320.h"
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Definitions
************************************************************/
#define LOOPS_PER_MSEC 1250
/************************************************************
* Private Types
************************************************************/
/************************************************************
* Private Function Prototypes
************************************************************/
/************************************************************
* Private Variables
************************************************************/
/************************************************************
* Private Functions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_delay
*
* Description:
* Delay inline for the requested number of milliseconds.
* NOT multi-tasking friendly.
*
************************************************************/
void up_delay(int milliseconds)
{
volatile int i;
volatile int j;
for (i = 0; i < milliseconds; i++)
{
for (j = 0; j < LOOPS_PER_MSEC; j++)
{
}
}
}
+103
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/************************************************************
* up_doirq.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <assert.h>
#include "dm320.h"
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Public Data
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Functions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
void up_doirq(int irq, uint32* regs)
{
#ifdef CONFIG_SUPPRESS_INTERRUPTS
PANIC(OSERR_ERREXCEPTION);
#else
if ((unsigned)irq < NR_IRQS)
{
/* Current regs non-zero indicates that we are processing
* an interrupt; current_regs is also used to manage
* interrupt level context switches.
*/
current_regs = regs;
/* Mask and acknowledge the interrupt */
up_maskack_irq(irq);
/* Deliver the IRQ */
irq_dispatch(irq, regs);
/* Indicate that we are no long in an interrupt handler */
current_regs = NULL;
/* Unmask the last interrupt (global interrupts are still
* disabled.
*/
current_regs = NULL;
up_enable_irq(irq);
}
#endif
}
+171
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/************************************************************
* up_exit.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/arch.h>
#include "os_internal.h"
#include "up_internal.h"
#ifdef CONFIG_DUMP_ON_EXIT
#include <nuttx/fs.h>
#endif
/************************************************************
* Private Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Funtions
************************************************************/
/************************************************************
* Name: _up_dumponexit
*
* Description:
* Dump the state of all tasks whenever on task exits. This
* is debug instrumentation that was added to check file-
* related reference counting but could be useful again
* sometime in the future.
*
************************************************************/
#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
static void _up_dumponexit(FAR _TCB *tcb, FAR void *arg)
{
int i;
dbg(" TCB=%p name=%s\n", tcb, tcb->name);
if (tcb->filelist)
{
dbg(" filelist refcount=%d\n",
tcb->filelist->fl_crefs);
for (i = 0; i < CONFIG_NFILE_DESCRIPTORS; i++)
{
struct inode *inode = tcb->filelist->fl_files[i].f_inode;
if (inode)
{
dbg(" fd=%d refcount=%d\n",
i, inode->i_crefs);
}
}
}
if (tcb->streams)
{
dbg(" streamlist refcount=%d\n",
tcb->streams->sl_crefs);
for (i = 0; i < CONFIG_NFILE_STREAMS; i++)
{
struct file_struct *filep = &tcb->streams->sl_streams[i];
if (filep->fs_filedes >= 0)
{
dbg(" fd=%d nbytes=%d\n",
filep->fs_filedes,
filep->fs_bufpos - filep->fs_bufstart);
}
}
}
}
#endif
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: _exit
*
* Description:
* This function causes the currently executing task to cease
* to exist. This is a special case of task_delete().
*
************************************************************/
void _exit(int status)
{
_TCB* tcb = (_TCB*)g_readytorun.head;
dbg("TCB=%p exitting\n", tcb);
#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
dbg("Other tasks:\n");
sched_foreach(_up_dumponexit, NULL);
#endif
/* Remove the tcb task from the ready-to-run list. We can
* ignore the return value because we know that a context
* switch is needed.
*/
(void)sched_removereadytorun(tcb);
/* Move the TCB to the specified blocked task list and delete it */
sched_addblocked(tcb, TSTATE_TASK_INACTIVE);
task_delete(tcb->pid);
/* If there are any pending tasks, then add them to the g_readytorun
* task list now
*/
if (g_pendingtasks.head)
{
(void)sched_mergepending();
}
/* Now, perform the context switch to the new ready-to-run task at the
* head of the list.
*/
tcb = (_TCB*)g_readytorun.head;
dbg("New Active Task TCB=%p\n", tcb);
/* Then switch contexts */
up_fullcontextrestore(tcb->xcp.regs);
}
+117
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/**************************************************************************
* up_fullcontextrestore.S
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************/
/**************************************************************************
* Included Files
**************************************************************************/
#include <nuttx/irq.h>
#include "up_internal.h"
/**************************************************************************
* Private Definitions
**************************************************************************/
/**************************************************************************
* Private Types
**************************************************************************/
/**************************************************************************
* Private Function Prototypes
**************************************************************************/
/**************************************************************************
* Global Variables
**************************************************************************/
/**************************************************************************
* Private Variables
**************************************************************************/
/**************************************************************************
* Private Functions
**************************************************************************/
/**************************************************************************
* Public Functions
**************************************************************************/
/**************************************************************************
* Name: up_fullcontextrestore
**************************************************************************/
.globl up_fullcontextrestore
.type up_fullcontextrestore, function
up_fullcontextrestore:
/* On entry, a1 (r0) holds address of the register save area */
/* Recover all registers except for r0, r1, R15, and CPSR */
add r1, r0, #(4*REG_R2) /* Offset to REG_R2 storage */
ldmia r1, {r2-r14} /* Recover registers */
/* Create a stack frame to hold the PC */
sub sp, sp, #(3*4) /* Frame for three registers */
ldr r1, [r0, #(4*REG_R0)] /* Fetch the stored r0 value */
str r1, [sp] /* Save it at the top of the stack */
ldr r1, [r0, #(4*REG_R1)] /* Fetch the stored r1 value */
str r1, [sp, #4] /* Save it in the stack */
ldr r1, [r0, #(4*REG_PC)] /* Fetch the stored pc value */
str r1, [sp, #8] /* Save it at the bottom of the frame */
/* Now we can restore the CPSR. We wait until we are completely
* finished with the context save data to do this. Restore the CPSR
* may re-enable and interrupts and we couldt be in a context
* where save structure is only protected by interrupts being disabled.
*/
ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the stored CPSR value */
msr cpsr, r1 /* Set the CPSR */
/* Now recover r0 and r1 */
ldr r0, [sp]
ldr r1, [sp, #4]
add sp, sp, #(2*4)
/* Then return to the address at the stop of the stack,
* destroying the stack frame
*/
ldr pc, [sp], #4
.size up_fullcontextrestore, . - up_fullcontextrestore
+313
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/********************************************************************
* up_head.S
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************/
/********************************************************************
* Included Files
********************************************************************/
#include <nuttx/config.h>
#include "up_internal.h"
#include "dm320.h"
/**************************************************************************
* Conditional Compilation
**************************************************************************/
#undef ALIGNMENT_TRAP
#undef CPU_DCACHE_WRITETHROUGH
#undef CPU_CACHE_ROUND_ROBIN
#undef CPU_DCACHE_DISABLE
#undef CPU_ICACHE_DISABLE
/********************************************************************
* Definitions
********************************************************************/
/* The physical address of the beginning of SDRAM is provided by
* CONFIG_DRAM_BASE. The size of installed SDRAM is provided by
* CONFIG_DRAM_SIZE. The virtual address of SDRAM is provided by
* DM320_SDRAM_VADDR.
*/
#define NSDRAM_SECTIONS (CONFIG_DRAM_SIZE >> 20)
/********************************************************************
* Assembly Macros
********************************************************************/
/* Since the page table is closely related to the NuttX base
* address, we can convert the page table base address to the
* base address of the section containing both.
*/
.macro mksection, section, pgtable
bic \section, \pgtable, #0x000ff000
.endm
/* This macro will modify r0, r1, r2 and r14 */
#ifdef CONFIG_DEBUG
.macro showprogress, code
mov r0, #\code
bl up_lowputc
.endm
#else
.macro showprogress, code
.endm
#endif
/********************************************************************
* Name: __start
********************************************************************/
/* We assume the bootloader has already initialized most of the h/w for
* us and that only leaves us having to do some os specific things
* below.
*/
.text
.global __start
.type __start, #function
__start:
/* Make sure that we are in SVC mode with all IRQs disabled */
mov r0, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT)
msr cpsr_c, r0
/* Clear the 16K level 1 page table */
ldr r4, .LCppgtable /* r4=phys. page table */
mov r0, r4
mov r1, #0
add r2, r0, #PGTABLE_SIZE
.Lpgtableclear:
str r1, [r0], #4
str r1, [r0], #4
str r1, [r0], #4
str r1, [r0], #4
teq r0, r2
bne .Lpgtableclear
/* Create identity mapping for first MB section to support
* this startup logic executing out of the physical address
* space. This identity mapping will be removed by .Lvstart
* (see below).
*/
mksection r0, r4 /* r0=phys. base section */
ldr r1, .LCmmuflags /* FLGS=MMU_MEMFLAGS */
add r3, r1, r0 /* r3=flags + base */
str r3, [r4, r0, lsr #18] /* identity mapping */
/* Create a "normal" single section mapping for the first
* MB of memory. Now, we have the first 1MB mapping to
* both phyical and virtual addresses. The reset of the
* SDRAM mapping will be completed in .Lvstart once we have
* moved the physical mapping out of the way.
*/
ldr r2, .LCvpgtable /* r2=virt. page table */
mksection r0, r2 /* r0=virt. base section */
str r3, [r4, r0, lsr #18] /* identity mapping */
/* The following logic will set up the ARM926 for normal operation */
mov r0, #0
mcr p15, 0, r0, c7, c7 /* Invalidate I,D caches */
mcr p15, 0, r0, c7, c10, 4 /* Drain write buffer */
mcr p15, 0, r0, c8, c7 /* Invalidate I,D TLBs */
mcr p15, 0, r4, c2, c0 /* Load page table pointer */
#ifdef CPU_DCACHE_WRITETHROUGH
mov r0, #4 /* Disable write-back on caches explicitly */
mcr p15, 7, r0, c15, c0, 0
#endif
/* Enable the MMU and caches
* lr = Resume at .Lvstart with the MMU enabled
*/
ldr lr, .LCvstart /* Abs. virtual address */
mov r0, #0x1f /* Domains 0, 1 = client */
mcr p15, 0, r0, c3, c0 /* Load domain access register */
mrc p15, 0, r0, c1, c0 /* Get control register */
/* Clear bits (see start.h) */
bic r0, r0, #(CR_R|CR_F|CR_Z)
bic r0, r0, #(CR_A|CR_C|CR_W)
bic r0, r0, #(CR_I)
/* Set bits (see start.h) */
orr r0, r0, #(CR_M|CR_P|CR_D)
orr r0, r0, #(CR_S|CR_V)
#ifdef CPU_CACHE_ROUND_ROBIN
orr r0, r0, #(CR_RR)
#endif
#ifndef CPU_DCACHE_DISABLE
orr r0, r0, #(CR_C)
#endif
#ifndef CPU_ICACHE_DISABLE
orr r0, r0, #(CR_I)
#endif
#ifdef ALIGNMENT_TRAP
orr r0, r0, #(CR_A)
#endif
mcr p15, 0, r0, c1, c0, 0 /* write control reg */
/* Get TMP=2 Processor ID register */
mrc p15, 0, r1, c0, c0, 0 /* read id reg */
mov r1, r1
mov r1, r1
mov pc, lr
/**************************************************************************
* PC_Relative Data
**************************************************************************/
/* These addresses are all virtual address */
.type .LCvstart, %object
.LCvstart:
.long .Lvstart
.type .LCmmuflags, %object
.LCmmuflags:
.long MMU_MEMFLAGS
.type .LCppagetable, %object
.LCppgtable:
.long DM320_SDRAM_PADDR
.type .LCvpagetable, %object
.LCvpgtable:
.long DM320_SDRAM_VADDR
.size _start, .-_start
/**************************************************************************
* Name: .Lvstart
**************************************************************************/
/* The following is executed after the MMU has been enabled. This uses
* absolute addresses; this is not position independent.
*/
.align 5
.local .Lvstart
.type .Lvstart, %function
.Lvstart:
/* Remove the temporary null mapping */
ldr r4, .LCvpgtable /* r4=virtual page table */
ldr r1, .LCppgtable /* r1=phys. page table */
mksection r3, r1 /* r2=phys. base addr */
mov r0, #0 /* flags + base = 0 */
str r0, [r4, r3, lsr #18] /* Undo identity mapping */
/* Now setup the pagetables for our normal SDRAM mappings
* mapped region. We round NUTTX_START_VADDR down to the
* nearest megabyte boundary.
*/
ldr r1, .LCmmuflags /* FLGS=MMU_MEMFLAGS */
add r3, r3, r1 /* r3=flags + base */
add r0, r4, #(NUTTX_START_VADDR & 0xff000000) >> 18
bic r2, r3, #0x00f00000
str r2, [r0]
add r0, r0, #(NUTTX_START_VADDR & 0x00f00000) >> 18
str r3, [r0], #4
/* Now map the remaining NSDRAM_SECTIONS-1 SDRAM sections */
.rept NSDRAM_SECTIONS-1
add r3, r3, #SECTION_SIZE
str r3, [r0], #4
.endr
/* Zero BSS and set up the stack pointer */
adr r0, .Linitparms
ldmia r0, {r0, r1, sp}
/* Clear the frame pointer and .bss */
mov fp, #0
.Lbssinit:
cmp r0, r1 /* Clear up to _bss_end_ */
strcc fp, [r0],#4
bcc .Lbssinit
/* Perform early C-level initialization */
bl up_boot
/* Finally branch to the OS entry point */
mov lr, #0
b os_start
/* Variables:
* _sbss is the start of the BSS region (see ld.script)
* _ebss is the end of the BSS regsion (see ld.script)
* The idle task stack starts at the end of BSS and is
* of size CONFIG_PROC_STACK_SIZE. The heap continues
* from there until the end of memory. See g_heapbase
* below.
*/
.Linitparms:
.long _sbss
.long _ebss
.long _ebss+CONFIG_PROC_STACK_SIZE-4
.size .Lvstart, .-.Lvstart
/* This global variable is unsigned long g_heapbase and is
* exported from here only because of its coupling to .Linitparms
* above.
*/
.data
.align 4
.globl g_heapbase
.type g_heapbase, object
g_heapbase:
.long _ebss+CONFIG_PROC_STACK_SIZE
.size g_heapbase, .-g_heapbase
.end
+87
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/************************************************************
* up_idle.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/arch.h>
#include "up_internal.h"
/************************************************************
* Private Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Funtions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_idle
*
* Description:
* up_idle() is the logic that will be executed when their
* is no other ready-to-run task. This is processor idle
* time and will continue until some interrupt occurs to
* cause a context switch from the idle task.
*
* Processing in this state may be processor-specific. e.g.,
* this is where power management operations might be
* performed.
*
************************************************************/
void up_idle(void)
{
#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS)
/* If the system is idle and there are no timer interrupts,
* then process "fake" timer interrupts. Hopefully, something
* will wake up.
*/
sched_process_timer();
#endif
}
+104
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/************************************************************
* up_initialize.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/fs.h>
#include "up_internal.h"
/************************************************************
* Private Types
************************************************************/
/************************************************************
* Private Function Prototypes
************************************************************/
/************************************************************
* Global Functions
************************************************************/
/************************************************************
* Name: up_initialize
*
* Description:
* up_initialize will be called once during OS
* initialization after the basic OS services have been
* initialized. The architecture specific details of
* initializing the OS will be handled here. Such things as
* setting up interrupt service routines, starting the
* clock, and registering device drivers are some of the
* things that are different for each processor and hardware
* platform.
*
* up_initialize is called after the OS initialized but
* before the init process has been started and before the
* libraries have been initialized. OS services and driver
* services are available.
*
************************************************************/
void up_initialize(void)
{
/* Initialize global variables */
current_regs = NULL;
/* Initialize the interrupt subsystem */
up_irqinitialize();
/* Initialize the system timer interrupt */
#if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS)
up_timerinit();
#endif
/* Register devices */
devnull_register(); /* Standard /dev/null */
/* Initialize the serial device driver */
#ifdef CONFIG_DEV_CONSOLE
up_serialinit();
#endif
}
+91
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/************************************************************
* up_initialstate.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <string.h>
#include <nuttx/arch.h>
#include "up_internal.h"
#include "dm320.h"
/************************************************************
* Private Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Funtions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_initial_state
*
* Description:
* A new thread is being started and a new TCB
* has been created. This function is called to initialize
* the processor specific portions of the new TCB.
*
* This function must setup the intial architecture registers
* and/or stack so that execution will begin at tcb->start
* on the next context switch.
*
************************************************************/
void up_initial_state(_TCB *tcb)
{
struct xcptcontext *xcp = &tcb->xcp;
/* Initialize the initial exception register context structure */
memset(xcp, 0, sizeof(struct xcptcontext));
xcp->regs[REG_SP] = (uint32)tcb->adj_stack_ptr;
xcp->regs[REG_PC] = (uint32)tcb->start;
#ifdef CONFIG_SUPPRESS_INTERRUPTS
xcp->regs[REG_CPSR] = SVC_MODE | PSR_I_BIT | PSR_F_BIT;
#else
xcp->regs[REG_CPSR] = SVC_MODE | PSR_F_BIT;
#endif
}
+149
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/************************************************************
* up_internal.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
#ifndef __UP_INTERNAL_H
#define __UP_INTERNAL_H
/************************************************************
* Included Files
************************************************************/
/************************************************************
* Definitions
************************************************************/
/* Bring-up debug configurations. These are here (vs defconfig)
* because these should only be controlled during low level
* board bring-up and not part of normal platform configuration.
*/
#undef CONFIG_SUPPRESS_INTERRUPTS /* Do not enable interrupts */
#undef CONFIG_SUPPRESS_TIMER_INTS /* No timer */
#undef CONFIG_SUPPRESS_SERIAL_INTS /* Console will poll */
#undef CONFIG_SUPPRESS_UART_CONFIG /* Do not reconfig UART */
#undef CONFIG_DUMP_ON_EXIT /* Dumpt task state on exit */
/************************************************************
* Public Types
************************************************************/
#ifndef __ASSEMBLY__
typedef void (*up_vector_t)(void);
#endif
/************************************************************
* Public Variables
************************************************************/
#ifndef __ASSEMBLY__
/* This holds a references to the current interrupt level
* register storage structure. If is non-NULL only during
* interrupt processing.
*/
extern uint32 *current_regs;
/* This is the beginning of heap as provided from up_head.S.
* This is the first address in DRAM after the loaded
* program+bss+idle stack. The end of the heap is
* CONFIG_DRAM_END
*/
extern uint32 g_heapbase;
#endif
/************************************************************
* Inline Functions
************************************************************/
/************************************************************
* Public Functions
************************************************************/
#ifndef __ASSEMBLY__
/* Defined in files with the same name as the function */
extern void up_boot(void);
extern void up_copystate(uint32 *dest, uint32 *src);
extern void up_dataabort(uint32 *regs);
extern void up_delay(int milliseconds);
extern void up_doirq(int irq, uint32* regs);
extern void up_fullcontextrestore(uint32 *regs) __attribute__ ((noreturn));
extern void up_irqinitialize(void);
extern void up_prefetchabort(uint32 *regs);
extern int up_saveusercontext(uint32 *regs);
extern void up_sigdeliver(void);
extern void up_syscall(uint32 *regs);
extern int up_timerisr(int irq, uint32 *regs);
extern void up_undefinedinsn(uint32 *regs);
#ifdef CONFIG_DEBUG
extern void up_lowputc(char ch);
#else
# define up_lowputc(ch)
#endif
/* Defined in up_vectors.S */
extern void up_vectorundefinsn(void);
extern void up_vectorswi(void);
extern void up_vectorprefetch(void);
extern void up_vectordata(void);
extern void up_vectoraddrexcptn(void);
extern void up_vectorirq(void);
extern void up_vectorfiq(void);
/* Defined in up_serial.c */
extern void up_earlyserialinit(void);
extern void up_serialinit(void);
/* Defined in up_watchdog.c */
extern void up_wdtinit(void);
/* Defined in up_timerisr.c */
extern void up_timerinit(void);
/* Defined in up_irq.c */
extern void up_maskack_irq(int irq);
#endif /* __ASSEMBLY__ */
#endif /* __UP_INTERNAL_H */
+68
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/************************************************************
* up_interruptcontext.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include "up_internal.h"
/************************************************************
* Private Types
************************************************************/
/************************************************************
* Private Function Prototypes
************************************************************/
/************************************************************
* Global Functions
************************************************************/
/************************************************************
* Name: up_interrupt_context
*
* Description: Return TRUE is we are currently executing in
* the interrupt handler context.
************************************************************/
boolean up_interrupt_context(void)
{
return current_regs != NULL;
}
+245
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/************************************************************
* up_irq.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/irq.h>
#include "dm320.h"
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Public Data
************************************************************/
uint32 *current_regs;
/************************************************************
* Private Data
************************************************************/
/* The value of _vflashstart is defined in ld.script. It
* could be hard-coded because we know that correct IRAM
* area is 0xffc00000.
*/
extern int _svectors; /* Type does not matter */
/************************************************************
* Private Functions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_irqinitialize
************************************************************/
void up_irqinitialize(void)
{
/* Clear, disable and configure all interrupts. */
putreg16(0, DM320_INTC_EINT0); /* Mask all IRQs/FIQs */
putreg16(0, DM320_INTC_EINT1);
putreg16(0, DM320_INTC_EINT2);
putreg16(0, DM320_INTC_INTRAW); /* No masked interrupts in status */
putreg16(0, DM320_INTC_FISEL0); /* No FIQs */
putreg16(0, DM320_INTC_FISEL1);
putreg16(0, DM320_INTC_FISEL2);
putreg16(0xffff, DM320_INTC_FIQ0); /* Clear all pending FIQs */
putreg16(0xffff, DM320_INTC_FIQ1);
putreg16(0xffff, DM320_INTC_FIQ2);
putreg16(0xffff, DM320_INTC_IRQ0); /* Clear all pending IRQs */
putreg16(0xffff, DM320_INTC_IRQ1);
putreg16(0xffff, DM320_INTC_IRQ2);
/* Make sure that the base addresses are zero and that
* the table increment is 4 bytes.
*/
putreg16(0, DM320_INTC_EABASE0);
putreg16(0, DM320_INTC_EABASE1);
/* currents_regs is non-NULL only while processing an interrupt */
current_regs = NULL;
/* And finally, enable interrupts */
#ifndef CONFIG_SUPPRESS_INTERRUPTS
irqrestore(SVC_MODE | PSR_F_BIT);
#endif
}
/************************************************************
* Name: up_disable_irq
*
* Description:
* Disable the IRQ specified by 'irq'
*
************************************************************/
void up_disable_irq(int irq)
{
/* Disable the interrupt by clearing the corresponding bit in
* the IRQ enable register.
*/
if (irq < 16)
{
/* IRQs0-15 are controlled by the IRQ0 enable register
* Clear the associated bit to disable the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT0) & ~(1 << irq)), DM320_INTC_EINT0);
}
else if (irq < 32)
{
/* IRQs16-31 are controlled by the IRQ1 enable register
* Clear the associated bit to disable the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT1) & ~(1 << (irq-16))), DM320_INTC_EINT1);
}
else
{
/* IRQs32- are controlled by the IRQ2 enable register
* Clear the associated bit to disable the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT2) & ~(1 << (irq-32))), DM320_INTC_EINT2);
}
}
/************************************************************
* Name: up_enable_irq
*
* Description:
* Enable the IRQ specified by 'irq'
*
************************************************************/
void up_enable_irq(int irq)
{
/* Enable the interrupt by setting the corresponding bit in
* the IRQ enable register.
*/
if (irq < 16)
{
/* IRQs0-15 are controlled by the IRQ0 enable register
* Set the associated bit to enable the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT0) | (1 << irq)), DM320_INTC_EINT0);
}
else if (irq < 32)
{
/* IRQs16-31 are controlled by the IRQ1 enable register
* Set the associated bit to enable the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT1) | (1 << (irq-16))), DM320_INTC_EINT1);
}
else
{
/* IRQs32- are controlled by the IRQ2 enable register
* Set the associated bit to enable the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT2) | (1 << (irq-32))), DM320_INTC_EINT2);
}
}
/************************************************************
* Name: up_maskack_irq
*
* Description:
* Mask the IRQ and acknowledge it
*
************************************************************/
void up_maskack_irq(int irq)
{
/* Disable the interrupt by clearing the corresponding bit in
* the IRQ enable register. And acknowlege it by setting the
* corresponding bit in the IRQ status register.
*/
if (irq < 16)
{
/* IRQs0-15 are controlled by the IRQ0 enable register
* Clear the associated enable bit to disable the interrupt
* Set the associated status bit to clear the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT0) & ~(1<< irq)), DM320_INTC_EINT0);
putreg16((1 << irq), DM320_INTC_IRQ0);
}
else if (irq < 32)
{
/* IRQs16-31 are controlled by the IRQ1 enable register
* Clear the associated enable bit to disable the interrupt
* Set the associated status bit to clear the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT1) & ~(1<< (irq-16))), DM320_INTC_EINT1);
putreg16((1 << (irq-16)), DM320_INTC_IRQ1);
}
else
{
/* IRQs32- are controlled by the IRQ2 enable register
* Clear the associated enable bit to disable the interrupt
* Set the associated status bit to clear the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT2) & ~(1<< (irq-32))), DM320_INTC_EINT2);
putreg16((1 << (irq-32)), DM320_INTC_IRQ2);
}
}
+127
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/**************************************************************************
* up_lowputc.S
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************/
/**************************************************************************
* Included Files
**************************************************************************/
#include <nuttx/config.h>
#include "up_internal.h"
#include "dm320.h"
/**************************************************************************
* Private Definitions
**************************************************************************/
/**************************************************************************
* Private Types
**************************************************************************/
/**************************************************************************
* Private Function Prototypes
**************************************************************************/
/**************************************************************************
* Global Variables
**************************************************************************/
/**************************************************************************
* Private Variables
**************************************************************************/
/**************************************************************************
* Private Functions
**************************************************************************/
/**************************************************************************
* Public Functions
**************************************************************************/
/**************************************************************************
* Name: up_lowputc
**************************************************************************/
/* This assembly language version has the advantage that it can does not
* require a C stack and uses only r0-r1. Hence it can be used during
* early boot phases.
*/
.text
.global up_lowputc
.type up_lowputc, function
up_lowputc:
/* On entry, r0 holds the character to be printed */
#ifdef CONFIG_UART0_SERIAL_CONSOLE
ldr r2, =DM320_UART0_REGISTER_BASE /* r2=UART0 base */
#else
ldr r2, =DM320_UART1_REGISTER_BASE /* r2=UART1 base */
#endif
/* Poll the TX fifo trigger level bit of the UART_SSR
* register. When the bit is non-zero, the TX FIFO is no
* longer full
*/
1: ldrh r1, [r2, #UART_SR]
tst r1, #UART_SR_TFTI
beq 1b
/* Send the character by writing it into the UART_DTRR
* register.
*/
strh r0, [r2, #UART_DTRR]
/* Wait for the tranmsit regiser to be emptied. This is
* detemined when TX register empty bit of the SR is zero.
*/
2: ldrh r1, [r2, #UART_SR]
tst r1, #UART_SR_TREF
bne 2b
/* If the character that we just sent was a linefeed,
* then send a carriage return as well.
*/
teq r0, #'\n'
moveq r0, #'\r'
beq 1b
/* And return */
mov pc, lr
+69
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/************************************************************
* up_prefetchabort.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/irq.h>
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Functions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_prefetchabort
************************************************************/
void up_prefetchabort(uint32 *regs)
{
PANIC(OSERR_ERREXCEPTION);
}
+131
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/************************************************************
* up_releasepending.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/arch.h>
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Private Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Funtions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_release_pending
*
* Description:
* Release and ready-to-run tasks that have
* collected in the pending task list. This can call a
* context switch if a new task is placed at the head of
* the ready to run list.
*
************************************************************/
void up_release_pending(void)
{
_TCB *rtcb = (_TCB*)g_readytorun.head;
dbg("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the g_readytorun task list */
/* sched_lock(); */
if (sched_mergepending())
{
/* The currently active task has changed! We will need to
* switch contexts. First check if we are operating in
* interrupt context:
*/
if (current_regs)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
*/
up_copystate(rtcb->xcp.regs, current_regs);
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
rtcb = (_TCB*)g_readytorun.head;
dbg("New Active Task TCB=%p\n", rtcb);
/* Then switch contexts */
up_copystate(current_regs, rtcb->xcp.regs);
}
/* Copy the exception context into the TCB of the task that
* was currently active. if up_saveusercontext returns a non-zero
* value, then this is really the previously running task
* restarting!
*/
else if (!up_saveusercontext(rtcb->xcp.regs))
{
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
rtcb = (_TCB*)g_readytorun.head;
dbg("New Active Task TCB=%p\n", rtcb);
/* Then switch contexts */
up_fullcontextrestore(rtcb->xcp.regs);
}
}
}
+78
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/************************************************************
* up_releasestack.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/arch.h>
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Private Types
************************************************************/
/************************************************************
* Private Function Prototypes
************************************************************/
/************************************************************
* Global Functions
************************************************************/
/************************************************************
* Name: up_release_stack
*
* Description:
* A task has been stopped. Free all stack
* related resources retained int the defunct TCB.
*
************************************************************/
void up_release_stack(_TCB *dtcb)
{
if (dtcb->stack_alloc_ptr)
{
sched_free(dtcb->stack_alloc_ptr);
dtcb->stack_alloc_ptr = NULL;
}
dtcb->adj_stack_size = 0;
}
+178
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/************************************************************
* up_reprioritizertr.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/arch.h>
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Private Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Funtions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_reprioritize_rtr
*
* Description:
* Called when the priority of a running or
* ready-to-run task changes and the reprioritization will
* cause a context switch. Two cases:
*
* 1) The priority of the currently running task drops and the next
* task in the ready to run list has priority.
* 2) An idle, ready to run task's priority has been raised above the
* the priority of the current, running task and it now has the
* priority.
*
* Inputs:
* tcb: The TCB of the task that has been reprioritized
* priority: The new task priority
*
************************************************************/
void up_reprioritize_rtr(_TCB *tcb, ubyte priority)
{
/* Verify that the caller is sane */
if (tcb->task_state < FIRST_READY_TO_RUN_STATE ||
tcb->task_state > LAST_READY_TO_RUN_STATE ||
priority < SCHED_PRIORITY_MIN ||
priority > SCHED_PRIORITY_MAX)
{
PANIC(OSERR_BADREPRIORITIZESTATE);
}
else
{
_TCB *rtcb = (_TCB*)g_readytorun.head;
boolean switch_needed;
dbg("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return TRUE if we just
* remove the head of the ready to run list.
*/
switch_needed = sched_removereadytorun(tcb);
/* Setup up the new task priority */
tcb->sched_priority = (ubyte)priority;
/* Return the task to the specified blocked task list.
* sched_addreadytorun will return TRUE if the task was
* added to the new list. We will need to perform a context
* switch only if the EXCLUSIVE or of the two calls is non-zero
* (i.e., one and only one the calls changes the head of the
* ready-to-run list).
*/
switch_needed ^= sched_addreadytorun(tcb);
/* Now, perform the context switch if one is needed */
if (switch_needed)
{
/* If we are going to do a context switch, then now is the right
* time to add any pending tasks back into the ready-to-run list.
* task list now
*/
if (g_pendingtasks.head)
{
sched_mergepending();
}
/* Are we in an interrupt handler? */
if (current_regs)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
*/
up_copystate(rtcb->xcp.regs, current_regs);
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
rtcb = (_TCB*)g_readytorun.head;
dbg("New Active Task TCB=%p\n", rtcb);
/* Then switch contexts */
up_copystate(current_regs, rtcb->xcp.regs);
}
/* Copy the exception context into the TCB at the (old) head of the
* g_readytorun Task list. if up_saveusercontext returns a non-zero
* value, then this is really the previously running task restarting!
*/
if (!up_saveusercontext(rtcb->xcp.regs))
{
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
rtcb = (_TCB*)g_readytorun.head;
dbg("New Active Task TCB=%p\n", rtcb);
/* Then switch contexts */
up_fullcontextrestore(rtcb->xcp.regs);
}
}
}
}
+136
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@@ -0,0 +1,136 @@
/********************************************************************
* up_head.S
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************/
/********************************************************************
* Included Files
********************************************************************/
#include <nuttx/config.h>
#include "up_internal.h"
#include "dm320.h"
/********************************************************************
* Definitions
********************************************************************/
/********************************************************************
* Assembly Macros
********************************************************************/
/* Since the page table is closely related to the NuttX base
* address, we can convert the page table base address to the
* base address of the section containing both.
*/
.macro mksection, section, pgtable
bic \section, \pgtable, #0x000ff000
.endm
/**************************************************************************
* Name: up_restart
**************************************************************************/
.text
.globl up_restart
.type up_restart, %function
up_restart:
/* Make sure that we are in SVC mode with all IRQs disabled */
mov r0, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT)
msr cpsr_c, r0
/* Create identity mapping for first MB section to support
* this re-start logic executing out of the physical address
* space.
*/
mksection r0, r4 /* r0=phys. base section */
ldr r1, .LCmmuflags /* FLGS=MMU_MEMFLAGS */
add r3, r1, r0 /* r3=flags + base */
str r3, [r4, r0, lsr #18] /* identity mapping */
/* Jump into the physical address space */
ldr pc, .LCphysrestart
nop
nop
/* We are now executing at our physical address, with the
* MMU disabled.
*/
up_phyrestart:
mov r0, #0
mcr p15, 0, r0, c7, c7 /* Invalidate I,D caches */
mcr p15, 0, r0, c7, c10, 4 /* Drain write buffer */
mcr p15, 0, r0, c8, c7 /* Invalidate I,D TLBs */
/* Clear bits in control register (see start.h): Disable,
* MMU, Data cache, alignment traps, write buffer, Instruction
* cache, exceptions at 0xffff0000, round robin)
*/
mrc p15, 0, r0, c1, c0 /* Get control register */
bic r0, r0, #(CR_M|CR_C|CR_A|CR_W)
bic r0, r0, #(CR_S|CR_I|CR_V|CR_RR)
mcr p15, 0, r0, c1, c0, 0 /* Write control reg */
/* We know that the the bootloader entry point is at the
* beginning of flash.
*/
#if 1
ldr pc, .LCbtldrentry /* Restart bootloader */
#else
b __start /* Restart Nuttx */
#endif
.type .LCphysrestart, %object
.LCphysrestart:
.long (up_phyrestart - DM320_SDRAM_VADDR + DM320_SDRAM_PADDR)
.LCbtldrentry:
.long DM320_EXT_MEM_PADDR
/**************************************************************************
* PC_Relative Data
**************************************************************************/
.type .LCmmuflags, %object
.LCmmuflags:
.long MMU_MEMFLAGS
.size up_restart, .-up_restart
.end
+119
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/**************************************************************************
* up_saveusercontext.S
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************/
/**************************************************************************
* Included Files
**************************************************************************/
#include <nuttx/irq.h>
#include "up_internal.h"
/**************************************************************************
* Private Definitions
**************************************************************************/
/**************************************************************************
* Private Types
**************************************************************************/
/**************************************************************************
* Private Function Prototypes
**************************************************************************/
/**************************************************************************
* Global Variables
**************************************************************************/
/**************************************************************************
* Private Variables
**************************************************************************/
/**************************************************************************
* Private Functions
**************************************************************************/
/**************************************************************************
* Public Functions
**************************************************************************/
/**************************************************************************
* Name: up_saveusercontext
**************************************************************************/
.text
.globl up_saveusercontext
.type up_saveusercontext, function
up_saveusercontext:
/* On entry, a1 (r0) holds address of struct xcptcontext.
* Offset to the user region.
*/
/* Make sure that the return value will be non-zero (the
* value of the other volatile registers don't matter --
* r1-r3, ip). This function is called throught the
* noraml C calling conventions and the values of these
* registers cannot be assumed at the point of setjmp
* return.
*/
mov ip, #1
str ip, [r0, #(4*REG_R0)]
/* Save the volatile registers (plus r12 which really
* doesn't need to be saved)
*/
add r1, r0, #(4*REG_R4)
stmia r1, {r4-r14}
/* Save the current cpsr */
mrs r2, cpsr /* R3 = CPSR value */
add r1, r0, #(4*REG_CPSR)
str r2, [r1]
/* Finally save the return address as the PC so that we
* return to the exit from this function.
*/
add r1, r0, #(4*REG_PC)
str lr, [r1]
/* Return 0 */
mov r0, #0 /* Return value == 0 */
mov pc, lr /* Return */
.size up_saveusercontext, . - up_saveusercontext
+190
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/************************************************************
* up_schedulesigaction.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/arch.h>
#include "os_internal.h"
#include "up_internal.h"
#include "dm320.h"
/************************************************************
* Private Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Funtions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_schedule_sigaction
*
* Description:
* This function is called by the OS when one or more
* signal handling actions have been queued for execution.
* The architecture specific code must configure things so
* that the 'igdeliver' callback is executed on the thread
* specified by 'tcb' as soon as possible.
*
* This function may be called from interrupt handling logic.
*
* This operation should not cause the task to be unblocked
* nor should it cause any immediate execution of sigdeliver.
* Typically, a few cases need to be considered:
*
* (1) This function may be called from an interrupt handler
* During interrupt processing, all xcptcontext structures
* should be valid for all tasks. That structure should
* be modified to invoke sigdeliver() either on return
* from (this) interrupt or on some subsequent context
* switch to the recipient task.
* (2) If not in an interrupt handler and the tcb is NOT
* the currently executing task, then again just modify
* the saved xcptcontext structure for the recipient
* task so it will invoke sigdeliver when that task is
* later resumed.
* (3) If not in an interrupt handler and the tcb IS the
* currently executing task -- just call the signal
* handler now.
*
************************************************************/
void up_schedule_sigaction(_TCB *tcb, sig_deliver_t sigdeliver)
{
/* Refuse to handle nested signal actions */
dbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
if (!tcb->xcp.sigdeliver)
{
irqstate_t flags;
/* Make sure that interrupts are disabled */
flags = irqsave();
/* First, handle some special cases when the signal is
* being delivered to the currently executing task.
*/
dbg("rtcb=0x%p current_regs=0x%p\n", g_readytorun.head, current_regs);
if (tcb == (_TCB*)g_readytorun.head)
{
/* CASE 1: We are not in an interrupt handler and
* a task is signalling itself for some reason.
*/
if (!current_regs)
{
/* In this case just deliver the signal now. */
sigdeliver(tcb);
}
/* CASE 2: We are in an interrupt handler AND the
* interrupted task is the same as the one that
* must receive the signal, then we will have to modify
* the return state as well as the state in the TCB.
*/
else
{
/* Save the return lr and cpsr and one scratch register
* These will be restored by the signal trampoline after
* the signals have been delivered.
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = current_regs[REG_PC];
tcb->xcp.saved_cpsr = current_regs[REG_CPSR];
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
current_regs[REG_PC] = (uint32)up_sigdeliver;
current_regs[REG_CPSR] = SVC_MODE | PSR_I_BIT | PSR_F_BIT;
/* And make sure that the saved context in the TCB
* is the same as the interrupt return context.
*/
up_copystate(tcb->xcp.regs, current_regs);
}
}
/* Otherwise, we are (1) signaling a task is not running
* from an interrupt handler or (2) we are not in an
* interrupt handler and the running task is signalling
* some non-running task.
*/
else
{
/* Save the return lr and cpsr and one scratch register
* These will be restored by the signal trampoline after
* the signals have been delivered.
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = tcb->xcp.regs[REG_PC];
tcb->xcp.saved_cpsr = tcb->xcp.regs[REG_CPSR];
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
tcb->xcp.regs[REG_PC] = (uint32)up_sigdeliver;
tcb->xcp.regs[REG_CPSR] = SVC_MODE | PSR_I_BIT | PSR_F_BIT;
}
irqrestore(flags);
}
}
+117
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/************************************************************
* up_sigdeliver.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "os_internal.h"
#include "up_internal.h"
#include "dm320.h"
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Functions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_sigdeliver
*
* Description:
* This is the a signal handling trampoline. When a
* signal action was posted. The task context was mucked
* with and forced to branch to this location with interrupts
* disabled.
*
************************************************************/
void up_sigdeliver(void)
{
_TCB *rtcb = (_TCB*)g_readytorun.head;
uint32 regs[XCPTCONTEST_REGS];
sig_deliver_t sigdeliver;
dbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
/* Save the real return state on the stack. */
up_copystate(regs, rtcb->xcp.regs);
regs[REG_PC] = rtcb->xcp.saved_pc;
regs[REG_CPSR] = rtcb->xcp.saved_cpsr;
/* Get a local copy of the sigdeliver function pointer.
* we do this so that we can nullify the sigdeliver
* function point in the TCB and accept more signal
* deliveries while processing the current pending
* signals.
*/
sigdeliver = rtcb->xcp.sigdeliver;
rtcb->xcp.sigdeliver = NULL;
/* Then restore the task interrupt statat. */
irqrestore(regs[REG_CPSR]);
/* Deliver the signals */
sigdeliver(rtcb);
/* Then restore the correct state for this thread of
* execution.
*/
dbg("Resuming\n");
up_fullcontextrestore(regs);
}
+82
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/************************************************************
* up_syscall.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include "dm320.h"
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* vectors
************************************************************/
/************************************************************
* Private Functions
************************************************************/
/************************************************************
* Public Functions
************************************************************/
/************************************************************
* Name: up_syscall
*
* Description:
* SWI interrupts will vection here with insn=the SWI
* instruction and xcp=the interrupt context
*
* The handler may get the SWI number be de-referencing
* the return address saved in the xcp and decoding
* the SWI instruction
*
************************************************************/
void up_syscall(uint32 *regs)
{
PANIC(OSERR_ERREXCEPTION);
}
+155
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/************************************************************
* up_timerisr.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
#include <nuttx/arch.h>
#include "clock_internal.h"
#include "up_internal.h"
#include "dm320.h"
/************************************************************
* Definitions
************************************************************/
/* DM320 Timers
*
* Each of the general-purpose timers can run in one of two modes: one-
* shot mode and free-run mode. In one-shot mode, an interrupt only
* occurs once and then the timer must be explicitly reset to begin the
* timing operation again. In free-run mode, when the timer generates an
* interrupt, the timer counter is automatically reloaded to start the count
* operation again. Use the bit field MODE in TMMDx to configure the
* timer for one-shot more or free-run mode. The bit field MODE in TMMDx
* also allows you to stop the timer.
*
* Either the ARM clock divided by 2 (CLK_ARM/2) or an external clock
* connected to the M27XI pin can be selected as the clock source of the
* timer.
*
* The actual clock frequency used in the timer count operation is the input
* clock divided by: 1 plus the value set in the bit field PRSCL of the
* register TMPRSCLx (10 bits). The timer expires when it reaches the
* value set in the bit field DIV of the register TMDIVx (16 bits) plus 1.
* PRSCL+1 is the source clock frequency divide factor and DIV+1 is the
* timer count value. The frequency of a timer interrupt is given by the
* following equation:
*
* Interrupt Frequency = (Source Clock Frequency) / (PRSCL+1) / (DIV+1)
*/
/* System Timer
*
* Timer0 is dedicated as the system timer. The rate of system timer
* interrupts is assumed to to 10MS per tick / 100Hz. The following
* register settings are used for timer 0
*
* System clock formula:
* Interrupt Frequency = (Source Clock Frequency) / (PRSCL+1) / (DIV+1)
* Source Clock Frequency = 27MHz (PLL clock)
* DIV = 26,999 (Yields 1Khz timer clock)
* PRSCL = 9 (Produces 100Hz interrupts)
*/
#define DM320_TMR0_MODE DM320_TMR_MODE_FREERUN /* Free running */
#define DM320_TMR0_DIV 26999 /* (see above) */
#define DM320_TMR0_PRSCL 9 /* (see above) */
/************************************************************
* Private Types
************************************************************/
/************************************************************
* Private Function Prototypes
************************************************************/
/************************************************************
* Global Functions
************************************************************/
/************************************************************
* Function: up_timerisr
*
* Description:
* The timer ISR will perform a variety of services for
* various portions of the systems.
*
************************************************************/
int up_timerisr(int irq, uint32 *regs)
{
/* Process timer interrupt */
sched_process_timer();
return 0;
}
/************************************************************
* Function: up_timerinit
*
* Description:
* This function is called during start-up to initialize
* the timer interrupt.
*
************************************************************/
void up_timerinit(void)
{
uint32 val;
up_disable_irq(DM320_IRQ_SYSTIMER);
/* Start timer0 running so that an interrupt is generated at
* the rate MSEC_PER_TICK.
*/
putreg16(DM320_TMR0_PRSCL, DM320_TIMER1_TMPRSCL); /* Timer 0 Prescalar */
putreg16(DM320_TMR0_DIV, DM320_TIMER1_TMDIV); /* Timer 0 Divisor (count) */
/* Start the timer */
putreg16(DM320_TMR0_MODE, DM320_TIMER1_TMMD); /* Timer 0 Mode */
/* Attach and enable the timer interrupt */
irq_attach(DM320_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
up_enable_irq(DM320_IRQ_SYSTIMER);
}
+160
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/************************************************************
* up_unblocktask.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/arch.h>
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Private Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Funtions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_unblock_task
*
* Description:
* A task is currently in an inactive task list
* but has been prepped to execute. Move the TCB to the
* ready-to-run list, restore its context, and start execution.
*
* Inputs:
* tcb: Refers to the tcb to be unblocked. This tcb is
* in one of the waiting tasks lists. It must be moved to
* the ready-to-run list and, if it is the highest priority
* ready to run taks, executed.
*
************************************************************/
void up_unblock_task(_TCB *tcb)
{
/* Verify that the context switch can be performed */
if ((tcb->task_state < FIRST_BLOCKED_STATE) ||
(tcb->task_state > LAST_BLOCKED_STATE))
{
PANIC(OSERR_BADUNBLOCKSTATE);
}
else
{
_TCB *rtcb = (_TCB*)g_readytorun.head;
dbg("Unblocking TCB=%p\n", tcb);
/* Remove the task from the blocked task list */
sched_removeblocked(tcb);
/* Reset its timeslice. This is only meaningful for round
* robin tasks but it doesn't here to do it for everything
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL;
#endif
/* Add the task in the correct location in the prioritized
* g_readytorun task list
*/
if (sched_addreadytorun(tcb))
{
/* The currently active task has changed! We need to do
* a context switch to the new task.
*
* Are we in an interrupt handler?
*/
if (current_regs)
{
/* Yes, then we have to do things differently.
* Just copy the current_regs into the OLD rtcb.
*/
up_copystate(rtcb->xcp.regs, current_regs);
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
rtcb = (_TCB*)g_readytorun.head;
dbg("New Active Task TCB=%p\n", rtcb);
/* Then switch contexts */
up_copystate(current_regs, rtcb->xcp.regs);
}
/* We are not in an interrupt andler. Copy the user C context
* into the TCB of the task that was previously active. if
* up_saveusercontext returns a non-zero value, then this is really the
* previously running task restarting!
*/
else if (!up_saveusercontext(rtcb->xcp.regs))
{
/* Restore the exception context of the new task that is ready to
* run (probably tcb). This is the new rtcb at the head of the
* g_readytorun task list.
*/
rtcb = (_TCB*)g_readytorun.head;
dbg("New Active Task TCB=%p\n", rtcb);
/* Then switch contexts */
up_fullcontextrestore(rtcb->xcp.regs);
}
}
}
}
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/************************************************************
* up_undefinedinsn.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Functions
************************************************************/
/************************************************************
* Public Functions
************************************************************/
/************************************************************
* Name: up_undefinedinsn
************************************************************/
void up_undefinedinsn(uint32 *regs)
{
PANIC(OSERR_UNDEFINEDINSN);
}
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/************************************************************
* up_usestack.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/kmalloc.h>
#include <nuttx/arch.h>
#include "up_internal.h"
/************************************************************
* Private Types
************************************************************/
/************************************************************
* Private Function Prototypes
************************************************************/
/************************************************************
* Global Functions
************************************************************/
/************************************************************
* Name: up_use_stack
*
* Description:
* Setup up stack-related information in the TCB
* using pre-allocated stack memory
*
* The following TCB fields must be initialized:
* adj_stack_size: Stack size after adjustment for hardware,
* processor, etc. This value is retained only for debug
* purposes.
* stack_alloc_ptr: Pointer to allocated stack
* adj_stack_ptr: Adjusted StatckAllocPtr for HW. The
* initial value of the stack pointer.
*
* Inputs:
* tcb: The TCB of new task
* stack_size: The allocated stack size.
*
************************************************************/
STATUS up_use_stack(_TCB *tcb, void *stack, size_t stack_size)
{
size_t top_of_stack;
size_t size_of_stack;
if (tcb->stack_alloc_ptr)
{
sched_free(tcb->stack_alloc_ptr);
}
/* Save the stack allocation */
tcb->stack_alloc_ptr = stack;
/* The Arm7Tdmi uses a push-down stack: the stack grows
* toward loweraddresses in memory. The stack pointer
* register, points to the lowest, valid work address
* (the "top" of the stack). Items on the stack are
* referenced as positive word offsets from sp.
*/
top_of_stack = (uint32)tcb->stack_alloc_ptr + stack_size - 4;
/* The Arm7Tdmi stack must be aligned at word (4 byte)
* boundaries. If necessary top_of_stack must be rounded
* down to the next boundary
*/
top_of_stack &= ~3;
size_of_stack = top_of_stack - (uint32)tcb->stack_alloc_ptr + 4;
/* Save the adjusted stack values in the _TCB */
tcb->adj_stack_size = top_of_stack;
tcb->adj_stack_size = size_of_stack;
return OK;
}
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/********************************************************************
* up_vectors.S
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************/
/********************************************************************
* Included Files
********************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include "dm320.h"
/********************************************************************
* Definitions
********************************************************************/
/********************************************************************
* Global Data
********************************************************************/
.data
g_irqtmp:
.word 0 /* Saved lr */
.word 0 /* Saved spsr */
g_undeftmp:
.word 0 /* Saved lr */
.word 0 /* Saved spsr */
g_aborttmp:
.word 0 /* Saved lr */
.word 0 /* Saved spsr */
/********************************************************************
* Assembly Macros
********************************************************************/
/********************************************************************
* Private Functions
********************************************************************/
.text
/********************************************************************
* Public Functions
********************************************************************/
.text
/********************************************************************
* Name: up_vectorirq
*
* Description:
* Interrupt excetpion. Entered in IRQ mode with spsr = SVC
* CPSR, lr = SVC PC
********************************************************************/
.global up_vectorirq
.type up_vectorirq, %function
up_vectorirq:
/* On entry, we are in IRQ mode. We are free to use
* the IRQ mode r13 and r14.
*
*/
ldr r13, .Lirqtmp
sub lr, lr, #4
str lr, [r13] @ save lr_IRQ
mrs lr, spsr
str lr, [r13, #4] @ save spsr_IRQ
/* Then switch back to SVC mode */
bic lr, lr, #MODE_MASK /* Keep F and T bits */
orr lr, lr, #(SVC_MODE | PSR_I_BIT)
msr cpsr_c, lr /* Switch to SVC mode */
/* Create a context structure. First set aside a stack frame
* and store r0-r12 into the frame.
*/
sub sp, sp, #XCPTCONTEXT_SIZE
stmia sp, {r0-r12} /* Save the SVC mode regs */
/* Get the correct values of r13(sp) and r14(lr) in r1 and r2 */
add r1, sp, #XCPTCONTEXT_SIZE
mov r2, r14
/* Get the values for r15(pc) and CPSR in r3 and r4 */
ldr r0, .Lirqtmp /* Points to temp storage */
ldmia r0, {r3, r4} /* Recover r1=lr_IRQ, r2=spsr_IRQ */
add r0, sp, #(4*REG_SP) /* Offset to pc, cpsr storage */
stmia r0, {r1-r4}
/* Now decode the interrupt. First, fetch the interrupt id register. */
ldr r1, =DM320_INTC_IRQENTRY0 /* Addr LS 16-bits of entry */
ldrh r0, [r1] /* LS 16-bits of entry */
movs r0, r0, lsr #2 /* Convert to index (set Z) */
beq .Lnoirqset /* Exit if no IRQ set */
sub r0, r0, #1 /* Otherwise, offset */
/* Then call the IRQ handler with interrupt disabled.
* rq_dispatch(int irq, struct xcptcontext *xcp)
*/
mov fp, #0 /* Init frame pointer */
mov r1, sp /* Get r1=xcp */
bl up_doirq /* Call the handler */
/* Restore the CPSR, SVC modr registers and return */
.Lnoirqset:
ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */
msr spsr, r0
ldmia sp, {r0-r15}^ /* Return */
.Lirqtmp:
.word g_irqtmp
.align 5
/********************************************************************
* Function: up_vectorswi
*
* Description:
* SWI interrupt. We enter the SWI in SVC mode
********************************************************************/
.global up_vectorswi
.type up_vectorswi, %function
up_vectorswi:
/* The c547x rrload bootloader intemediates all
* interrupts. For the* case of the SWI, it mucked
* with the stack to create some temporary registers.
* We'll have to recover from this mucking here.
*/
ldr r14, [sp,#-0x4] /* rrload workaround */
/* Create a context structure. First set aside a stack frame
* and store r0-r12 into the frame.
*/
sub sp, sp, #XCPTCONTEXT_SIZE
stmia sp, {r0-r12} /* Save the SVC mode regs */
/* Get the correct values of r13(sp), r14(lr), r15(pc)
* and CPSR in r1-r4 */
add r1, sp, #XCPTCONTEXT_SIZE
mov r2, r14 /* R14 is altered on return from SWI */
mov r3, r14 /* Save r14 as the PC as well */
mrs r4, spsr /* Get the saved CPSR */
add r0, sp, #(4*REG_SP) /* Offset to pc, cpsr storage */
stmia r0, {r1-r4}
/* Then call the SWI handler with interrupt disabled.
* void up_syscall(struct xcptcontext *xcp)
*/
mov fp, #0 /* Init frame pointer */
mov r0, sp /* Get r0=xcp */
bl up_syscall /* Call the handler */
/* Restore the CPSR, SVC modr registers and return */
ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */
msr spsr, r0
ldmia sp, {r0-r15}^ /* Return */
.align 5
/********************************************************************
* Name: up_vectordata
*
* Description:
* Data abort Exception dispatcher. Give control to data
* abort handler. This function is entered in ABORT mode
* with spsr = SVC CPSR, lr = SVC PC
*
********************************************************************/
.global up_vectordata
.type up_vectordata, %function
up_vectordata:
/* On entry we are free to use the ABORT mode registers
* r13 and r14
*/
ldr r13, .Ldaborttmp /* Points to temp storage */
sub lr, lr, #8 /* Fixup return */
str lr, [r13] /* Save in temp storage */
mrs lr, spsr /* Get SPSR */
str lr, [r13, #4] /* Save in temp storage */
/* Then switch back to SVC mode */
bic lr, lr, #MODE_MASK /* Keep F and T bits */
orr lr, lr, #(SVC_MODE | PSR_I_BIT)
msr cpsr_c, lr /* Switch to SVC mode */
/* Create a context structure. First set aside a stack frame
* and store r0-r12 into the frame.
*/
sub sp, sp, #XCPTCONTEXT_SIZE
stmia sp, {r0-r12} /* Save the SVC mode regs */
/* Get the correct values of r13(sp) and r14(lr) in r1 and r2 */
add r1, sp, #XCPTCONTEXT_SIZE
mov r2, r14
/* Get the values for r15(pc) and CPSR in r3 and r4 */
ldr r0, .Ldaborttmp /* Points to temp storage */
ldmia r0, {r3, r4} /* Recover r1=lr_IRQ, r2=spsr_IRQ */
add r0, sp, #(4*REG_SP) /* Offset to pc, cpsr storage */
stmia r0, {r1-r4}
/* Then call the data abort handler with interrupt disabled.
* void up_dataabort(struct xcptcontext *xcp)
*/
mov fp, #0 /* Init frame pointer */
mov r0, sp /* Get r0=xcp */
bl up_dataabort /* Call the handler */
/* Restore the CPSR, SVC modr registers and return */
ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */
msr spsr_cxsf, r0
ldmia sp, {r0-r15}^ /* Return */
.Ldaborttmp:
.word g_aborttmp
.align 5
/********************************************************************
* Name: up_vectorprefetch
*
* Description:
* Prefetch abort exception. Entered in ABT mode with
* spsr = SVC CPSR, lr = SVC PC
********************************************************************/
.global up_vectorprefetch
.type up_vectorprefetch, %function
up_vectorprefetch:
/* On entry we are free to use the ABORT mode registers
* r13 and r14
*/
ldr r13, .Lpaborttmp /* Points to temp storage */
sub lr, lr, #4 /* Fixup return */
str lr, [r13] /* Save in temp storage */
mrs lr, spsr /* Get SPSR */
str lr, [r13, #4] /* Save in temp storage */
/* Then switch back to SVC mode */
bic lr, lr, #MODE_MASK /* Keep F and T bits */
orr lr, lr, #(SVC_MODE | PSR_I_BIT)
msr cpsr_c, lr /* Switch to SVC mode */
/* Create a context structure. First set aside a stack frame
* and store r0-r12 into the frame.
*/
sub sp, sp, #XCPTCONTEXT_SIZE
stmia sp, {r0-r12} /* Save the SVC mode regs */
/* Get the correct values of r13(sp) and r14(lr) in r1 and r2 */
add r1, sp, #XCPTCONTEXT_SIZE
mov r2, r14
/* Get the values for r15(pc) and CPSR in r3 and r4 */
ldr r0, .Lpaborttmp /* Points to temp storage */
ldmia r0, {r3, r4} /* Recover r1=lr_IRQ, r2=spsr_IRQ */
add r0, sp, #(4*REG_SP) /* Offset to pc, cpsr storage */
stmia r0, {r1-r4}
/* Then call the prefetch abort handler with interrupt disabled.
* void up_prefetchabort(struct xcptcontext *xcp)
*/
mov fp, #0 /* Init frame pointer */
mov r0, sp /* Get r0=xcp */
bl up_prefetchabort /* Call the handler */
/* Restore the CPSR, SVC modr registers and return */
ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */
msr spsr_cxsf, r0
ldmia sp, {r0-r15}^ /* Return */
.Lpaborttmp:
.word g_aborttmp
.align 5
/********************************************************************
* Name: up_vectorundefinsn
*
* Description:
* Undefined instruction entry exception. Entered in
* UND mode, spsr = SVC CPSR, lr = SVC PC
*
********************************************************************/
.global up_vectorundefinsn
.type up_vectorundefinsn, %function
up_vectorundefinsn:
/* On entry we are free to use the UND mode registers
* r13 and r14
*/
ldr r13, .Lundeftmp /* Points to temp storage */
str lr, [r13] /* Save in temp storage */
mrs lr, spsr /* Get SPSR */
str lr, [r13, #4] /* Save in temp storage */
/* Then switch back to SVC mode */
bic lr, lr, #MODE_MASK /* Keep F and T bits */
orr lr, lr, #(SVC_MODE | PSR_I_BIT)
msr cpsr_c, lr /* Switch to SVC mode */
/* Create a context structure. First set aside a stack frame
* and store r0-r12 into the frame.
*/
sub sp, sp, #XCPTCONTEXT_SIZE
stmia sp, {r0-r12} /* Save the SVC mode regs */
/* Get the correct values of r13(sp) and r14(lr) in r1 and r2 */
add r1, sp, #XCPTCONTEXT_SIZE
mov r2, r14
/* Get the values for r15(pc) and CPSR in r3 and r4 */
ldr r0, .Lundeftmp /* Points to temp storage */
ldmia r0, {r3, r4} /* Recover r1=lr_IRQ, r2=spsr_IRQ */
add r0, sp, #(4*REG_SP) /* Offset to pc, cpsr storage */
stmia r0, {r1-r4}
/* Then call the undef insn handler with interrupt disabled.
* void up_undefinedinsn(struct xcptcontext *xcp)
*/
mov fp, #0 /* Init frame pointer */
mov r0, sp /* Get r0=xcp */
bl up_undefinedinsn /* Call the handler */
/* Restore the CPSR, SVC modr registers and return */
ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */
msr spsr_cxsf, r0
ldmia sp, {r0-r15}^ /* Return */
.Lundeftmp:
.word g_undeftmp
.align 5
/********************************************************************
* Name: up_vectorfiq
*
* Description:
* Shouldn't happen
********************************************************************/
.global up_vectorfiq
.type up_vectorfiq, %function
up_vectorfiq:
subs pc, lr, #4
/********************************************************************
* Name: up_vectoraddrexcption
*
* Description:
* Shouldn't happen
*
********************************************************************/
.globl up_vectoraddrexcptn
.type up_vectoraddrexcptn, %function
up_vectoraddrexcptn:
b up_vectoraddrexcptn
/**************************************************************************
* Vector initialization block.
**************************************************************************/
/* These will be relocated to VECTOR_BASE. */
.globl _vector_start
_vector_start:
ldr pc, .Lresethandler /* 0x00: Reset */
ldr pc, .Lundefinedhandler /* 0x04: Undefined instruction */
ldr pc, .Lswihandler /* 0x08: Software interrupt */
ldr pc, .Lprefetchaborthandler /* 0x0c: Prefetch abort */
ldr pc, .Ldataaborthandler /* 0x10: Data abort */
ldr pc, .Laddrexcptnhandler /* 0x14: Address exception */
ldr pc, .Lirqhandler /* 0x18: IRQ */
ldr pc, .Lfiqhandler /* 0x1c: FIQ */
.Lresethandler:
.long __start
.Lundefinedhandler:
.long up_vectorundefinsn
.Lswihandler:
.long up_vectorswi
.Lprefetchaborthandler:
.long up_vectorprefetch
.Ldataaborthandler:
.long up_vectordata
.Laddrexcptnhandler:
.long up_vectoraddrexcptn
.Lirqhandler:
.long up_vectorirq
.Lfiqhandler:
.long up_vectorfiq
.globl _vector_end
_vector_end:
.end