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Merged in raiden00/nuttx_pe (pull request #731)

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stm32_tim.c: don't use hardcoded UIF interrupt in some functions

Approved-by: GregoryN <gnutt@nuttx.org>
This commit is contained in:
raiden00pl
2018-10-04 16:16:54 +00:00
committed by GregoryN
parent ff0640096f
commit 2fcf682316
3 changed files with 11 additions and 11 deletions
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arch/arm/src/stm32/stm32_tim.c
+4 -4
View File
@@ -1672,7 +1672,7 @@ static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev, xcpt_t handler,
static void stm32_tim_enableint(FAR struct stm32_tim_dev_s *dev, int source)
{
DEBUGASSERT(dev != NULL);
stm32_modifyreg16(dev, STM32_BTIM_DIER_OFFSET, 0, ATIM_DIER_UIE);
stm32_modifyreg16(dev, STM32_BTIM_DIER_OFFSET, 0, source);
}
/************************************************************************************
@@ -1682,7 +1682,7 @@ static void stm32_tim_enableint(FAR struct stm32_tim_dev_s *dev, int source)
static void stm32_tim_disableint(FAR struct stm32_tim_dev_s *dev, int source)
{
DEBUGASSERT(dev != NULL);
stm32_modifyreg16(dev, STM32_BTIM_DIER_OFFSET, ATIM_DIER_UIE, 0);
stm32_modifyreg16(dev, STM32_BTIM_DIER_OFFSET, source, 0);
}
/************************************************************************************
@@ -1691,7 +1691,7 @@ static void stm32_tim_disableint(FAR struct stm32_tim_dev_s *dev, int source)
static void stm32_tim_ackint(FAR struct stm32_tim_dev_s *dev, int source)
{
stm32_putreg16(dev, STM32_BTIM_SR_OFFSET, ~ATIM_SR_UIF);
stm32_putreg16(dev, STM32_BTIM_SR_OFFSET, ~source);
}
/************************************************************************************
@@ -1701,7 +1701,7 @@ static void stm32_tim_ackint(FAR struct stm32_tim_dev_s *dev, int source)
static int stm32_tim_checkint(FAR struct stm32_tim_dev_s *dev, int source)
{
uint16_t regval = stm32_getreg16(dev, STM32_BTIM_SR_OFFSET);
return (regval & ATIM_SR_UIF) ? 1 : 0;
return (regval & source) ? 1 : 0;
}
/************************************************************************************
configs/maple/src/stm32_lcd.c
+5 -5
View File
@@ -82,7 +82,7 @@ static xcpt_t g_isr;
static int up_lcdextcominisr(int irq, void *context, void *arg)
{
STM32_TIM_ACKINT(tim, 0);
STM32_TIM_ACKINT(tim, ATIM_SR_UIF);
if (g_isr == NULL)
{
lcderr("ERROR: error, irq not attached, disabled\n");
@@ -99,12 +99,12 @@ static int up_lcdirqattach(xcpt_t isr, void * arg)
if (isr != NULL)
{
STM32_TIM_SETISR(tim, up_lcdextcominisr, arg, 0);
STM32_TIM_SETISR(tim, up_lcdextcominisr, arg, ATIM_SR_UIF);
g_isr = isr;
}
else
{
STM32_TIM_SETISR(tim, NULL, NULL, 0);
STM32_TIM_SETISR(tim, NULL, NULL, ATIM_SR_UIF);
g_isr = NULL;
}
@@ -118,12 +118,12 @@ static void up_lcddispcontrol(bool on)
if (on)
{
stm32_gpiowrite(GPIO_MEMLCD_DISP, 1);
STM32_TIM_ENABLEINT(tim, 0);
STM32_TIM_ENABLEINT(tim, ATIM_SR_UIF);
}
else
{
stm32_gpiowrite(GPIO_MEMLCD_DISP, 0);
STM32_TIM_DISABLEINT(tim, 0);
STM32_TIM_DISABLEINT(tim, ATIM_SR_UIF);
}
}
configs/viewtool-stm32f107/src/stm32_highpri.c
+2 -2
View File
@@ -130,7 +130,7 @@ void tim6_handler(void)
/* Acknowledge the timer interrupt */
STM32_TIM_ACKINT(g_highpri.dev, 0);
STM32_TIM_ACKINT(g_highpri.dev, ATIM_SR_UIF);
/* Increment the count associated with the current basepri */
@@ -217,7 +217,7 @@ int highpri_main(int argc, char *argv[])
/* Enable the timer interrupt at the NVIC and at TIM6 */
up_enable_irq(STM32_IRQ_TIM6);
STM32_TIM_ENABLEINT(dev, 0);
STM32_TIM_ENABLEINT(dev, ATIM_SR_UIF);
/* Monitor interrupts */