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synced 2026-06-06 08:36:24 +08:00
In order to get PHY interrupts, they must be enabled at the PHY (still don't get PHY interrupts)
This commit is contained in:
Gregory Nutt
@@ -383,6 +383,9 @@ static void sam_phydump(struct sam_emac_s *priv);
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# define sam_phydump(priv)
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#endif
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#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
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static int sam_phyintenable(struct sam_emac_s *priv);
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#endif
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static int sam_phywait(struct sam_emac_s *priv);
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static int sam_phyreset(struct sam_emac_s *priv);
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static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr);
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@@ -1810,7 +1813,14 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
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case SIOCMIINOTIFY: /* Set up for PHY event notifications */
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{
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struct mii_iotcl_notify_s *req = (struct mii_iotcl_notify_s *)((uintptr_t)arg);
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ret = phy_notify_subscribe(dev->d_ifname, req->pid, req->signo, req->arg);
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if (ret == OK)
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{
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/* Enable PHY link up/down interrupts */
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ret = sam_phyintenable(priv);
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}
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}
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break;
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#endif
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@@ -1923,6 +1933,49 @@ static void sam_phydump(struct sam_emac_s *priv)
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}
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#endif
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/****************************************************************************
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* Function: sam_phyintenable
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*
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* Description:
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* Enable link up/down PHY interrupts
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*
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* Parameters:
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* priv - A reference to the private driver state structure
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*
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* Returned Value:
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* OK on success; Negated errno (-ETIMEDOUT) on failure.
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*
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****************************************************************************/
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#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
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static int sam_phyintenable(struct sam_emac_s *priv)
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{
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#if defined(CONFIG_ETH0_PHY_KSZ8051) || defined(CONFIG_ETH0_PHY_KSZ8081)
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uint32_t regval;
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int ret;
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/* Enable management port */
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regval = sam_getreg(priv, SAM_EMAC_NCR);
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sam_putreg(priv, SAM_EMAC_NCR, regval | EMAC_NCR_MPE);
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/* Enable link up/down interrupts */
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ret = sam_phywrite(priv, priv->phyaddr, MII_KSZ8081_INT,
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(MII_KSZ80x1_INT_LDEN | MII_KSZ80x1_INT_LUEN));
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/* Disable management port (probably) */
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sam_putreg(priv, SAM_EMAC_NCR, regval);
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return ret;
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#else
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# warning Missing logic
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return -ENOSYS;
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#endif
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}
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#endif
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/****************************************************************************
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* Function: sam_phywait
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*
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@@ -388,6 +388,9 @@ static void sam_phydump(struct sam_emac_s *priv);
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# define sam_phydump(priv)
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#endif
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#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
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static int sam_phyintenable(struct sam_emac_s *priv);
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#endif
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static int sam_phywait(struct sam_emac_s *priv);
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static int sam_phyreset(struct sam_emac_s *priv);
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static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr);
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@@ -1851,7 +1854,14 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
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case SIOCMIINOTIFY: /* Set up for PHY event notifications */
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{
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struct mii_iotcl_notify_s *req = (struct mii_iotcl_notify_s *)((uintptr_t)arg);
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ret = phy_notify_subscribe(dev->d_ifname, req->pid, req->signo, req->arg);
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if (ret == OK)
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{
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/* Enable PHY link up/down interrupts */
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ret = sam_phyintenable(priv);
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}
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}
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break;
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#endif
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@@ -1964,6 +1974,49 @@ static void sam_phydump(struct sam_emac_s *priv)
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}
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#endif
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/****************************************************************************
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* Function: sam_phyintenable
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*
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* Description:
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* Enable link up/down PHY interrupts
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*
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* Parameters:
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* priv - A reference to the private driver state structure
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*
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* Returned Value:
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* OK on success; Negated errno (-ETIMEDOUT) on failure.
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*
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****************************************************************************/
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#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
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static int sam_phyintenable(struct sam_emac_s *priv)
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{
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#if defined(SAMA5_EMAC_PHY_KSZ8051) || defined(SAMA5_EMAC_PHY_KSZ8081)
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uint32_t regval;
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int ret;
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/* Enable management port */
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regval = sam_getreg(priv, SAM_EMAC_NCR);
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sam_putreg(priv, SAM_EMAC_NCR, regval | EMAC_NCR_MPE);
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/* Enable link up/down interrupts */
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ret = sam_phywrite(priv, priv->phyaddr, MII_KSZ8081_INT,
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(MII_KSZ80x1_INT_LDEN | MII_KSZ80x1_INT_LUEN));
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/* Disable management port (probably) */
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sam_putreg(priv, SAM_EMAC_NCR, regval);
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return ret;
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#else
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# warning Missing logic
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return -ENOSYS;
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#endif
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}
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#endif
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/****************************************************************************
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* Function: sam_phywait
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*
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@@ -411,6 +411,9 @@ struct sam_emac_s
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/* Used to track transmit and receive descriptors */
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uint8_t phyaddr; /* PHY address (pre-defined by pins on reset) */
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#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
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uint8_t phytype; /* See SAMA5_EMAC0/1_PHY_TYPE definitions */
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#endif
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uint16_t txhead; /* Circular buffer head index */
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uint16_t txtail; /* Circular buffer tail index */
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uint16_t rxndx; /* RX index for current processing RX descriptor */
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@@ -502,6 +505,9 @@ static bool sam_is100hdx(struct sam_emac_s *priv, uint16_t physr);
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static bool sam_is10fdx(struct sam_emac_s *priv, uint16_t physr);
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static bool sam_is100fdx(struct sam_emac_s *priv, uint16_t physr);
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#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
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static int sam_phyintenable(struct sam_emac_s *priv);
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#endif
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static int sam_phywait(struct sam_emac_s *priv);
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static int sam_phyreset(struct sam_emac_s *priv);
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static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr);
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@@ -2226,7 +2232,14 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
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case SIOCMIINOTIFY: /* Set up for PHY event notifications */
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{
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struct mii_iotcl_notify_s *req = (struct mii_iotcl_notify_s *)((uintptr_t)arg);
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ret = phy_notify_subscribe(dev->d_ifname, req->pid, req->signo, req->arg);
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if (ret == OK)
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{
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/* Enable PHY link up/down interrupts */
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ret = sam_phyintenable(priv);
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}
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}
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break;
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#endif
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@@ -2429,6 +2442,57 @@ static bool sam_is100fdx(struct sam_emac_s *priv, uint16_t physr)
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return (physr & mask) == match;
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}
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/****************************************************************************
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* Function: sam_phyintenable
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*
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* Description:
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* Enable link up/down PHY interrupts
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*
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* Parameters:
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* priv - A reference to the private driver state structure
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*
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* Returned Value:
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* OK on success; Negated errno (-ETIMEDOUT) on failure.
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*
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****************************************************************************/
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#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
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static int sam_phyintenable(struct sam_emac_s *priv)
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{
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#if defined(SAMA5_EMAC0_PHY_KSZ8051) || defined(SAMA5_EMAC0_PHY_KSZ8081) || \
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defined(SAMA5_EMAC1_PHY_KSZ8051) || defined(SAMA5_EMAC1_PHY_KSZ8081)
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uint32_t regval;
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int ret;
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/* Does this MAC support a KSZ80x1 PHY? */
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if (priv->phytype == SAMA5_PHY_KSZ8051 || priv->phytype == SAMA5_PHY_KSZ8081)
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{
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/* Enable management port */
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regval = sam_getreg(priv, SAM_EMAC_NCR_OFFSET);
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sam_putreg(priv, SAM_EMAC_NCR_OFFSET, regval | EMAC_NCR_MPE);
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/* Enable link up/down interrupts */
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ret = sam_phywrite(priv, priv->phyaddr, MII_KSZ8081_INT,
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(MII_KSZ80x1_INT_LDEN | MII_KSZ80x1_INT_LUEN));
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/* Disable management port (probably) */
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sam_putreg(priv, SAM_EMAC_NCR_OFFSET, regval);
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}
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else
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#endif
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{
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ndbg("ERROR: Unsupported PHY type: %d\n", priv->phytype);
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ret = -ENOSYS;
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}
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return ret;
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}
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#endif
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/****************************************************************************
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* Function: sam_phywait
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*
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@@ -3634,21 +3698,32 @@ int sam_emac_initialize(int intf)
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{
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struct sam_emac_s *priv;
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const struct sam_emacattr_s *attr;
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#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
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uint8_t phytype;
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#endif
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int ret;
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#if defined(CONFIG_SAMA5_EMAC0)
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if (intf == EMAC0_INTF)
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{
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priv = &g_emac0;
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attr = &g_emac0_attr;
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priv = &g_emac0;
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attr = &g_emac0_attr;
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#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
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phytype = SAMA5_EMAC0_PHY_TYPE;
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#endif
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}
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else
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#endif
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#if defined(CONFIG_SAMA5_EMAC1)
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if (intf == EMAC1_INTF)
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{
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priv = &g_emac1;
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attr = &g_emac1_attr;
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priv = &g_emac1;
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attr = &g_emac1_attr;
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#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
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phytype = SAMA5_EMAC1_PHY_TYPE;
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#endif
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}
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else
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#endif
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@@ -3670,7 +3745,11 @@ int sam_emac_initialize(int intf)
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#endif
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#ifdef CONFIG_NETDEV_PHY_IOCTL
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priv->dev.d_ioctl = sam_ioctl; /* Support PHY ioctl() calls */
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#ifdef CONFIG_ARCH_PHY_INTERRUPT
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priv->phytype = phytype; /* Type of PHY on port */
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#endif
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#endif
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priv->dev.d_private = priv; /* Used to recover private state from dev */
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/* Create a watchdog for timing polling for and timing of transmissions */
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@@ -49,6 +49,14 @@
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Understood PHY types */
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#define SAMA5_PHY_DM9161 0
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#define SAMA5_PHY_LAN8700 1
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#define SAMA5_PHY_KSZ8051 2
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#define SAMA5_PHY_KSZ8081 3
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#define SAMA5_PHY_KSZ90x1 4
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/* Definitions for use with sam_phy_boardinitialize */
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#if defined(CONFIG_SAMA5_HAVE_EMACA)
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@@ -84,25 +92,39 @@
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#if defined(CONFIG_SAMA5_GMAC_ISETH0)
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# if defined(CONFIG_ETH0_PHY_DM9161)
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# define SAMA5_GMAC_PHY_DM9161 1
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# define SAMA5_GMAC_PHY_DM9161 1
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# define SAMA5_GMAC_PHY_TYPE SAMA5_PHY_DM9161
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# elif defined(CONFIG_ETH0_PHY_LAN8700)
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# define SAMA5_GMAC_PHY_LAN8700 1
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# define SAMA5_GMAC_PHY_TYPE SAMA5_PHY_LAN8700
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# elif defined(CONFIG_ETH0_PHY_KSZ8051)
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# define SAMA5_GMAC_PHY_KSZ8051 1
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# define SAMA5_GMAC_PHY_TYPE SAMA5_PHY_KSZ8051
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# elif defined(CONFIG_ETH0_PHY_KSZ8081)
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# define SAMA5_GMAC_PHY_KSZ8081 1
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# define SAMA5_GMAC_PHY_TYPE SAMA5_PHY_KSZ8081
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# elif defined(CONFIG_ETH0_PHY_KSZ90x1)
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# define SAMA5_GMAC_PHY_KSZ90x1 1
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# define SAMA5_GMAC_PHY_TYPE SAMA5_PHY_KSZ90x1
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# else
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# error ETH0 PHY unrecognized
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# endif
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#elif defined(CONFIG_SAMA5_GMAC)
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# if defined(CONFIG_ETH1_PHY_DM9161)
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# define SAMA5_GMAC_PHY_DM9161 1
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# define SAMA5_GMAC_PHY_DM9161 1
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# define SAMA5_GMAC_PHY_TYPE SAMA5_PHY_DM9161
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# elif defined(CONFIG_ETH1_PHY_LAN8700)
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# define SAMA5_GMAC_PHY_LAN8700 1
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# define SAMA5_GMAC_PHY_TYPE SAMA5_PHY_LAN8700
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# elif defined(CONFIG_ETH1_PHY_KSZ8051)
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# define SAMA5_GMAC_PHY_KSZ8051 1
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# define SAMA5_GMAC_PHY_TYPE SAMA5_PHY_KSZ8051
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# elif defined(CONFIG_ETH1_PHY_KSZ8081)
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# define SAMA5_GMAC_PHY_KSZ8081 1
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# define SAMA5_GMAC_PHY_TYPE SAMA5_PHY_KSZ8081
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# elif defined(CONFIG_ETH1_PHY_KSZ90x1)
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# define SAMA5_GMAC_PHY_KSZ90x1 1
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# define SAMA5_GMAC_PHY_TYPE SAMA5_PHY_KSZ90x1
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# else
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# error ETH1 PHY unrecognized
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# endif
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@@ -110,29 +132,39 @@
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#if defined(CONFIG_SAMA5_EMAC_ISETH0)
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# if defined(CONFIG_ETH0_PHY_DM9161)
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# define SAMA5_EMAC_PHY_DM9161 1
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# define SAMA5_EMAC_PHY_DM9161 1
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# define SAMA5_EMAC_PHY_TYPE SAMA5_PHY_DM9161
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# elif defined(CONFIG_ETH0_PHY_LAN8700)
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# define SAMA5_EMAC_PHY_LAN8700 1
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# define SAMA5_EMAC_PHY_TYPE SAMA5_PHY_LAN8700
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# elif defined(CONFIG_ETH0_PHY_KSZ8051)
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# define SAMA5_EMAC_PHY_KSZ8051 1
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# define SAMA5_EMAC_PHY_TYPE SAMA5_PHY_KSZ8051
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# elif defined(CONFIG_ETH0_PHY_KSZ8081)
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# define SAMA5_EMAC_PHY_KSZ8081 1
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# define SAMA5_EMAC_PHY_TYPE SAMA5_PHY_KSZ8081
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# elif defined(CONFIG_ETH0_PHY_KSZ90x1)
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# define SAMA5_EMAC_PHY_KSZ90x1 1
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# define SAMA5_EMAC_PHY_TYPE SAMA5_PHY_KSZ90x1
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# else
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# error ETH0 PHY unrecognized
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# endif
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#elif defined(CONFIG_SAMA5_EMACA)
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# if defined(CONFIG_ETH1_PHY_DM9161)
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# define SAMA5_EMAC_PHY_DM9161 1
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# define SAMA5_EMAC_PHY_DM9161 1
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# define SAMA5_EMAC_PHY_TYPE SAMA5_PHY_DM9161
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# elif defined(CONFIG_ETH1_PHY_LAN8700)
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# define SAMA5_EMAC_PHY_LAN8700 1
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# define SAMA5_EMAC_PHY_TYPE SAMA5_PHY_LAN8700
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# elif defined(CONFIG_ETH1_PHY_KSZ8051)
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# define SAMA5_EMAC_PHY_KSZ8051 1
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# define SAMA5_EMAC_PHY_TYPE SAMA5_PHY_KSZ8051
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# elif defined(CONFIG_ETH1_PHY_KSZ8081)
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# define SAMA5_EMAC_PHY_KSZ8081 1
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# define SAMA5_EMAC_PHY_TYPE SAMA5_PHY_KSZ8081
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# elif defined(CONFIG_ETH1_PHY_KSZ90x1)
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# define SAMA5_EMAC_PHY_KSZ90x1 1
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# define SAMA5_EMAC_PHY_TYPE SAMA5_PHY_KSZ90x1
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# else
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# error ETH1 PHY unrecognized
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# endif
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@@ -140,29 +172,39 @@
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#if defined(CONFIG_SAMA5_EMAC0_ISETH0)
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# if defined(CONFIG_ETH0_PHY_DM9161)
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# define SAMA5_EMAC0_PHY_DM9161 1
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# define SAMA5_EMAC0_PHY_DM9161 1
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# define SAMA5_EMAC0_PHY_TYPE SAMA5_PHY_DM9161
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# elif defined(CONFIG_ETH0_PHY_LAN8700)
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# define SAMA5_EMAC0_PHY_LAN8700 1
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# define SAMA5_EMAC0_PHY_TYPE SAMA5_PHY_LAN8700
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# elif defined(CONFIG_ETH0_PHY_KSZ8051)
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# define SAMA5_EMAC0_PHY_KSZ8051 1
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# define SAMA5_EMAC0_PHY_TYPE SAMA5_PHY_KSZ8051
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# elif defined(CONFIG_ETH0_PHY_KSZ8081)
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# define SAMA5_EMAC0_PHY_KSZ8081 1
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# define SAMA5_EMAC0_PHY_TYPE SAMA5_PHY_KSZ8081
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# elif defined(CONFIG_ETH0_PHY_KSZ90x1)
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# define SAMA5_EMAC0_PHY_KSZ90x1 1
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# define SAMA5_EMAC0_PHY_TYPE SAMA5_PHY_KSZ90x1
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# else
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# error ETH0 PHY unrecognized
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# endif
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#elif defined(CONFIG_SAMA5_EMAC0)
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# if defined(CONFIG_ETH1_PHY_DM9161)
|
||||
# define SAMA5_EMAC0_PHY_DM9161 1
|
||||
# define SAMA5_EMAC0_PHY_DM9161 1
|
||||
# define SAMA5_EMAC0_PHY_TYPE SAMA5_PHY_DM9161
|
||||
# elif defined(CONFIG_ETH1_PHY_LAN8700)
|
||||
# define SAMA5_EMAC0_PHY_LAN8700 1
|
||||
# define SAMA5_EMAC0_PHY_TYPE SAMA5_PHY_LAN8700
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ8051)
|
||||
# define SAMA5_EMAC0_PHY_KSZ8051 1
|
||||
# define SAMA5_EMAC0_PHY_TYPE SAMA5_PHY_KSZ8051
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8081)
|
||||
# define SAMA5_EMAC0_PHY_KSZ8081 1
|
||||
# define SAMA5_EMAC0_PHY_TYPE SAMA5_PHY_KSZ8081
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ90x1)
|
||||
# define SAMA5_EMAC0_PHY_KSZ90x1 1
|
||||
# define SAMA5_EMAC0_PHY_TYPE SAMA5_PHY_KSZ90x1
|
||||
# else
|
||||
# error ETH1 PHY unrecognized
|
||||
# endif
|
||||
@@ -170,29 +212,39 @@
|
||||
|
||||
#if defined(CONFIG_SAMA5_EMAC1_ISETH0)
|
||||
# if defined(CONFIG_ETH0_PHY_DM9161)
|
||||
# define SAMA5_EMAC1_PHY_DM9161 1
|
||||
# define SAMA5_EMAC1_PHY_DM9161 1
|
||||
# define SAMA5_EMAC1_PHY_TYPE SAMA5_PHY_DM9161
|
||||
# elif defined(CONFIG_ETH0_PHY_LAN8700)
|
||||
# define SAMA5_EMAC1_PHY_LAN8700 1
|
||||
# define SAMA5_EMAC1_PHY_TYPE SAMA5_PHY_LAN8700
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8051)
|
||||
# define SAMA5_EMAC1_PHY_KSZ8051 1
|
||||
# define SAMA5_EMAC1_PHY_TYPE SAMA5_PHY_KSZ8051
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8081)
|
||||
# define SAMA5_EMAC1_PHY_KSZ8081 1
|
||||
# define SAMA5_EMAC1_PHY_TYPE SAMA5_PHY_KSZ8081
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ90x1)
|
||||
# define SAMA5_EMAC1_PHY_KSZ90x1 1
|
||||
# define SAMA5_EMAC1_PHY_TYPE SAMA5_PHY_KSZ90x1
|
||||
# else
|
||||
# error ETH0 PHY unrecognized
|
||||
# endif
|
||||
#elif defined(CONFIG_SAMA5_EMAC1)
|
||||
# if defined(CONFIG_ETH1_PHY_DM9161)
|
||||
# define SAMA5_EMAC1_PHY_DM9161 1
|
||||
# define SAMA5_EMAC1_PHY_DM9161 1
|
||||
# define SAMA5_EMAC1_PHY_TYPE SAMA5_PHY_DM9161
|
||||
# elif defined(CONFIG_ETH1_PHY_LAN8700)
|
||||
# define SAMA5_EMAC1_PHY_LAN8700 1
|
||||
# define SAMA5_EMAC1_PHY_TYPE SAMA5_PHY_LAN8700
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ8051)
|
||||
# define SAMA5_EMAC1_PHY_KSZ8051 1
|
||||
# define SAMA5_EMAC1_PHY_TYPE SAMA5_PHY_KSZ8051
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8081)
|
||||
# define SAMA5_EMAC1_PHY_KSZ8081 1
|
||||
# define SAMA5_EMAC1_PHY_TYPE SAMA5_PHY_KSZ8081
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ90x1)
|
||||
# define SAMA5_EMAC1_PHY_KSZ90x1 1
|
||||
# define SAMA5_EMAC1_PHY_TYPE SAMA5_PHY_KSZ90x1
|
||||
# else
|
||||
# error ETH1 PHY unrecognized
|
||||
# endif
|
||||
|
||||
@@ -313,6 +313,9 @@ static void sam_phydump(struct sam_gmac_s *priv);
|
||||
# define sam_phydump(priv)
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
|
||||
static int sam_phyintenable(struct sam_emac_s *priv);
|
||||
#endif
|
||||
static void sam_enablemdio(struct sam_gmac_s *priv);
|
||||
static void sam_disablemdio(struct sam_gmac_s *priv);
|
||||
static int sam_phywait(struct sam_gmac_s *priv);
|
||||
@@ -1806,7 +1809,14 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
|
||||
case SIOCMIINOTIFY: /* Set up for PHY event notifications */
|
||||
{
|
||||
struct mii_iotcl_notify_s *req = (struct mii_iotcl_notify_s *)((uintptr_t)arg);
|
||||
|
||||
ret = phy_notify_subscribe(dev->d_ifname, req->pid, req->signo, req->arg);
|
||||
if (ret == OK)
|
||||
{
|
||||
/* Enable PHY link up/down interrupts */
|
||||
|
||||
ret = sam_phyintenable(priv);
|
||||
}
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
@@ -1840,6 +1850,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
|
||||
case SIOCSMIIREG: /* Set register in MII PHY */
|
||||
{
|
||||
struct mii_ioctl_data_s *req = (struct mii_ioctl_data_s *)((uintptr_t)arg);
|
||||
|
||||
/* Enable the management port */
|
||||
|
||||
sam_enablemdio(priv);
|
||||
@@ -1908,6 +1919,49 @@ static void sam_phydump(struct sam_gmac_s *priv)
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Function: sam_phyintenable
|
||||
*
|
||||
* Description:
|
||||
* Enable link up/down PHY interrupts
|
||||
*
|
||||
* Parameters:
|
||||
* priv - A reference to the private driver state structure
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success; Negated errno (-ETIMEDOUT) on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
|
||||
static int sam_phyintenable(struct sam_emac_s *priv)
|
||||
{
|
||||
#if defined(SAMA5_GMAC_PHY_KSZ90x1)
|
||||
int ret;
|
||||
|
||||
/* Enable the management port */
|
||||
|
||||
sam_enablemdio(priv);
|
||||
|
||||
/* Write to the requested register */
|
||||
|
||||
/* Enable link up/down interrupts */
|
||||
|
||||
ret = sam_phywrite(priv, priv->phyaddr, GMII_KSZ90x1_ICS,
|
||||
(GMII_KSZ90x1_INT_LDEN | GMII_KSZ90x1_INT_LUEN));
|
||||
|
||||
/* Disable the management port */
|
||||
|
||||
sam_disablemdio(priv);
|
||||
return ret;
|
||||
|
||||
#else
|
||||
# warning Missing logic
|
||||
return -ENOSYS;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Function: sam_enablemdio
|
||||
*
|
||||
|
||||
@@ -669,6 +669,9 @@ static void stm32_rxdescinit(FAR struct stm32_ethmac_s *priv);
|
||||
|
||||
/* PHY Initialization */
|
||||
|
||||
#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
|
||||
static int stm32_phyintenable(FAR struct stm32_ethmac_s *priv);
|
||||
#endif
|
||||
static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *value);
|
||||
static int stm32_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t value);
|
||||
#ifdef CONFIG_ETH0_PHY_DM9161
|
||||
@@ -2511,6 +2514,9 @@ static void stm32_rxdescinit(FAR struct stm32_ethmac_s *priv)
|
||||
#ifdef CONFIG_NETDEV_PHY_IOCTL
|
||||
static int stm32_ioctl(struct net_driver_s *dev, int cmd, long arg)
|
||||
{
|
||||
#ifdef CONFIG_ARCH_PHY_INTERRUPT
|
||||
FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)dev->d_private;
|
||||
#endif
|
||||
int ret;
|
||||
|
||||
switch (cmd)
|
||||
@@ -2519,7 +2525,14 @@ static int stm32_ioctl(struct net_driver_s *dev, int cmd, long arg)
|
||||
case SIOCMIINOTIFY: /* Set up for PHY event notifications */
|
||||
{
|
||||
struct mii_iotcl_notify_s *req = (struct mii_iotcl_notify_s *)((uintptr_t)arg);
|
||||
|
||||
ret = phy_notify_subscribe(dev->d_ifname, req->pid, req->signo, req->arg);
|
||||
if (ret == OK)
|
||||
{
|
||||
/* Enable PHY link up/down interrupts */
|
||||
|
||||
ret = stm32_phyintenable(priv);
|
||||
}
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
@@ -2555,6 +2568,28 @@ static int stm32_ioctl(struct net_driver_s *dev, int cmd, long arg)
|
||||
}
|
||||
#endif /* CONFIG_NETDEV_PHY_IOCTL */
|
||||
|
||||
/****************************************************************************
|
||||
* Function: stm32_phyintenable
|
||||
*
|
||||
* Description:
|
||||
* Enable link up/down PHY interrupts
|
||||
*
|
||||
* Parameters:
|
||||
* priv - A reference to the private driver state structure
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success; Negated errno (-ETIMEDOUT) on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
|
||||
static int stm32_phyintenable(struct stm32_ethmac_s *priv)
|
||||
{
|
||||
#warning Missing logic
|
||||
return -ENOSYS;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Function: stm32_phyread
|
||||
*
|
||||
|
||||
Reference in New Issue
Block a user