Changes to conform to coding standard.

arch/arm/src/efm32/efm32_adc.c

@@ -68,11 +68,11 @@
 
 /* Some ADC peripheral must be enabled */
 
-#if defined(CONFIG_EFM32_ADC1) 
+#if defined(CONFIG_EFM32_ADC1)
 
-/* This implementation is for the EFM32 F1, F2, and F4 only */
+/* This implementation is for the EFM32GG Only */
 
-#if defined(CONFIG_EFM32_EFM32GG) 
+#if defined(CONFIG_EFM32_EFM32GG)
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -135,7 +135,7 @@ static void adc_timstart(FAR struct efm32_dev_s *priv, bool enable);
 static int  adc_timinit(FAR struct efm32_dev_s *priv);
 #endif
 
-#if defined(CONFIG_EFM32_EFM32GG) 
+#if defined(CONFIG_EFM32_EFM32GG)
 static void adc_startconv(FAR struct efm32_dev_s *priv, bool enable);
 #endif
 
@@ -1280,6 +1280,6 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
   return dev;
 }
 
-#endif /* CONFIG_EFM32_EFM32F10XX || CONFIG_EFM32_EFM32F20XX || CONFIG_EFM32_EFM32F40XX */
+#endif /* CONFIG_EFM32_EFM32GG */
-#endif /* CONFIG_EFM32_ADC || CONFIG_EFM32_ADC2 || CONFIG_EFM32_ADC3 */
+#endif /* CONFIG_EFM32_ADC1 */
 #endif /* CONFIG_ADC */

arch/arm/src/efm32/efm32_bitband.c

@@ -49,11 +49,11 @@
 
 #if defined(CONFIG_EFM32_BITBAND)
 
-#ifndef EFM32_BITBAND_PER_BASE 
+#ifndef EFM32_BITBAND_PER_BASE
 #   error "EFM32_BITBAND_PER_BASE not declared bitband may be not supported?"
 #endif
 
-#ifndef EFM32_BITBAND_RAM_BASE 
+#ifndef EFM32_BITBAND_RAM_BASE
 #   error "EFM32_BITBAND_RAM_BASE not declared bitband may be not supported?"
 #endif
 
@@ -73,39 +73,40 @@
  * Private Functions
  ****************************************************************************/
 
-
 /******************************************************************************
  * Name: bitband_set_peripheral
+ *
+ * Description:
  *   Perform bit-band write operation on peripheral memory location.
  *
- * Description
  *   Bit-banding provides atomic read-modify-write cycle for single bit
  *   modification. Please refer to the reference manual for further details
  *   about bit-banding.
  *
  * Note
  *   This function is only atomic on cores which fully support bitbanding.
- * 
+ *
- * Parameters
+ * Input Parmeters:
- * addr     Peripheral address location to modify bit in.
+ *   addr     Peripheral address location to modify bit in.
- * bit      Bit position to modify, 0-31.
+ *   bit      Bit position to modify, 0-31.
- * val      Value to set bit to, 0 or 1.
+ *   val      Value to set bit to, 0 or 1.
  *
  ******************************************************************************/
+
 inline void bitband_set_peripheral(uint32_t addr, uint32_t bit, uint32_t val)
 {
-  uint32_t regval; 
+  uint32_t regval;
   regval = EFM32_BITBAND_PER_BASE + ((addr-EFM32_PER_MEM_BASE)*32) + (bit*4);
 
   *((volatile uint32_t *)regval) = (uint32_t)val;
 }
 
-
 /******************************************************************************
  * Name: bitband_get_peripheral
+ *
+ * Description:
  *   Perform bit-band operation on peripheral memory location.
  *
- * Description
  *   This function reads a single bit from the peripheral bit-band alias region.
  *   Bit-banding provides atomic read-modify-write cycle for single bit
  *   modification. Please refer to the reference manual for further details
@@ -113,14 +114,16 @@ inline void bitband_set_peripheral(uint32_t addr, uint32_t bit, uint32_t val)
  *
  * Note
  *   This function is only atomic on cores which fully support bitbanding.
- * 
- * Parameters
- * addr     Peripheral address location to read.
- * bit      Bit position to modify, 0-31.
  *
- * Return bit value read, 0 or 1.
+ * Input Parmeters:
+ *   addr     Peripheral address location to read.
+ *   bit      Bit position to modify, 0-31.
+ *
+ * Returned Value:
+ *   Return bit value read, 0 or 1.
  *
  ******************************************************************************/
+
 inline uint32_t bitband_get_peripheral(uint32_t addr, uint32_t bit)
 {
   uint32_t regval;
@@ -129,25 +132,26 @@ inline uint32_t bitband_get_peripheral(uint32_t addr, uint32_t bit)
   return *((volatile uint32_t *)regval);
 }
 
-
 /******************************************************************************
  * Name: bitband_set_sram
+ *
+ * Description:
  *   Perform bit-band write operation on SRAM memory location.
  *
- * Description
  *   Bit-banding provides atomic read-modify-write cycle for single bit
  *   modification. Please refer to the reference manual for further details
  *   about bit-banding.
  *
  * Note
  *   This function is only atomic on cores which fully support bitbanding.
- * 
+ *
- * Parameters
+ * Input Parmeters:
- * addr     SRAM address location to modify bit in.
+ *   addr     SRAM address location to modify bit in.
- * bit      Bit position to modify, 0-31.
+ *   bit      Bit position to modify, 0-31.
- * val      Value to set bit to, 0 or 1.
+ *   val      Value to set bit to, 0 or 1.
  *
  ******************************************************************************/
+
 inline void bitband_set_sram(uint32_t addr, uint32_t bit, uint32_t val)
 {
   uint32_t regval;
@@ -156,12 +160,12 @@ inline void bitband_set_sram(uint32_t addr, uint32_t bit, uint32_t val)
   *((volatile uint32_t *)regval) = (uint32_t)val;
 }
 
-
 /******************************************************************************
  * Name: bitband_get_sram
+ *
+ * Description::
  *   Perform bit-band operation on SRAM memory location.
  *
- * Description
  *   This function reads a single bit from the RAM bit-band alias region.
  *   Bit-banding provides atomic read-modify-write cycle for single bit
  *   modification. Please refer to the reference manual for further details
@@ -169,14 +173,16 @@ inline void bitband_set_sram(uint32_t addr, uint32_t bit, uint32_t val)
  *
  * Note
  *   This function is only atomic on cores which fully support bitbanding.
- * 
- * Parameters
- * addr     Peripheral address location to read.
- * bit      Bit position to modify, 0-31.
  *
- * Return bit value read, 0 or 1.
+ * Input Parmeters:
+ *   addr     Peripheral address location to read.
+ *   bit      Bit position to modify, 0-31.
+ *
+ * Returned Value:
+ *   Return bit value read, 0 or 1.
  *
  ******************************************************************************/
+
 inline uint32_t bitband_get_sram(uint32_t addr, uint32_t bit)
 {
   uint32_t regval;
@@ -184,6 +190,4 @@ inline uint32_t bitband_get_sram(uint32_t addr, uint32_t bit)
 
   return *((volatile uint32_t *)regval);
 }
-#endif 
+#endif
-
-

arch/arm/src/efm32/efm32_gpioirq.c

@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/efm32/efm32_gpioirq.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -276,7 +276,7 @@ void efm32_gpioirqenable(int irq)
     {
       /* Enable the interrupt associated with the pin */
 
-#ifndef CONFIG_EFM32_BITBAND 
+#ifndef CONFIG_EFM32_BITBAND
       irqstate_t flags;
       uint32_t regval;
       uint32_t bit;
@@ -302,15 +302,15 @@ void efm32_gpioirqenable(int irq)
 
 void efm32_gpioirqdisable(int irq)
 {
-
   if (irq >= EFM32_IRQ_EXTI0 && irq <= EFM32_IRQ_EXTI15)
     {
       /* Enable the interrupt associated with the pin */
 
-#ifndef CONFIG_EFM32_BITBAND 
+#ifndef CONFIG_EFM32_BITBAND
       irqstate_t flags;
       uint32_t regval;
       uint32_t bit;
+
       bit     = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
       flags   = irqsave();
       regval  = getreg32(EFM32_GPIO_IEN);
@@ -333,12 +333,11 @@ void efm32_gpioirqdisable(int irq)
 
 void efm32_gpioirqclear(int irq)
 {
-
   if (irq >= EFM32_IRQ_EXTI0 && irq <= EFM32_IRQ_EXTI15)
     {
       /* Enable the interrupt associated with the pin */
 
-#ifndef CONFIG_EFM32_BITBAND 
+#ifndef CONFIG_EFM32_BITBAND
       irqstate_t flags;
       uint32_t regval;
       uint32_t bit;

arch/arm/src/efm32/efm32_i2c.c

@@ -212,7 +212,7 @@ struct efm32_trace_s
   uint32_t i2c_reg_state;     /* I2C register I2Cx_STATES */
   uint32_t i2c_reg_if;        /* I2C register I2Cx_IF */
   uint32_t count;             /* Interrupt count when status change */
-  int      dcnt;               /* Interrupt count when status change */
+  int      dcnt;              /* Interrupt count when status change */
   uint32_t time;              /* First of event or first status */
 };
 
@@ -273,7 +273,7 @@ struct efm32_i2c_priv_s
 struct efm32_i2c_inst_s
 {
   const struct i2c_ops_s *ops;        /* Standard I2C operations */
-  struct efm32_i2c_priv_s *priv;      /* Common driver private data structure 
+  struct efm32_i2c_priv_s *priv;      /* Common driver private data structure
                                        */
 
   uint32_t frequency;         /* Frequency used in this instantiation */
@@ -626,7 +626,7 @@ static inline int efm32_i2c_sem_waitdone(FAR struct efm32_i2c_priv_s *priv)
 
       if (ret != OK && errno != EINTR)
         {
-          /* Break out of the loop on irrecoverable errors.  This would include 
+          /* Break out of the loop on irrecoverable errors.  This would include
            * timeouts and mystery errors reported by sem_timedwait. NOTE that
            * we try again if we are awakened by a signal (EINTR).
            */
@@ -834,8 +834,8 @@ static void efm32_i2c_tracedump(FAR struct efm32_i2c_priv_s *priv)
       syslog(LOG_DEBUG,
              "%2d. I2Cx_STATE: %08x I2Cx_PENDING: %08x dcnt %3d COUNT: %3d "
              "STATE: %s(%2d) TIME: %d\n",
-             i + 1, trace->i2c_reg_state, trace->i2c_reg_if, trace->dcnt, 
+             i + 1, trace->i2c_reg_state, trace->i2c_reg_if, trace->dcnt,
-             trace->count, efm32_i2c_state_str(trace->i2c_state), 
+             trace->count, efm32_i2c_state_str(trace->i2c_state),
              trace->i2c_state, trace->time - priv->start_time);
     }
 }
@@ -921,7 +921,7 @@ static int efm32_i2c_isr(struct efm32_i2c_priv_s *priv)
           if (priv->i2c_reg_if & I2C_IF_ARBLOST)
             {
               /* If arbitration fault, it indicates either a slave device not
-               * responding as expected, or other master which is not supported 
+               * responding as expected, or other master which is not supported
                * by this SW. */
 
               priv->result = I2CRESULT_ARBLOST;
@@ -936,7 +936,7 @@ static int efm32_i2c_isr(struct efm32_i2c_priv_s *priv)
             }
 
           /* If error situation occurred, it is difficult to know exact cause
-           * and how to resolve. It will be up to a wrapper to determine how to 
+           * and how to resolve. It will be up to a wrapper to determine how to
            * handle a fault/recovery if possible.
            */
 
@@ -1194,7 +1194,7 @@ static int efm32_i2c_isr(struct efm32_i2c_priv_s *priv)
         /*********************************************************
          * Wait for ACK/NACK from slave after sending data to it
          */
-                 
+
         case I2CSTATE_DATAWFACKNACK:
           if (priv->i2c_reg_if & I2C_IF_NACK)
             {
@@ -1248,14 +1248,13 @@ static int efm32_i2c_isr(struct efm32_i2c_priv_s *priv)
 
                   if (priv->dcnt == 1)
                     {
-                      /* If there is more than one byte to receive and this is 
+                      /* If there is more than one byte to receive and this is
-                       * the next to last byte we need to transmit the NACK 
+                       * the next to last byte we need to transmit the NACK
-                       * now, before receiving the last byte. 
+                       * now, before receiving the last byte.
                        */
 
                       efm32_i2c_putreg(priv,EFM32_I2C_CMD_OFFSET,I2C_CMD_NACK);
                     }
-
                 }
             }
           goto done;
@@ -1603,16 +1602,13 @@ static int efm32_i2c_process(FAR struct i2c_dev_s *dev,
       /* Abort */
 
       efm32_i2c_putreg(priv, EFM32_I2C_CMD_OFFSET, I2C_CMD_ABORT);
-
     }
   else
     {
-
       /* Check for error status conditions */
 
       switch(priv->result)
         {
-
             /* Arbitration lost during transfer. */
 
           case I2CRESULT_ARBLOST:
@@ -1638,7 +1634,7 @@ static int efm32_i2c_process(FAR struct i2c_dev_s *dev,
               break;
 
               /* Bus error during transfer (misplaced START/STOP).
-               * I2C Bus is for some reason busy 
+               * I2C Bus is for some reason busy
                */
 
           case I2CRESULT_BUSERR:
@@ -1652,7 +1648,7 @@ static int efm32_i2c_process(FAR struct i2c_dev_s *dev,
   efm32_i2c_tracedump(priv);
 
   /* Ensure that any ISR happening after we finish can't overwrite any user
-   * data 
+   * data
    */
 
   priv->result = I2CRESULT_NONE;
@@ -1769,7 +1765,7 @@ static int efm32_i2c_transfer(FAR struct i2c_dev_s *dev,
 
 FAR struct i2c_dev_s *up_i2cinitialize(int port)
 {
-  struct efm32_i2c_priv_s *priv = NULL; /* Private data of device with multiple 
+  struct efm32_i2c_priv_s *priv = NULL; /* Private data of device with multiple
                                          * instances */
   struct efm32_i2c_inst_s *inst = NULL; /* Device, single instance */
   irqstate_t irqs;

arch/arm/src/efm32/efm32_rmu.c

@@ -80,83 +80,83 @@ typedef struct
 static efm32_reset_cause_list_t efm32_reset_cause_list[] =
 {
   {
-    0x0001, //0bXXXX XXXX XXXX XXX1
+    0x0001, /* 0bXXXX XXXX XXXX XXX1 */
-    0x0001, //0bXXXX XXXX XXXX XXX1
+    0x0001, /* 0bXXXX XXXX XXXX XXX1 */
     "A Power-on Reset has been performed. X bits are don't care."
   },
   {
-    0x0002, //0bXXXX XXXX 0XXX XX10
+    0x0002, /* 0bXXXX XXXX 0XXX XX10 */
-    0x0003, //0bXXXX XXXX 1XXX XX11
+    0x0003, /* 0bXXXX XXXX 1XXX XX11 */
     "A Brown-out has been detected on the unregulated power."
   },
   {
-    0x0004, //0bXXXX XXXX XXX0 0100
+    0x0004, /* 0bXXXX XXXX XXX0 0100 */
-    0x001F, //0bXXXX XXXX XXX1 1111
+    0x001F, /* 0bXXXX XXXX XXX1 1111 */
     "A Brown-out has been detected on the regulated power."
   },
   {
-    0x0008, //0bXXXX XXXX XXXX 1X00
+    0x0008, /* 0bXXXX XXXX XXXX 1X00 */
-    0x000B, //0bXXXX XXXX XXXX 1X11
+    0x000B, /* 0bXXXX XXXX XXXX 1X11 */
     "An external reset has been applied."
   },
   {
-    0x0010, //0bXXXX XXXX XXX1 XX00
+    0x0010, /* 0bXXXX XXXX XXX1 XX00 */
-    0x0013, //0bXXXX XXXX XXX1 XX11
+    0x0013, /* 0bXXXX XXXX XXX1 XX11 */
     "A watchdog reset has occurred."
   },
   {
-    0x0020, //0bXXXX X000 0010 0000
+    0x0020, /* 0bXXXX X000 0010 0000 */
-    0x07FF, //0bXXXX X111 1111 1111
+    0x07FF, /* 0bXXXX X111 1111 1111 */
     "A lockup reset has occurred."
   },
   {
-    0x0040, //0bXXXX X000 01X0 0000
+    0x0040, /* 0bXXXX X000 01X0 0000 */
-    0x07DF, //0bXXXX X111 11X1 1111
+    0x07DF, /* 0bXXXX X111 11X1 1111 */
     "A system request reset has occurred."
   },
   {
-    0x0080, //0bXXXX X000 1XX0 0XX0
+    0x0080, /* 0bXXXX X000 1XX0 0XX0 */
-    0x0799, //0bXXXX X111 1XX1 1XX1
+    0x0799, /* 0bXXXX X111 1XX1 1XX1 */
     "The system has woken up from EM4."
   },
   {
-    0x0180, //0bXXXX X001 1XX0 0XX0
+    0x0180, /* 0bXXXX X001 1XX0 0XX0 */
-    0x0799, //0bXXXX X111 1XX1 1XX1
+    0x0799, /* 0bXXXX X111 1XX1 1XX1 */
     "The system has woken up from EM4 on an EM4 wakeup reset request from pin."
   },
   {
-    0x0200, //0bXXXX X01X XXX0 0000
+    0x0200, /* 0bXXXX X01X XXX0 0000 */
-    0x061F, //0bXXXX X11X XXX1 1111
+    0x061F, /* 0bXXXX X11X XXX1 1111 */
     "A Brown-out has been detected on Analog Power Domain 0 (AVDD0)."
   },
   {
-    0x0400, //0bXXXX X10X XXX0 0000
+    0x0400, /* 0bXXXX X10X XXX0 0000 */
-    0x061F, //0bXXXX X11X XXX1 1111
+    0x061F, /* 0bXXXX X11X XXX1 1111 */
     "A Brown-out has been detected on Analog Power Domain 1 (AVDD1)."
   },
   {
-    0x0800, //0bXXXX 1XXX XXXX 0XX0
+    0x0800, /* 0bXXXX 1XXX XXXX 0XX0 */
-    0x0809, //0bXXXX 1XXX XXXX 1XX1
+    0x0809, /* 0bXXXX 1XXX XXXX 1XX1 */
     "A Brown-out has been detected by the Backup BOD on VDD_DREG."
   },
   {
-    0x1000, //0bXXX1 XXXX XXXX 0XX0
+    0x1000, /* 0bXXX1 XXXX XXXX 0XX0 */
-    0x1009, //0bXXX1 XXXX XXXX 1XX1
+    0x1009, /* 0bXXX1 XXXX XXXX 1XX1 */
     "A Brown-out has been detected by the Backup BOD on BU_VIN."
   },
   {
-    0x2000, //0bXX1X XXXX XXXX 0XX0
+    0x2000, /* 0bXX1X XXXX XXXX 0XX0 */
-    0x2009, //0bXX1X XXXX XXXX 1XX1
+    0x2009, /* 0bXX1X XXXX XXXX 1XX1 */
     "A Brown-out has been detected by the Backup BOD on unregulated power"
   },
   {
-    0x4000, //0bX1XX XXXX XXXX 0XX0
+    0x4000, /* 0bX1XX XXXX XXXX 0XX0 */
-    0x4009, //0bX1XX XXXX XXXX 1XX1
+    0x4009, /* 0bX1XX XXXX XXXX 1XX1 */
     "A Brown-out has been detected by the Backup BOD on regulated power."
   },
   {
-    0x8000, //0b1XXX XXXX XXXX XXX0
+    0x8000, /* 0b1XXX XXXX XXXX XXX0 */
-    0x8001, //0b1XXX XXXX XXXX XXX1
+    0x8001, /* 0b1XXX XXXX XXXX XXX1 */
     "The system has been in Backup mode."
   }
 };