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arch/xtensa: Fix esp32s2 SPI errors

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Fix esp32s2 SPI DMA and SPI3 errors

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
This commit is contained in:
Eren Terzioglu
2026-01-09 17:11:26 +01:00
committed by Xiang Xiao
parent 226443fb81
commit 2dbdcd603f
1 changed files with 20 additions and 13 deletions
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arch/xtensa/src/esp32s2/esp32s2_spi.c
+20 -13
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@@ -59,11 +59,17 @@
#include "hardware/esp32s2_spi.h"
#include "hardware/esp32s2_soc.h"
#include "hardware/esp32s2_system.h"
#include "soc/spi_reg.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define SPI_INT_EN SPI_INT_RD_BUF_DONE_EN | SPI_INT_WR_BUF_DONE_EN | \
SPI_INT_RD_DMA_DONE_EN | SPI_INT_WR_DMA_DONE_EN | \
SPI_INT_TRANS_DONE_EN | SPI_INT_DMA_SEG_TRANS_EN | \
SPI_SEG_MAGIC_ERR_INT_EN
/* Check if Chip-Select pin will be controlled via software */
#ifdef CONFIG_ESP32S2_SPI_SWCS
@@ -400,14 +406,14 @@ static const struct esp32s2_spi_config_s esp32s2_spi3_config =
.dma_clk_bit = SYSTEM_SPI3_DMA_CLK_EN,
.dma_rst_bit = SYSTEM_SPI3_DMA_RST,
#endif
.cs_insig = FSPICS0_IN_IDX,
.cs_outsig = FSPICS0_OUT_IDX,
.mosi_insig = FSPID_IN_IDX,
.mosi_outsig = FSPID_OUT_IDX,
.miso_insig = FSPIQ_IN_IDX,
.miso_outsig = FSPIQ_OUT_IDX,
.clk_insig = FSPICLK_IN_IDX,
.clk_outsig = FSPICLK_OUT_IDX
.cs_insig = SPI3_CS0_IN_IDX,
.cs_outsig = SPI3_CS0_OUT_IDX,
.mosi_insig = SPI3_D_IN_IDX,
.mosi_outsig = SPI3_D_OUT_IDX,
.miso_insig = SPI3_Q_IN_IDX,
.miso_outsig = SPI3_Q_OUT_IDX,
.clk_insig = SPI3_CLK_IN_IDX,
.clk_outsig = SPI3_CLK_OUT_MUX_IDX
};
static const struct spi_ops_s esp32s2_spi3_ops =
@@ -1023,8 +1029,8 @@ static void esp32s2_spi_dma_exchange(struct esp32s2_spi_priv_s *priv,
}
#endif
esp32s2_spi_clr_regbits(spi_slave_reg, SPI_TRANS_DONE_M);
esp32s2_spi_set_regbits(spi_slave_reg, SPI_INT_EN_M);
esp32s2_spi_clr_regbits(spi_slave_reg, SPI_INT_TRANS_DONE_EN);
esp32s2_spi_set_regbits(spi_slave_reg, SPI_INT_EN);
while (bytes != 0)
{
@@ -1071,7 +1077,7 @@ static void esp32s2_spi_dma_exchange(struct esp32s2_spi_priv_s *priv,
bytes -= n;
}
esp32s2_spi_clr_regbits(spi_slave_reg, SPI_INT_EN_M);
esp32s2_spi_clr_regbits(spi_slave_reg, SPI_INT_EN);
#if defined(CONFIG_ESP32S2_SPIRAM) && defined(CONFIG_ESP32S2_SPI3_DMA)
if (allocrp)
@@ -1441,6 +1447,7 @@ void esp32s2_spi_dma_init(struct spi_dev_s *dev)
struct esp32s2_spi_priv_s *priv = (struct esp32s2_spi_priv_s *)dev;
const uint32_t id = priv->config->id;
uint32_t regval;
uint32_t addr = SPI_DMA_CONF_REG(id);
/* Enable DMA clock for the SPI peripheral */
@@ -1455,12 +1462,12 @@ void esp32s2_spi_dma_init(struct spi_dev_s *dev)
regval = SPI_OUT_DATA_BURST_EN_M |
SPI_INDSCR_BURST_EN_M |
SPI_OUTDSCR_BURST_EN_M;
putreg32(regval, SPI_DMA_CONF_REG(id));
putreg32(regval, addr);
/* Disable segment transaction mode for SPI Master */
putreg32((SPI_SLV_RX_SEG_TRANS_CLR_EN_M | SPI_SLV_TX_SEG_TRANS_CLR_EN_M),
SPI_DMA_CONF_REG(id));
addr);
}
#endif