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https://github.com/apache/nuttx.git
synced 2026-06-06 00:14:22 +08:00
Add tiva PWM lower-half driver implementation
This commit is contained in:
Young
@@ -101,6 +101,10 @@ ifeq ($(CONFIG_TIVA_I2C),y)
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CHIP_CSRCS += tiva_i2c.c
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endif
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ifeq ($(CONFIG_TIVA_PWM),y)
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CHIP_CSRCS += tiva_pwm.c
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endif
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ifeq ($(CONFIG_TIVA_TIMER),y)
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CHIP_CSRCS += tiva_timerlib.c
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ifeq ($(CONFIG_TIVA_TIMER32_PERIODIC),y)
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@@ -0,0 +1,112 @@
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/************************************************************************************
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* arch/arm/src/tiva/chip/tiva_pwm.h
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*
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* Copyright (C) 2016 Young Mu. All rights reserved.
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* Author: Young Mu <young.mu@aliyun.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_PWM_H
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#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_PWM_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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#define TIVA_PWM_CTL_OFFSET (0x0) /* PWM Master Control */
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#define TIVA_PWM_SYNC_OFFSET (0x4) /* PWM Time Base Sync */
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#define TIVA_PWM_ENABLE_OFFSET (0x8) /* PWM Output Enable */
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#define TIVA_PWM_INVERT_OFFSET (0xc) /* PWM Output Inversion */
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#define TIVA_PWM_FAULT_OFFSET (0x10) /* PWM Output Fault */
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#define TIVA_PWM_INTEN_OFFSET (0x14) /* PWM Interrupt Enable */
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#define TIVA_PWM_RIS_OFFSET (0x18) /* PWM Raw Interrupt Status */
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#define TIVA_PWM_ISC_OFFSET (0x1c) /* PWM Interrupt Status and Clear */
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#define TIVA_PWM_STATUS_OFFSET (0x20) /* PWM Status */
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#define TIVA_PWM_FAULTVAL_OFFSET (0x24) /* PWM Fault Condition Value */
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#define TIVA_PWM_ENUPD_OFFSET (0x28) /* PWM Enable Update */
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#define TIVA_PWMn_BASE (0x40) /* PWMn Base */
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#define TIVA_PWMn_INTERVAL (0x40) /* PWMn Interval */
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#define TIVA_PWMn_CTL_OFFSET (0x0) /* PWMn Control */
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#define TIVA_PWMn_INTEN_OFFSET (0x4) /* PWMn Interrupt and Trigger Enable */
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#define TIVA_PWMn_RIS_OFFSET (0x8) /* PWMn Raw Interrupt Status */
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#define TIVA_PWMn_ISC_OFFSET (0xc) /* PWMn Interrupt Status and Clear */
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#define TIVA_PWMn_LOAD_OFFSET (0x10) /* PWMn Load */
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#define TIVA_PWMn_COUNT_OFFSET (0x14) /* PWMn Counter */
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#define TIVA_PWMn_CMPA_OFFSET (0x18) /* PWMn Compare A */
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#define TIVA_PWMn_CMPB_OFFSET (0x1c) /* PWMn Compare B */
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#define TIVA_PWMn_GENA_OFFSET (0x20) /* PWMn Generator A Control */
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#define TIVA_PWMn_GENB_OFFSET (0x24) /* PWMn Generator B Control */
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#define TIVA_PWMn_DBCTL_OFFSET (0x28) /* PWMn Dead-Band Control */
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#define TIVA_PWMn_DBRISE_OFFSET (0x2c) /* PWMn Dead-Band Rising-Edge-Delay */
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#define TIVA_PWMn_DBFALL_OFFSET (0x30) /* PWMn Dead-Band Falling-Edge-Delay */
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#define TIVA_PWMn_FLTSRC0_OFFSET (0x34) /* PWMn Fault Source 0 */
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#define TIVA_PWMn_FLTSRC1_OFFSET (0x38) /* PWMn Fault Source 1 */
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#define TIVA_PWMn_MINFLTPER_OFFSET (0x3c) /* PWMn Minimum Fault Period */
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#define TIVA_PWMn_FAULT_BASE (0x800) /* PWMn Fault Base */
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#define TIVA_PWMn_FAULT_INTERVAL (0x80) /* PWMn Fault Interval */
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#define TIVA_PWMn_FAULT_SEN_OFFSET (0x0) /* PWMn Fault Pin Logic Sense */
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#define TIVA_PWMn_FAULT_STAT0_OFFSET (0x4) /* PWMn Fault Status 0 */
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#define TIVA_PWMn_FAULT_STAT1_OFFSET (0x8) /* PWMn Fault Status 1 */
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#define TIVA_PWM_PP (0xfc0) /* PWM Peripheral Properties */
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#define TIVA_PWM_CC (0xfc8) /* PWM Clock Configuration */
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#define TIVA_PWMn_GENx_ACTCMPBD (10) /* (Bit) Action for Comparator B Down */
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#define TIVA_PWMn_GENx_ACTCMPBU (8) /* (Bit) Action for Comparator B Up */
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#define TIVA_PWMn_GENx_ACTCMPAD (6) /* (Bit) Action for Comparator A Down */
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#define TIVA_PWMn_GENx_ACTCMPAU (4) /* (Bit) Action for Comparator A Up */
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#define TIVA_PWMn_GENx_ACTLOAD (2) /* (Bit) Action for Counter equals LOAD */
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#define TIVA_PWMn_GENx_ACTZERO (0) /* (Bit) Action for Counter equals ZERO */
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#define GENx_INVERT (0x1) /* (Value) Invert */
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#define GENx_LOW (0x2) /* (Value) Drive Low */
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#define GENx_HIGH (0x3) /* (Value) Drive High */
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#define TIVA_PWM_CC_USEPWM (8) /* (Bit) Use PWM Clock Divisor */
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#define TIVA_PWM_CC_PWMDIV (0) /* (Bit) PWM Clock Divider */
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#define CC_USEPWM (0x1) /* (Value) Use PWM divider as clock source */
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#define CC_PWMDIV_2 (0x0) /* (Value) Divided by 2 */
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#define CC_PWMDIV_4 (0x1) /* (Value) Divided by 4 */
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#define CC_PWMDIV_8 (0x2) /* (Value) Divided by 8 */
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#define CC_PWMDIV_16 (0x3) /* (Value) Divided by 16 */
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#define CC_PWMDIV_32 (0x4) /* (Value) Divided by 32 */
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#define CC_PWMDIV_64 (0x5) /* (Value) Divided by 64 */
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#define TIVA_PWMn_CTL_ENABLE (0) /* (Bit) PWM Block Enable */
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#define CTL_ENABLE (1) /* (Value) Enable */
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#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_PWM_H */
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@@ -1895,7 +1895,9 @@
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/* PWM Power Control */
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#define SYSCON_PCPWM_P0 (1 << 0) /* Bit 0: PWM Module 0 Power Control */
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#define SYSCON_PCPWM(n) (1 << (n)) /* Bit n: PWM module n Power Control */
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# define SYSCON_PCPWM_P0 (1 << 0) /* Bit 0: PWM Module 0 Power Control */
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# define SYSCON_PCPWM_P1 (1 << 1) /* Bit 1: PWM Module 1 Power Control */
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/* QE Interface Power Control */
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,54 @@
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/************************************************************************************
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* arch/arm/src/tiva/tiva_pwm.h
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*
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* Copyright (C) 2016 Young Mu. All rights reserved.
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* Author: Young Mu <young.mu@aliyun.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_TIVA_TIVA_PWM_H
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#define __ARCH_ARM_SRC_TIVA_TIVA_PWM_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/drivers/pwm.h>
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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FAR struct pwm_lowerhalf_s *tiva_pwm_initialize(int channel);
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void tm4c_pwm_register(int channel);
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int board_pwm_setup(void);
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#endif /* __ARCH_ARM_SRC_TIVA_TIVA_PWM_H */
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@@ -511,7 +511,7 @@ static int tiva_ioctl(struct timer_lowerhalf_s *lower, int cmd,
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{
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int ret = -ENOTTY;
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DEBUGASSERT(priv);
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DEBUGASSERT(lower);
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tmrinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
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return ret;
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@@ -37,6 +37,9 @@
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* Included Files
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****************************************************************************/
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#include <stdio.h>
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#include <stdint.h>
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#include <nuttx/config.h>
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#include <debug.h>
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@@ -45,8 +48,13 @@
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#include <arch/board/board.h>
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#include "tiva_i2c.h"
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#include "tiva_pwm.h"
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#include "tm4c1294-launchpad.h"
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#define PWM_PATH_FMT "/dev/pwm%d"
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#define PWM_PATH_FMTLEN (10)
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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@@ -55,6 +63,10 @@
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# define HAVE_TIMER
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#endif
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#ifdef CONFIG_TM4C1294_LAUNCHPAD_PWM
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# define HAVE_PWM
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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@@ -136,6 +148,82 @@ static void tm4c_i2ctool(void)
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# define tm4c_i2ctool()
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#endif
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/****************************************************************************
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* Name: tm4c_pwm_register
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*
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* Description:
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* Register a PWM dev file with the upper_level PWM driver.
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*
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* Input Parameters:
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* channel - A number identifying the PWM channel use.
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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void tm4c_pwm_register(int channel)
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{
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FAR struct pwm_lowerhalf_s *dev;
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int ret;
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char pwm_path[PWM_PATH_FMTLEN];
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dev = tiva_pwm_initialize(channel);
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if (dev == NULL)
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{
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dbg("ERROR: Failed to get PWM%d interface\n", channel);
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}
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else
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{
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snprintf(pwm_path, PWM_PATH_FMTLEN, PWM_PATH_FMT, channel);
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ret = pwm_register(pwm_path, dev);
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if (ret < 0)
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{
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dbg("ERROR: Failed to register PWM%d driver: %d\n", channel, ret);
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}
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}
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}
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/****************************************************************************
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* Name: tm4c_pwm
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*
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* Description:
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* Register PWM drivers for the PWM tool.
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*
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****************************************************************************/
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#ifdef HAVE_PWM
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static void tm4c_pwm(void)
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{
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#ifdef CONFIG_TIVA_PWM0_CHAN0
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tm4c_pwm_register(0);
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#endif
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#ifdef CONFIG_TIVA_PWM0_CHAN1
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tm4c_pwm_register(1);
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#endif
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#ifdef CONFIG_TIVA_PWM0_CHAN2
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tm4c_pwm_register(2);
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#endif
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#ifdef CONFIG_TIVA_PWM0_CHAN3
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tm4c_pwm_register(3);
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#endif
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#ifdef CONFIG_TIVA_PWM0_CHAN4
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tm4c_pwm_register(4);
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#endif
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#ifdef CONFIG_TIVA_PWM0_CHAN5
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tm4c_pwm_register(5);
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#endif
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#ifdef CONFIG_TIVA_PWM0_CHAN6
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tm4c_pwm_register(6);
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#endif
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#ifdef CONFIG_TIVA_PWM0_CHAN7
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tm4c_pwm_register(7);
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#endif
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}
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@@ -158,6 +246,10 @@ int tm4c_bringup(void)
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tm4c_i2ctool();
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/* Register PWM drivers */
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tm4c_pwm();
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#ifdef HAVE_TIMER
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/* Initialize the timer driver */
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