mirror of
https://github.com/apache/nuttx.git
synced 2026-05-21 04:52:02 +08:00
risc-v/esp32c3: Add support for MWDT0 and MWDT1
This commit is contained in:
Gustavo Henrique Nihei
committed by
Abdelatif Guettouche
Abdelatif Guettouche
parent
7b8c72ec1b
commit
291a5755cc
@@ -104,6 +104,10 @@ config ESP32C3_CPU_FREQ_MHZ
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menu "ESP32-C3 Peripheral Support"
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config ESP32C3_WDT
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bool
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default n
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config ESP32C3_GPIO_IRQ
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bool "GPIO pin interrupts"
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---help---
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@@ -119,6 +123,33 @@ config ESP32C3_UART1
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default n
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select UART1_SERIALDRIVER
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config ESP32C3_MWDT0
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bool "Main System Watchdog Timer (Group 0)"
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default n
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select ESP32C3_WDT
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---help---
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Includes MWDT0. This watchdog timer is part of the Group 0
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timer submodule.
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config ESP32C3_MWDT1
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bool "Main System Watchdog Timer (Group 1)"
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default n
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select ESP32C3_WDT
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---help---
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Includes MWDT1. This watchdog timer is part of the Group 0
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timer submodule.
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config ESP32C3_RWDT
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bool "RTC Watchdog Timer"
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default n
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select ESP32C3_WDT
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---help---
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Includes RWDT. This watchdog timer is from the RTC module.
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When it is selected, if the developer sets it to reset on expiration
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it will reset Main System and the RTC module. If you don't want
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to have the RTC module reset, please, use the Timers' Module WDTs.
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They will only reset Main System.
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endmenu
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endif # ARCH_CHIP_ESP32C3
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@@ -53,3 +53,10 @@ CHIP_CSRCS = esp32c3_allocateheap.c esp32c3_start.c esp32c3_idle.c
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CHIP_CSRCS += esp32c3_irq.c esp32c3_timerisr.c
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CHIP_CSRCS += esp32c3_clockconfig.c esp32c3_gpio.c
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CHIP_CSRCS += esp32c3_serial.c esp32c3_lowputc.c
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ifeq ($(CONFIG_ESP32C3_WDT),y)
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CHIP_CSRCS += esp32c3_wdt.c
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ifeq ($(CONFIG_WATCHDOG),y)
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CHIP_CSRCS += esp32c3_wdt_lowerhalf.c
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endif
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endif
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,147 @@
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/****************************************************************************
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* arch/riscv/src/esp32c3/esp32c3_wdt.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISCV_SRC_ESP32C3_ESP32C3_WDT_H
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#define __ARCH_RISCV_SRC_ESP32C3_ESP32C3_WDT_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <nuttx/irq.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Helpers ******************************************************************/
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#define ESP32C3_WDT_START(d) ((d)->ops->start(d))
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#define ESP32C3_WDT_STOP(d) ((d)->ops->stop(d))
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#define ESP32C3_WDT_LOCK(d) ((d)->ops->enablewp(d))
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#define ESP32C3_WDT_UNLOCK(d) ((d)->ops->disablewp(d))
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#define ESP32C3_MWDT_PRE(d, v) ((d)->ops->pre(d, v))
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#define ESP32C3_WDT_STO(d, v, s) ((d)->ops->settimeout(d, v, s))
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#define ESP32C3_WDT_FEED(d) ((d)->ops->feed(d))
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#define ESP32C3_WDT_STG_CONF(d, s, c) ((d)->ops->stg_conf(d, s, c))
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#define ESP32C3_MWDT_UPD_CONF(d) ((d)->ops->upd_conf(d))
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#define ESP32C3_RWDT_CLK(d) ((d)->ops->rtc_clk(d))
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#define ESP32C3_WDT_SETISR(d, hnd, arg) ((d)->ops->setisr(d, hnd, arg))
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#define ESP32C3_WDT_ENABLEINT(d) ((d)->ops->enableint(d))
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#define ESP32C3_WDT_DISABLEINT(d) ((d)->ops->disableint(d))
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#define ESP32C3_WDT_ACKINT(d) ((d)->ops->ackint(d))
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* Instances of Watchdog Timer */
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enum esp32c3_wdt_inst_e
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{
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ESP32C3_WDT_MWDT0 = 0, /* Main System Watchdog Timer (MWDT) of Timer Group 0 */
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ESP32C3_WDT_MWDT1, /* Main System Watchdog Timer (MWDT) of Timer Group 1 */
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ESP32C3_WDT_RWDT /* RTC Watchdog Timer (RWDT) */
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};
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/* Stages of a Watchdog Timer. A WDT has 4 stages. */
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enum esp32c3_wdt_stage_e
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{
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ESP32C3_WDT_STAGE0 = 0, /* Stage 0 */
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ESP32C3_WDT_STAGE1 = 1, /* Stage 1 */
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ESP32C3_WDT_STAGE2 = 2, /* Stage 2 */
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ESP32C3_WDT_STAGE3 = 3 /* Stage 3 */
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};
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/**
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* Behavior of the WDT stage if it times out.
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*
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* @note These enum values should be compatible with the
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* corresponding register field values.
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*/
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enum esp32c3_wdt_stage_action_e
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{
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ESP32C3_WDT_STAGE_ACTION_OFF = 0, /* Disabled. This stage will have no effects on the system. */
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ESP32C3_WDT_STAGE_ACTION_INT = 1, /* Trigger an interrupt when the stage expires. */
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ESP32C3_WDT_STAGE_ACTION_RESET_CPU = 2, /* Reset a CPU core when the stage expires. */
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ESP32C3_WDT_STAGE_ACTION_RESET_SYSTEM = 3, /* Reset the main system when the stage expires.
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* This includes the CPU and all peripherals.
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* The RTC is an exception and will not be reset.
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*/
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ESP32C3_WDT_STAGE_ACTION_RESET_RTC = 4 /* Reset the main system and the RTC when the stage expires.
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* ONLY AVAILABLE FOR RWDT.
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*/
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};
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/* ESP32 WDT device */
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struct esp32c3_wdt_dev_s
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{
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struct esp32c3_wdt_ops_s *ops;
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};
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/* ESP32 WDT ops */
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/* This is a struct containing the pointers to the wdt operations */
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struct esp32c3_wdt_ops_s
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{
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/* WDT tasks */
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void (*start)(struct esp32c3_wdt_dev_s *dev);
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void (*stop)(struct esp32c3_wdt_dev_s *dev);
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/* WDT configuration */
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void (*enablewp)(struct esp32c3_wdt_dev_s *dev);
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void (*disablewp)(struct esp32c3_wdt_dev_s *dev);
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void (*pre)(struct esp32c3_wdt_dev_s *dev, uint16_t value);
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int32_t (*settimeout)(struct esp32c3_wdt_dev_s *dev,
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uint32_t value,
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enum esp32c3_wdt_stage_e stage);
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void (*feed)(struct esp32c3_wdt_dev_s *dev);
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int32_t (*stg_conf)(struct esp32c3_wdt_dev_s *dev,
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enum esp32c3_wdt_stage_e stage,
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enum esp32c3_wdt_stage_action_e conf);
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void (*upd_conf)(struct esp32c3_wdt_dev_s *dev);
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uint16_t (*rtc_clk)(struct esp32c3_wdt_dev_s *dev);
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/* WDT interrupts */
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int32_t (*setisr)(struct esp32c3_wdt_dev_s *dev, xcpt_t handler,
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void * arg);
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void (*enableint)(struct esp32c3_wdt_dev_s *dev);
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void (*disableint)(struct esp32c3_wdt_dev_s *dev);
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void (*ackint)(struct esp32c3_wdt_dev_s *dev);
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};
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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struct esp32c3_wdt_dev_s *esp32c3_wdt_init(enum esp32c3_wdt_inst_e wdt_id);
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void esp32c3_wdt_deinit(struct esp32c3_wdt_dev_s *dev);
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bool esp32c3_wdt_is_running(struct esp32c3_wdt_dev_s *dev);
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#endif /* __ARCH_RISCV_SRC_ESP32C3_ESP32C3_WDT_H */
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,58 @@
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/****************************************************************************
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* arch/riscv/src/esp32c3/esp32c3_wdt_lowerhalf.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISCV_SRC_ESP32C3_ESP32C3_WDT_LOWERHALF_H
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#define __ARCH_RISCV_SRC_ESP32C3_ESP32C3_WDT_LOWERHALF_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include "esp32c3_wdt.h"
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: esp32c3_wdt_initialize
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*
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* Description:
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* Initialize the watchdog timer. The watchdog timer is initialized
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* and registered as 'devpath'.
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*
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* Input Parameters:
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* devpath - The full path to the watchdog. This should
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* be of the form /dev/watchdogX
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* wdt - WDT instance to be initialized.
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*
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* Returned Values:
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* Zero (OK) is returned on success; a negated errno value is returned on
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* any failure.
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*
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****************************************************************************/
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int esp32c3_wdt_initialize(const char *devpath, enum esp32c3_wdt_inst_e wdt);
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#endif /* __ARCH_RISCV_SRC_ESP32C3_ESP32C3_WDT_LOWERHALF_H */
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -96,6 +96,33 @@ Configurations
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The pin is configured as a rising edge interrupt, so after issuing the
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above command, connect it to 3.3V.
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watchdog
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--------
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This configuration tests the watchdog timers. It includes the 2 MWDTS,
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adds driver support, registers the WDTs as devices and includes the watchdog
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example application.
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To test it, just run the following command:
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`nsh> wdog -i /dev/watchdogX`
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Where X ix the watchdog instance.
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watcher
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-------
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This configuration tests the watchdog timers in the capture mode.
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It includes the 2 MWDTS, adds driver support, registers the WDTs as devices
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and includes the watcher and watched example applications.
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To test it, just run the following command:
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```
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nsh> watcher
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nsh> watched
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```
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Building and flashing
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=====================
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@@ -0,0 +1,48 @@
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#
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# This file is autogenerated: PLEASE DO NOT EDIT IT.
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#
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# You can use "make menuconfig" to make any modifications to the installed .config file.
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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# CONFIG_NSH_ARGCAT is not set
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# CONFIG_NSH_CMDOPT_HEXDUMP is not set
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# CONFIG_NSH_CMDPARMS is not set
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CONFIG_ARCH="risc-v"
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CONFIG_ARCH_BOARD="esp32c3-devkit"
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CONFIG_ARCH_BOARD_ESP32C3_DEVKIT=y
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CONFIG_ARCH_CHIP="esp32c3"
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CONFIG_ARCH_CHIP_ESP32C3=y
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CONFIG_ARCH_CHIP_ESP32C3WROOM02=y
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CONFIG_ARCH_INTERRUPTSTACK=1536
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CONFIG_ARCH_RISCV=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_BOARD_LOOPSPERMSEC=15000
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CONFIG_BUILTIN=y
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CONFIG_DEV_ZERO=y
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CONFIG_ESP32C3_MWDT0=y
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CONFIG_ESP32C3_MWDT1=y
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CONFIG_EXAMPLES_WATCHDOG=y
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CONFIG_FS_PROCFS=y
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CONFIG_IDLETHREAD_STACKSIZE=2048
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CONFIG_INTELHEX_BINARY=y
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CONFIG_LIBC_PERROR_STDOUT=y
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CONFIG_LIBC_STRERROR=y
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CONFIG_MAX_TASKS=8
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CONFIG_NFILE_DESCRIPTORS=6
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_FILEIOSIZE=512
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CONFIG_NSH_READLINE=y
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CONFIG_NSH_STRERROR=y
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CONFIG_PREALLOC_TIMERS=0
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CONFIG_RAW_BINARY=y
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CONFIG_RR_INTERVAL=200
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CONFIG_SCHED_WAITPID=y
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CONFIG_START_DAY=29
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CONFIG_START_MONTH=11
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CONFIG_START_YEAR=2019
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CONFIG_SYSTEM_NSH=y
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CONFIG_UART0_SERIAL_CONSOLE=y
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CONFIG_USER_ENTRYPOINT="nsh_main"
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CONFIG_WATCHDOG=y
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@@ -0,0 +1,51 @@
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#
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# This file is autogenerated: PLEASE DO NOT EDIT IT.
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#
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# You can use "make menuconfig" to make any modifications to the installed .config file.
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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# CONFIG_NSH_ARGCAT is not set
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# CONFIG_NSH_CMDOPT_HEXDUMP is not set
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# CONFIG_NSH_CMDPARMS is not set
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CONFIG_ARCH="risc-v"
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CONFIG_ARCH_BOARD="esp32c3-devkit"
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CONFIG_ARCH_BOARD_ESP32C3_DEVKIT=y
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CONFIG_ARCH_CHIP="esp32c3"
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CONFIG_ARCH_CHIP_ESP32C3=y
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CONFIG_ARCH_CHIP_ESP32C3WROOM02=y
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CONFIG_ARCH_INTERRUPTSTACK=1536
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CONFIG_ARCH_RISCV=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_BOARD_LOOPSPERMSEC=15000
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CONFIG_BUILTIN=y
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CONFIG_DEV_ZERO=y
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CONFIG_DRIVER_NOTE=y
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CONFIG_ESP32C3_MWDT0=y
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CONFIG_ESP32C3_MWDT1=y
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CONFIG_EXAMPLES_WATCHER=y
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CONFIG_FS_FAT=y
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CONFIG_FS_PROCFS=y
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CONFIG_IDLETHREAD_STACKSIZE=2048
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CONFIG_INTELHEX_BINARY=y
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CONFIG_LIBC_PERROR_STDOUT=y
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CONFIG_LIBC_STRERROR=y
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CONFIG_MAX_TASKS=8
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CONFIG_NFILE_DESCRIPTORS=6
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_FILEIOSIZE=512
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CONFIG_NSH_READLINE=y
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CONFIG_NSH_STRERROR=y
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CONFIG_PREALLOC_TIMERS=0
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CONFIG_RAW_BINARY=y
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CONFIG_RR_INTERVAL=200
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CONFIG_SCHED_INSTRUMENTATION=y
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CONFIG_SCHED_WAITPID=y
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CONFIG_START_DAY=29
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CONFIG_START_MONTH=11
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CONFIG_START_YEAR=2019
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CONFIG_SYSTEM_NSH=y
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CONFIG_UART0_SERIAL_CONSOLE=y
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CONFIG_USER_ENTRYPOINT="nsh_main"
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CONFIG_WATCHDOG=y
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@@ -34,6 +34,10 @@ ifeq ($(CONFIG_DEV_GPIO),y)
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CSRCS += esp32c3_gpio.c
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endif
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ifeq ($(CONFIG_WATCHDOG),y)
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CSRCS += esp32c3_wdt.c
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endif
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SCRIPTIN = $(SCRIPTDIR)$(DELIM)esp32c3.template.ld
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SCRIPTOUT = $(SCRIPTDIR)$(DELIM)esp32c3_out.ld
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@@ -25,9 +25,7 @@
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/compiler.h>
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#include <stdint.h>
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/****************************************************************************
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* Pre-processor Definitions
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@@ -71,5 +69,21 @@ int esp32c3_bringup(void);
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int esp32c3_gpio_init(void);
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#endif
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/****************************************************************************
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* Name: board_wdt_init
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*
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* Description:
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* Configure the timer driver.
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*
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* Returned Value:
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* Zero (OK) is returned on success; A negated errno value is returned
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* to indicate the nature of any failure.
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*
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****************************************************************************/
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#ifdef CONFIG_WATCHDOG
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int board_wdt_init(void);
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_SRC_ESP32C3_DEVKIT_H */
|
||||
|
||||
@@ -22,15 +22,6 @@
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "esp32c3-devkit.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
@@ -85,6 +85,18 @@ int esp32c3_bringup(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_WATCHDOG
|
||||
/* Configure watchdog timer */
|
||||
|
||||
ret = board_wdt_init();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR,
|
||||
"ERROR: Failed to initialize watchdog drivers: %d\n",
|
||||
ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* If we got here then perhaps not all initialization was successful, but
|
||||
* at least enough succeeded to bring-up NSH with perhaps reduced
|
||||
* capabilities.
|
||||
|
||||
@@ -0,0 +1,94 @@
|
||||
/****************************************************************************
|
||||
* boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_wdt.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include "esp32c3_wdt_lowerhalf.h"
|
||||
#include "esp32c3_wdt.h"
|
||||
|
||||
#include "esp32c3-devkit.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_wdt_init
|
||||
*
|
||||
* Description:
|
||||
* Configure the watchdog timer driver.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) is returned on success; A negated errno value is returned
|
||||
* to indicate the nature of any failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int board_wdt_init(void)
|
||||
{
|
||||
int ret = OK;
|
||||
|
||||
#ifdef CONFIG_ESP32C3_MWDT0
|
||||
ret = esp32c3_wdt_initialize("/dev/watchdog0", ESP32C3_WDT_MWDT0);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR,
|
||||
"ERROR: Failed to initialize watchdog driver: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
#endif /* CONFIG_ESP32C3_MWDT0 */
|
||||
|
||||
#ifdef CONFIG_ESP32C3_MWDT1
|
||||
ret = esp32c3_wdt_initialize("/dev/watchdog1", ESP32C3_WDT_MWDT1);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR,
|
||||
"ERROR: Failed to initialize watchdog driver: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
#endif /* CONFIG_ESP32C3_MWDT1 */
|
||||
|
||||
#ifdef CONFIG_ESP32C3_RWDT
|
||||
ret = esp32c3_wdt_initialize("/dev/watchdog2", ESP32C3_WDT_RWDT);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR,
|
||||
"ERROR: Failed to initialize watchdog driver: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
#endif /* CONFIG_ESP32C3_RWDT */
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user