Mirrors_Framework/nuttx
1
0
Fork 0
mirror of https://github.com/apache/nuttx.git synced 2026-06-06 16:50:55 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity

DMA driver now compiles

Browse Source 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2569 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2010-04-02 16:23:10 +00:00
parent 47c169eadc
commit 26339f7ead
4 changed files with 238 additions and 192 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/sam3u/Make.defs
+17 -2
View File
@@ -33,8 +33,12 @@
#
############################################################################
# The start-up, "head", file
HEAD_ASRC = sam3u_vectors.S
# Common ARM and Cortex-M3 files
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
up_mdelay.c up_udelay.c up_exit.c up_idle.c up_initialize.c \
@@ -44,8 +48,19 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \
up_hardfault.c up_svcall.c
# Required SAM3U files
CHIP_ASRCS =
CHIP_CSRCS = sam3u_allocateheap.c sam3u_clockconfig.c sam3u_gpioirq.c \
sam3u_hsmci.c sam3u_irq.c sam3u_lowputc.c sam3u_pio.c \
sam3u_serial.c sam3u_start.c sam3u_timerisr.c
sam3u_irq.c sam3u_lowputc.c sam3u_pio.c sam3u_serial.c \
sam3u_start.c sam3u_timerisr.c
# Configuration-dependent SAM3U files
ifeq ($(CONFIG_SAM3U_DMA),y)
CHIP_CSRCS += sam3u_dmac.c
endif
ifeq ($(CONFIG_SAM3U_HSMCI),y)
CHIP_CSRCS += sam3u_hsmci.c
endif
arch/arm/src/sam3u/sam3u_dmac.c
+214 -187
View File
File diff suppressed because it is too large Load Diff
arch/arm/src/sam3u/sam3u_dmac.h
+5 -1
View File
@@ -263,7 +263,11 @@
# define DMAC_EBC_ERR1 (1 << (DMAC_EBC_ERR_SHIFT+1))
# define DMAC_EBC_ERR2 (1 << (DMAC_EBC_ERR_SHIFT+2))
# define DMAC_EBC_ERR3 (1 << (DMAC_EBC_ERR_SHIFT+3))
#define DMAC_DBC_ERR_ALLINTS (0x000f0f0f)
#define DMAC_EBC_BTCINTS(n) (0x00010001 << (n)) /* BTC + ERR interrupts */
#define DMAC_EBC_CBTCINTS(n) (0x00010100 << (n)) /* CBT + ERR interrupts */
#define DMAC_EBC_CHANINTS(n) (0x00010101 << (n)) /* All channel interrupts */
#define DMAC_EBC_ALLINTS (0x000f0f0f) /* All interrupts */
/* DMAC Channel Handler Enable Register */
arch/arm/src/sam3u/sam3u_internal.h
+2 -2
View File
@@ -566,8 +566,8 @@ EXTERN void sam3u_dmafree(DMA_HANDLE handle);
*
****************************************************************************/
EXTERN void sam3u_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t nbytes);
EXTERN int sam3u_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t nbytes);
/****************************************************************************
* Name: sam3u_dmarxsetup