mirror of
https://github.com/apache/nuttx.git
synced 2026-06-06 08:36:24 +08:00
LPC43 pinset definitions: Add more 1 bit to pinset to reach SFSCLK0-SFSCLK3
This commit is contained in:
Alan Carvalho de Assis
committed by
Gregory Nutt
Gregory Nutt
parent
cf2beeb1cf
commit
25bf212ab4
@@ -947,6 +947,11 @@
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#define PINCONF_USB1_ULPI_STP_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_10)
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#define PINCONF_USB1_VBUS (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_5)
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#define PINCONF_CLK0 (PINCONF_PINSO|PINCONF_PIN_0)
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#define PINCONF_CLK1 (PINCONF_PINSO|PINCONF_PIN_1)
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#define PINCONF_CLK2 (PINCONF_PINSO|PINCONF_PIN_2)
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#define PINCONF_CLK3 (PINCONF_PINSO|PINCONF_PIN_3)
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#define CLKCONF_CGU_OUT0 (PINCONF_FUNC5|PINCONF_CLK1)
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#define CLKCONF_CGU_OUT1 (PINCONF_FUNC5|PINCONF_CLK3)
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#define CLKCONF_CLKOUT_1 (PINCONF_FUNC1|PINCONF_CLK0)
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@@ -965,8 +970,8 @@
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#define CLKCONF_I2S1_RX_SCK_1 (PINCONF_FUNC7|PINCONF_CLK2)
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#define CLKCONF_I2S1_RX_SCK_2 (PINCONF_FUNC7|PINCONF_CLK3)
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#define CLKCONF_I2S1_TX_MCLK (PINCONF_FUNC7|PINCONF_CLK1)
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#define CLKCONF_SD_CLK_1 (PINCONF_FUNC4|PINCONF_CLK0)
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#define CLKCONF_SD_CLK_2 (PINCONF_FUNC4|PINCONF_CLK2)
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#define CLKCONF_SD_CLK_1 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_CLK0)
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#define CLKCONF_SD_CLK_2 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_CLK2)
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#define CLKCONF_SSP1_SCK (PINCONF_FUNC6|PINCONF_CLK0)
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/****************************************************************************************************
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@@ -945,6 +945,11 @@
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#define PINCONF_USB1_ULPI_STP_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_10)
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#define PINCONF_USB1_VBUS (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_5)
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#define PINCONF_CLK0 (PINCONF_PINSO|PINCONF_PIN_0)
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#define PINCONF_CLK1 (PINCONF_PINSO|PINCONF_PIN_1)
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#define PINCONF_CLK2 (PINCONF_PINSO|PINCONF_PIN_2)
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#define PINCONF_CLK3 (PINCONF_PINSO|PINCONF_PIN_3)
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#define CLKCONF_CGU_OUT0 (PINCONF_FUNC5|PINCONF_CLK1)
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#define CLKCONF_CGU_OUT1 (PINCONF_FUNC5|PINCONF_CLK3)
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#define CLKCONF_CLKOUT_1 (PINCONF_FUNC1|PINCONF_CLK0)
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@@ -963,8 +968,8 @@
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#define CLKCONF_I2S1_RX_SCK_1 (PINCONF_FUNC7|PINCONF_CLK2)
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#define CLKCONF_I2S1_RX_SCK_2 (PINCONF_FUNC7|PINCONF_CLK3)
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#define CLKCONF_I2S1_TX_MCLK (PINCONF_FUNC7|PINCONF_CLK1)
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#define CLKCONF_SD_CLK_1 (PINCONF_FUNC4|PINCONF_CLK0)
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#define CLKCONF_SD_CLK_2 (PINCONF_FUNC4|PINCONF_CLK2)
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#define CLKCONF_SD_CLK_1 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_CLK0)
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#define CLKCONF_SD_CLK_2 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_CLK2)
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#define CLKCONF_SSP1_SCK (PINCONF_FUNC6|PINCONF_CLK0)
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/****************************************************************************************************
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@@ -945,6 +945,11 @@
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#define PINCONF_USB1_ULPI_STP_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_10)
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#define PINCONF_USB1_VBUS (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_5)
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#define PINCONF_CLK0 (PINCONF_PINSO|PINCONF_PIN_0)
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#define PINCONF_CLK1 (PINCONF_PINSO|PINCONF_PIN_1)
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#define PINCONF_CLK2 (PINCONF_PINSO|PINCONF_PIN_2)
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#define PINCONF_CLK3 (PINCONF_PINSO|PINCONF_PIN_3)
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#define CLKCONF_CGU_OUT0 (PINCONF_FUNC5|PINCONF_CLK1)
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#define CLKCONF_CGU_OUT1 (PINCONF_FUNC5|PINCONF_CLK3)
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#define CLKCONF_CLKOUT_1 (PINCONF_FUNC1|PINCONF_CLK0)
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@@ -963,8 +968,8 @@
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#define CLKCONF_I2S1_RX_SCK_1 (PINCONF_FUNC7|PINCONF_CLK2)
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#define CLKCONF_I2S1_RX_SCK_2 (PINCONF_FUNC7|PINCONF_CLK3)
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#define CLKCONF_I2S1_TX_MCLK (PINCONF_FUNC7|PINCONF_CLK1)
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#define CLKCONF_SD_CLK_1 (PINCONF_FUNC4|PINCONF_CLK0)
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#define CLKCONF_SD_CLK_2 (PINCONF_FUNC4|PINCONF_CLK2)
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#define CLKCONF_SD_CLK_1 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_CLK0)
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#define CLKCONF_SD_CLK_2 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_CLK2)
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#define CLKCONF_SSP1_SCK (PINCONF_FUNC6|PINCONF_CLK0)
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/****************************************************************************************************
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@@ -54,11 +54,11 @@
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* following definitions provide the bit encoding that is used to define a pin configuration.
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* Note that these pins do not corresponding GPIO ports and pins.
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*
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* 20-bit Encoding:
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* 21-bit Encoding:
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .FFF UUDD IGWS SSSP PPPP
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* FFFU UDDI GWSS SSSP PPPP
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*/
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/* Alternate function number:
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@@ -66,10 +66,10 @@
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .FFF .... .... .... ....
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* FFF. .... .... .... ....
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*/
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#define PINCONF_FUNC_SHIFT (16) /* Bits 16-18: Alternate function number */
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#define PINCONF_FUNC_SHIFT (17) /* Bits 16-18: Alternate function number */
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#define PINCONF_FUNC_MASK (7 << PINCONF_FUNC_SHIFT)
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# define PINCONF_FUNC(n) ((n) << PINCONF_FUNC_SHIFT)
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# define PINCONF_FUNC0 (0 << PINCONF_FUNC_SHIFT)
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@@ -87,12 +87,12 @@
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... UU.. .... .... ....
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* ...U U... .... .... ....
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*/
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#define PINCONF_PULLUP (1 << 15) /* Bit 15: 1=Pull-up */
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#define PINCONF_PULLDOWN (1 << 14) /* Bit 14: 1=Pull-down */
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#define PINCONF_FLOAT (0) /* Bit 14-15=0 if neither */
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#define PINCONF_PULLUP (1 << 16) /* Bit 16: 1=Pull-up */
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#define PINCONF_PULLDOWN (1 << 15) /* Bit 15: 1=Pull-down */
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#define PINCONF_FLOAT (0) /* Bit 15-16=0 if neither */
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#define PINCONF_IS_PULLUP(p) (((p) & PINCONF_PULLUP) != 0)
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#define PINCONF_IS_PULLDOWN(p) (((p) & PINCONF_PULLDOWN) != 0)
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@@ -103,10 +103,10 @@
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... ..DD .... .... ....
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* .... .DD. .... .... ....
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*/
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#define PINCONF_DRIVE_SHIFT (12) /* Bits 12-13 = Pin drive strength */
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#define PINCONF_DRIVE_SHIFT (13) /* Bits 12-13 = Pin drive strength */
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#define PINCONF_DRIVE_MASK (3 << PINCONF_DRIVE_SHIFT)
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# define PINCONF_DRIVE_NORMAL (0 << PINCONF_DRIVE_SHIFT)
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# define PINCONF_DRIVE_MEDIUM (1 << PINCONF_DRIVE_SHIFT)
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@@ -118,10 +118,10 @@
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... .... I... .... ....
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* .... ...I .... .... ....
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*/
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#define PINCONF_INBUFFER (1 << 11) /* Bit 11: 1=Enabled input buffer */
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#define PINCONF_INBUFFER (1 << 12) /* Bit 11: 1=Enabled input buffer */
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#define PINCONF_INBUFFER_ENABLED(p) (((p) & PINCONF_INBUFFER) != 0)
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/* Glitch filter enable
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@@ -129,10 +129,10 @@
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... .... .G.. .... ....
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* .... .... G... .... ....
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*/
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#define PINCONF_GLITCH (1 << 10) /* Bit 10: 1=Glitch filter enable */
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#define PINCONF_GLITCH (1 << 11) /* Bit 10: 1=Glitch filter enable */
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#define PINCONF_GLITCH_ENABLE(p) (((p) & PINCONF_GLITCH) == 0)
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/* Slew rate
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@@ -140,10 +140,10 @@
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... .... ..W. .... ....
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* .... .... .W.. .... ....
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*/
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#define PINCONF_SLEW_FAST (1 << 9) /* Bit 9: 1=Alternate function */
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#define PINCONF_SLEW_FAST (1 << 10) /* Bit 9: 1=Alternate function */
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#define PINCONF_SLEW_SLOW (0) /* Bit 9: 0=Normal function */
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#define PINCONF_IS_SLEW_FAST(p) (((p) & PINCONF_SLEW_FAST) != 0)
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@@ -154,11 +154,11 @@
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... .... ...S SSS. ....
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* .... .... ..SS SSS. ....
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*/
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#define PINCONF_PINS_SHIFT (5) /* Bits 5-8: Pin set */
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#define PINCONF_PINS_MASK (15 << PINCONF_PINS_SHIFT)
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#define PINCONF_PINS_SHIFT (5) /* Bits 5-9: Pin set */
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#define PINCONF_PINS_MASK (31 << PINCONF_PINS_SHIFT)
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# define PINCONF_PINS0 (0 << PINCONF_PINS_SHIFT)
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# define PINCONF_PINS1 (1 << PINCONF_PINS_SHIFT)
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# define PINCONF_PINS2 (2 << PINCONF_PINS_SHIFT)
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@@ -175,6 +175,22 @@
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# define PINCONF_PINSD (13 << PINCONF_PINS_SHIFT)
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# define PINCONF_PINSE (14 << PINCONF_PINS_SHIFT)
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# define PINCONF_PINSF (15 << PINCONF_PINS_SHIFT)
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# define PINCONF_PINSG (16 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSH (17 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSI (18 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSJ (19 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSK (20 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSL (21 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSM (22 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSN (23 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSO (24 << PINCONF_PINS_SHIFT) /* SFSCLK0 - SFSCLK3 */
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# define PINCONF_PINSP (25 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSQ (26 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSR (27 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSS (28 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINST (29 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSU (30 << PINCONF_PINS_SHIFT) /* Reserved */
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# define PINCONF_PINSV (31 << PINCONF_PINS_SHIFT) /* Reserved */
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/* Pin numbers:
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*
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