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/****************************************************************************************************
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* arch/arm/src/tms570/chip/tms570_gio.h
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* Secondary System Control Register Definitions
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* References:
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*
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* TMS570LS04x/03x 16/32-Bit RISC Flash Microcontroller, Technical Reference Manual, Texas
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* Instruments, Literature Number: SPNU517A, September 2013
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************************/
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#ifndef __ARCH_ARM_SRC_TMS570_CHIP_TMS570_GIO_H
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#define __ARCH_ARM_SRC_TMS570_CHIP_TMS570_GIO_H
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/****************************************************************************************************
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* Included Files
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****************************************************************************************************/
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#include <nuttx/config.h>
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#include "chip/tms570_memorymap.h"
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/****************************************************************************************************
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* Pre-processor Definitions
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****************************************************************************************************/
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#define TMS570_GIOA 0
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#define TMS570_GIOB 1
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#define TMS570_GIOC 2
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#define TMS570_GIOD 3
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#define TMS570_GIOE 4
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#define TMS570_GIOF 5
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#define TMS570_GIOG 6
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#define TMS570_GIOH 7
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/* Register Offsets *********************************************************************************/
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#define TMS570_GIO_GCR0_OFFSET 0x0000 /* GIO Global Control Register */
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#define TMS570_GIO_INTDET_OFFSET 0x0008 /* GIO Interrupt Detect Register */
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#define TMS570_GIO_POL_OFFSET 0x000c /* GIO Interrupt Polarity Register */
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#define TMS570_GIO_ENASET_OFFSET 0x0010 /* GIO Interrupt Enable Set Register */
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#define TMS570_GIO_ENACLR_OFFSET 0x0014 /* GIO Interrupt Enable Clear Register */
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#define TMS570_GIO_LVLSET_OFFSET 0x0018 /* GIO Interrupt Priority Set Register */
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#define TMS570_GIO_LVLCLR_OFFSET 0x001c /* GIO Interrupt Priority Clear Register */
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#define TMS570_GIO_FLG_OFFSET 0x0020 /* GIO Interrupt Flag Register */
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#define TMS570_GIO_OFF1_OFFSET 0x0024 /* GIO Offset 1 Register */
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#define TMS570_GIO_OFF2_OFFSET 0x0028 /* GIO Offset 2 Register */
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#define TMS570_GIO_EMU1_OFFSET 0x002c /* GIO Emulation 1 Register */
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#define TMS570_GIO_EMU2_OFFSET 0x0030 /* GIO Emulation 2 Register */
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#define TMS570_GIO_OFFSET(n) (0x0034 + ((n) << 5))
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#define TMS570_GIO_DIR_OFFSET 0x0000 /* GIO Data Direction Register */
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#define TMS570_GIO_DIN_OFFSET 0x0004 /* GIO Data Input Register */
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#define TMS570_GIO_DOUT_OFFSET 0x0008 /* GIO Data Output Register */
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#define TMS570_GIO_DSET_OFFSET 0x000c /* GIO Data Set Register */
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#define TMS570_GIO_DCLR_OFFSET 0x0010 /* GIO Data Clear Register */
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#define TMS570_GIO_PDR_OFFSET 0x0014 /* GIO Open Drain Register */
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#define TMS570_GIO_PULDIS_OFFSET 0x0018 /* GIO Pull Disable Register */
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#define TMS570_GIO_PSL_OFFSET 0x001c /* GIO Pull Select Register */
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#define TMS570_GIOA_DIR_OFFSET 0x0034 /* GIOA Data Direction Register */
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#define TMS570_GIOA_DIN_OFFSET 0x0038 /* GIOA Data Input Register */
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#define TMS570_GIOA_DOUT_OFFSET 0x003c /* GIOA Data Output Register */
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#define TMS570_GIOA_DSET_OFFSET 0x0040 /* GIOA Data Set Register */
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#define TMS570_GIOA_DCLR_OFFSET 0x0044 /* GIOA Data Clear Register */
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#define TMS570_GIOA_PDR_OFFSET 0x0048 /* GIOA Open Drain Register */
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#define TMS570_GIOA_PULDIS_OFFSET 0x004c /* GIOA Pull Disable Register */
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#define TMS570_GIOA_PSL_OFFSET 0x0050 /* GIOA Pull Select Register */
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#define TMS570_GIOB_DIR_OFFSET 0x0054 /* GIOB Data Direction Register */
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#define TMS570_GIOB_DIN_OFFSET 0x0058 /* GIOB Data Input Register */
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#define TMS570_GIOB_DOUT_OFFSET 0x005c /* GIOB Data Output Register */
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#define TMS570_GIOB_DSET_OFFSET 0x0060 /* GIOB Data Set Register */
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#define TMS570_GIOB_DCLR_OFFSET 0x0064 /* GIOB Data Clear Register */
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#define TMS570_GIOB_PDR_OFFSET 0x0068 /* GIOB Open Drain Register */
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#define TMS570_GIOB_PULDIS_OFFSET 0x006c /* GIOB Pull Disable Register */
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#define TMS570_GIOB_PSL_OFFSET 0x0070 /* GIOB Pull Select Register */
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#define TMS570_GIOC_DIR_OFFSET 0x0074 /* GIOC Data Direction Register */
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#define TMS570_GIOC_DIN_OFFSET 0x0078 /* GIOC Data Input Register */
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#define TMS570_GIOC_DOUT_OFFSET 0x007c /* GIOC Data Output Register */
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#define TMS570_GIOC_DSET_OFFSET 0x0080 /* GIOC Data Set Register */
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#define TMS570_GIOC_DCLR_OFFSET 0x0084 /* GIOC Data Clear Register */
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#define TMS570_GIOC_PDR_OFFSET 0x0088 /* GIOC Open Drain Register */
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#define TMS570_GIOC_PULDIS_OFFSET 0x008c /* GIOC Pull Disable Register */
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#define TMS570_GIOC_PSL_OFFSET 0x0090 /* GIOC Pull Select Register */
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#define TMS570_GIOD_DIR_OFFSET 0x0094 /* GIOD Data Direction Register */
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#define TMS570_GIOD_DIN_OFFSET 0x0098 /* GIOD Data Input Register */
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#define TMS570_GIOD_DOUT_OFFSET 0x009c /* GIOD Data Output Register */
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#define TMS570_GIOD_DSET_OFFSET 0x00a0 /* GIOD Data Set Register */
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#define TMS570_GIOD_DCLR_OFFSET 0x00a4 /* GIOD Data Clear Register */
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#define TMS570_GIOD_PDR_OFFSET 0x00a8 /* GIOD Open Drain Register */
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#define TMS570_GIOD_PULDIS_OFFSET 0x00ac /* GIOD Pull Disable Register */
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#define TMS570_GIOD_PSL_OFFSET 0x00b0 /* GIOD Pull Select Register */
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#define TMS570_GIOE_DIR_OFFSET 0x00b4 /* GIOE Data Direction Register */
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#define TMS570_GIOE_DIN_OFFSET 0x00b8 /* GIOE Data Input Register */
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#define TMS570_GIOE_DOUT_OFFSET 0x00bc /* GIOE Data Output Register */
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#define TMS570_GIOE_DSET_OFFSET 0x00c0 /* GIOE Data Set Register */
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#define TMS570_GIOE_DCLR_OFFSET 0x00c4 /* GIOE Data Clear Register */
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#define TMS570_GIOE_PDR_OFFSET 0x00c8 /* GIOE Open Drain Register */
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#define TMS570_GIOE_PULDIS_OFFSET 0x00cc /* GIOE Pull Disable Register */
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#define TMS570_GIOE_PSL_OFFSET 0x00d0 /* GIOE Pull Select Register */
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#define TMS570_GIOF_DIR_OFFSET 0x00d4 /* GIOF Data Direction Register */
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#define TMS570_GIOF_DIN_OFFSET 0x00d8 /* GIOF Data Input Register */
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#define TMS570_GIOF_DOUT_OFFSET 0x00dc /* GIOF Data Output Register */
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#define TMS570_GIOF_DSET_OFFSET 0x00e0 /* GIOF Data Set Register */
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#define TMS570_GIOF_DCLR_OFFSET 0x00e4 /* GIOF Data Clear Register */
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#define TMS570_GIOF_PDR_OFFSET 0x00e8 /* GIOF Open Drain Register */
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#define TMS570_GIOF_PULDIS_OFFSET 0x00ec /* GIOF Pull Disable Register */
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#define TMS570_GIOF_PSL_OFFSET 0x00f0 /* GIOF Pull Select Register */
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#define TMS570_GIOG_DIR_OFFSET 0x00f4 /* GIOG Data Direction Register */
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#define TMS570_GIOG_DIN_OFFSET 0x00f8 /* GIOG Data Input Register */
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#define TMS570_GIOG_DOUT_OFFSET 0x00fc /* GIOG Data Output Register */
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#define TMS570_GIOG_DSET_OFFSET 0x0100 /* GIOG Data Set Register */
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#define TMS570_GIOG_DCLR_OFFSET 0x0104 /* GIOG Data Clear Register */
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#define TMS570_GIOG_PDR_OFFSET 0x0108 /* GIOG Open Drain Register */
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#define TMS570_GIOG_PULDIS_OFFSET 0x010c /* GIOG Pull Disable Register */
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#define TMS570_GIOG_PSL_OFFSET 0x0110 /* GIOG Pull Select Register */
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#define TMS570_GIOH_DIR_OFFSET 0x0114 /* GIOH Data Direction Register */
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#define TMS570_GIOH_DIN_OFFSET 0x0118 /* GIOH Data Input Register */
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#define TMS570_GIOH_DOUT_OFFSET 0x011c /* GIOH Data Output Register */
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#define TMS570_GIOH_DSET_OFFSET 0x0120 /* GIOH Data Set Register */
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#define TMS570_GIOH_DCLR_OFFSET 0x0124 /* GIOH Data Clear Register */
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#define TMS570_GIOH_PDR_OFFSET 0x0128 /* GIOH Open Drain Register */
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#define TMS570_GIOH_PULDIS_OFFSET 0x012c /* GIOH Pull Disable Register */
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#define TMS570_GIOH_PSL_OFFSET 0x0130 /* GIOH Pull Select Register */
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/* Register Addresses *******************************************************************************/
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#define TMS570_GIO_GCR0 (TMS570_GIO_BASE+TMS570_GIO_GCR0_OFFSET)
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#define TMS570_GIO_INTDET (TMS570_GIO_BASE+TMS570_GIO_INTDET_OFFSET)
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#define TMS570_GIO_POL (TMS570_GIO_BASE+TMS570_GIO_POL_OFFSET)
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#define TMS570_GIO_ENASET (TMS570_GIO_BASE+TMS570_GIO_ENASET_OFFSET)
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#define TMS570_GIO_ENACLR (TMS570_GIO_BASE+TMS570_GIO_ENACLR_OFFSET)
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#define TMS570_GIO_LVLSET (TMS570_GIO_BASE+TMS570_GIO_LVLSET_OFFSET)
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#define TMS570_GIO_LVLCLR (TMS570_GIO_BASE+TMS570_GIO_LVLCLR_OFFSET)
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#define TMS570_GIO_FLG (TMS570_GIO_BASE+TMS570_GIO_FLG_OFFSET)
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#define TMS570_GIO_OFF1 (TMS570_GIO_BASE+TMS570_GIO_OFF1_OFFSET)
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#define TMS570_GIO_OFF2 (TMS570_GIO_BASE+TMS570_GIO_OFF2_OFFSET)
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#define TMS570_GIO_EMU1 (TMS570_GIO_BASE+TMS570_GIO_EMU1_OFFSET)
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#define TMS570_GIO_EMU2 (TMS570_GIO_BASE+TMS570_GIO_EMU2_OFFSET)
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#define TMS570_GIO(n) (TMS570_GIO_BASE+TMS570_GIO_OFFSET(n))
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#define TMS570_GIO_DIR(n) (TMS570_GIO(n)+TMS570_GIO_DIR_OFFSET)
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#define TMS570_GIO_DIN(n) (TMS570_GIO(n)+TMS570_GIO_DIN_OFFSET)
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#define TMS570_GIO_DOUT(n) (TMS570_GIO(n)+TMS570_GIO_DOUT_OFFSET)
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#define TMS570_GIO_DSET(n) (TMS570_GIO(n)+TMS570_GIO_DSET_OFFSET)
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#define TMS570_GIO_DCLR(n) (TMS570_GIO(n)+TMS570_GIO_DCLR_OFFSET)
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#define TMS570_GIO_PDR(n) (TMS570_GIO(n)+TMS570_GIO_PDR_OFFSET)
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#define TMS570_GIO_PULDIS(n) (TMS570_GIO(n)+TMS570_GIO_PULDIS_OFFSET)
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#define TMS570_GIO_PSL(n) (TMS570_GIO(n)+TMS570_GIO_PSL_OFFSET)
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#define TMS570_GIOA_DIR (TMS570_GIO_BASE+TMS570_GIOA_DIR_OFFSET)
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#define TMS570_GIOA_DIN (TMS570_GIO_BASE+TMS570_GIOA_DIN_OFFSET)
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#define TMS570_GIOA_DOUT (TMS570_GIO_BASE+TMS570_GIOA_DOUT_OFFSET)
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#define TMS570_GIOA_DSET (TMS570_GIO_BASE+TMS570_GIOA_DSET_OFFSET)
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#define TMS570_GIOA_DCLR (TMS570_GIO_BASE+TMS570_GIOA_DCLR_OFFSET)
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#define TMS570_GIOA_PDR (TMS570_GIO_BASE+TMS570_GIOA_PDR_OFFSET)
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#define TMS570_GIOA_PULDIS (TMS570_GIO_BASE+TMS570_GIOA_PULDIS_OFFSET)
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#define TMS570_GIOA_PSL (TMS570_GIO_BASE+TMS570_GIOA_PSL_OFFSET)
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#define TMS570_GIOB_DIR (TMS570_GIO_BASE+TMS570_GIOB_DIR_OFFSET)
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#define TMS570_GIOB_DIN (TMS570_GIO_BASE+TMS570_GIOB_DIN_OFFSET)
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#define TMS570_GIOB_DOUT (TMS570_GIO_BASE+TMS570_GIOB_DOUT_OFFSET)
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#define TMS570_GIOB_DSET (TMS570_GIO_BASE+TMS570_GIOB_DSET_OFFSET)
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#define TMS570_GIOB_DCLR (TMS570_GIO_BASE+TMS570_GIOB_DCLR_OFFSET)
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#define TMS570_GIOB_PDR (TMS570_GIO_BASE+TMS570_GIOB_PDR_OFFSET)
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#define TMS570_GIOB_PULDIS (TMS570_GIO_BASE+TMS570_GIOB_PULDIS_OFFSET)
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#define TMS570_GIOB_PSL (TMS570_GIO_BASE+TMS570_GIOB_PSL_OFFSET)
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#define TMS570_GIOC_DIR (TMS570_GIO_BASE+TMS570_GIOC_DIR_OFFSET)
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#define TMS570_GIOC_DIN (TMS570_GIO_BASE+TMS570_GIOC_DIN_OFFSET)
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#define TMS570_GIOC_DOUT (TMS570_GIO_BASE+TMS570_GIOC_DOUT_OFFSET)
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#define TMS570_GIOC_DSET (TMS570_GIO_BASE+TMS570_GIOC_DSET_OFFSET)
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#define TMS570_GIOC_DCLR (TMS570_GIO_BASE+TMS570_GIOC_DCLR_OFFSET)
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#define TMS570_GIOC_PDR (TMS570_GIO_BASE+TMS570_GIOC_PDR_OFFSET)
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#define TMS570_GIOC_PULDIS (TMS570_GIO_BASE+TMS570_GIOC_PULDIS_OFFSET)
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#define TMS570_GIOC_PSL (TMS570_GIO_BASE+TMS570_GIOC_PSL_OFFSET)
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#define TMS570_GIOD_DIR (TMS570_GIO_BASE+TMS570_GIOD_DIR_OFFSET)
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#define TMS570_GIOD_DIN (TMS570_GIO_BASE+TMS570_GIOD_DIN_OFFSET)
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#define TMS570_GIOD_DOUT (TMS570_GIO_BASE+TMS570_GIOD_DOUT_OFFSET)
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#define TMS570_GIOD_DSET (TMS570_GIO_BASE+TMS570_GIOD_DSET_OFFSET)
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#define TMS570_GIOD_DCLR (TMS570_GIO_BASE+TMS570_GIOD_DCLR_OFFSET)
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#define TMS570_GIOD_PDR (TMS570_GIO_BASE+TMS570_GIOD_PDR_OFFSET)
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#define TMS570_GIOD_PULDIS (TMS570_GIO_BASE+TMS570_GIOD_PULDIS_OFFSET)
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#define TMS570_GIOD_PSL (TMS570_GIO_BASE+TMS570_GIOD_PSL_OFFSET)
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#define TMS570_GIOE_DIR (TMS570_GIO_BASE+TMS570_GIOE_DIR_OFFSET)
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#define TMS570_GIOE_DIN (TMS570_GIO_BASE+TMS570_GIOE_DIN_OFFSET)
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#define TMS570_GIOE_DOUT (TMS570_GIO_BASE+TMS570_GIOE_DOUT_OFFSET)
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#define TMS570_GIOE_DSET (TMS570_GIO_BASE+TMS570_GIOE_DSET_OFFSET)
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#define TMS570_GIOE_DCLR (TMS570_GIO_BASE+TMS570_GIOE_DCLR_OFFSET)
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#define TMS570_GIOE_PDR (TMS570_GIO_BASE+TMS570_GIOE_PDR_OFFSET)
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#define TMS570_GIOE_PULDIS (TMS570_GIO_BASE+TMS570_GIOE_PULDIS_OFFSET)
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#define TMS570_GIOE_PSL (TMS570_GIO_BASE+TMS570_GIOE_PSL_OFFSET)
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#define TMS570_GIOF_DIR (TMS570_GIO_BASE+TMS570_GIOF_DIR_OFFSET)
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#define TMS570_GIOF_DIN (TMS570_GIO_BASE+TMS570_GIOF_DIN_OFFSET)
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#define TMS570_GIOF_DOUT (TMS570_GIO_BASE+TMS570_GIOF_DOUT_OFFSET)
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#define TMS570_GIOF_DSET (TMS570_GIO_BASE+TMS570_GIOF_DSET_OFFSET)
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#define TMS570_GIOF_DCLR (TMS570_GIO_BASE+TMS570_GIOF_DCLR_OFFSET)
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#define TMS570_GIOF_PDR (TMS570_GIO_BASE+TMS570_GIOF_PDR_OFFSET)
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#define TMS570_GIOF_PULDIS (TMS570_GIO_BASE+TMS570_GIOF_PULDIS_OFFSET)
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#define TMS570_GIOF_PSL (TMS570_GIO_BASE+TMS570_GIOF_PSL_OFFSET)
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#define TMS570_GIOG_DIR (TMS570_GIO_BASE+TMS570_GIOG_DIR_OFFSET)
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#define TMS570_GIOG_DIN (TMS570_GIO_BASE+TMS570_GIOG_DIN_OFFSET)
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#define TMS570_GIOG_DOUT (TMS570_GIO_BASE+TMS570_GIOG_DOUT_OFFSET)
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#define TMS570_GIOG_DSET (TMS570_GIO_BASE+TMS570_GIOG_DSET_OFFSET)
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#define TMS570_GIOG_DCLR (TMS570_GIO_BASE+TMS570_GIOG_DCLR_OFFSET)
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#define TMS570_GIOG_PDR (TMS570_GIO_BASE+TMS570_GIOG_PDR_OFFSET)
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#define TMS570_GIOG_PULDIS (TMS570_GIO_BASE+TMS570_GIOG_PULDIS_OFFSET)
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#define TMS570_GIOG_PSL (TMS570_GIO_BASE+TMS570_GIOG_PSL_OFFSET)
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#define TMS570_GIOH_DIR (TMS570_GIO_BASE+TMS570_GIOH_DIR_OFFSET)
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#define TMS570_GIOH_DIN (TMS570_GIO_BASE+TMS570_GIOH_DIN_OFFSET)
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#define TMS570_GIOH_DOUT (TMS570_GIO_BASE+TMS570_GIOH_DOUT_OFFSET)
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#define TMS570_GIOH_DSET (TMS570_GIO_BASE+TMS570_GIOH_DSET_OFFSET)
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#define TMS570_GIOH_DCLR (TMS570_GIO_BASE+TMS570_GIOH_DCLR_OFFSET)
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#define TMS570_GIOH_PDR (TMS570_GIO_BASE+TMS570_GIOH_PDR_OFFSET)
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#define TMS570_GIOH_PULDIS (TMS570_GIO_BASE+TMS570_GIOH_PULDIS_OFFSET)
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#define TMS570_GIOH_PSL (TMS570_GIO_BASE+TMS570_GIOH_PSL_OFFSET)
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/* Register Bit-Field Definitions *******************************************************************/
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/* GIO Global Control Register */
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#define GIO_GCR0_
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/* GIO Interrupt Detect Register */
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#define GIO_INTDET_
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/* GIO Interrupt Polarity Register */
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#define GIO_POL_
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/* GIO Interrupt Enable Set Register */
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#define GIO_ENASET_
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/* GIO Interrupt Enable Clear Register */
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#define GIO_ENACLR_
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/* GIO Interrupt Priority Set Register */
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#define GIO_LVLSET_
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/* GIO Interrupt Priority Clear Register */
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#define GIO_LVLCLR_
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/* GIO Interrupt Flag Register */
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#define GIO_FLG_
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/* GIO Offset 1 Register */
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#define GIO_OFF1_
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/* GIO Offset 2 Register */
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#define GIO_OFF2_
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/* GIO Emulation 1 Register */
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#define GIO_EMU1_
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/* GIO Emulation 2 Register */
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#define GIO_EMU2_
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/* GIO Data Direction Register */
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#define GIO_DIR_
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/* GIO Data Input Register */
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#define GIO_DIN_
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/* GIO Data Output Register */
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#define GIO_DOUT_
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/* GIO Data Set Register */
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#define GIO_DSET_
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/* GIO Data Clear Register */
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#define GIO_DCLR_
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/* GIO Open Drain Register */
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#define GIO_PDR_
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/* GIO Pull Disable Register */
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#define GIO_PULDIS_
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/* GIO Pull Select Register */
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#define GIO_PSL_
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#endif /* __ARCH_ARM_SRC_TMS570_CHIP_TMS570_GIO_H */
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