mpfs/corespi: Add driver for CoreSPI

Adds a driver for an FPGA fabric / CoreSPI implementation.

Supports multiple instances, assuming they reside in some base address,
offsettable by a constant value.

arch/risc-v/src/mpfs/Kconfig

@@ -439,6 +439,36 @@ config MPFS_ETHMAC_1
 	---help---
 		Enable MPFS ethernet MAC-1.
 
+config MPFS_HAVE_CORESPI
+	bool "CoreSPI FPGA IP block configured"
+	default n
+
+if MPFS_HAVE_CORESPI
+
+config MPFS_CORESPI
+	bool "CoreSPI FPGA IP block configured"
+	default n
+	depends on MPFS_HAVE_CORESPI
+
+config MPFS_CORESPI_BASE
+	hex "Base address for the (first) CoreSPI instance"
+	default 0x4A000000
+	depends on MPFS_CORESPI
+
+config MPFS_CORESPI_INSTANCES
+	int "Amount of CoreSPI instances"
+	default 1
+	range 1 8
+	depends on MPFS_CORESPI
+
+config MPFS_CORESPI_IRQNUM
+	int "Number of (first) F2H interrupt"
+	default 4
+	range 0 63
+	depends on MPFS_CORESPI
+
+endif # MPFS_HAVE_CORESPI
+
 comment "CorePWM Options"
 
 config MPFS_HAVE_COREPWM

arch/risc-v/src/mpfs/Make.defs

@@ -94,3 +94,8 @@ endif
 ifeq ($(CONFIG_MPFS_IHC_SBI),y)
 CHIP_CSRCS += mpfs_ihc_sbi.c
 endif
+
+ifeq ($(CONFIG_MPFS_CORESPI),y)
+CHIP_CSRCS += mpfs_corespi.c
+endif
+

arch/risc-v/src/mpfs/hardware/mpfs_corespi.h

@@ -0,0 +1,73 @@
+/****************************************************************************
+ * arch/risc-v/src/mpfs/hardware/mpfs_corespi.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_SRC_MPFS_HARDWARE_MPFS_CORESPI_H
+#define __ARCH_RISC_V_SRC_MPFS_HARDWARE_MPFS_CORESPI_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* CONTROL register */
+
+#define MPFS_SPI_OENOFF               (1 << 7)
+#define MPFS_SPI_FRAMEURUN            (1 << 6)
+#define MPFS_SPI_INTTXTURUN           (1 << 5)
+#define MPFS_SPI_INTRXOVRFLOW         (1 << 4)
+#define MPFS_SPI_INTTXDONE            (1 << 3)
+#define MPFS_SPI_MODE                 (1 << 1)
+#define MPFS_SPI_ENABLE               (1 << 0)
+
+/* INT_CLEAR/RAW/MASK register */
+
+#define MPFS_SPI_TXRFM                (1 << 7)
+#define MPFS_SPI_DATA_RX              (1 << 6)
+#define MPFS_SPI_SSEND                (1 << 5)
+#define MPFS_SPI_CMDINT               (1 << 4)
+#define MPFS_SPI_TXCHUNDRUN           (1 << 3)
+#define MPFS_SPI_RXCHOVRFLW           (1 << 2)
+#define MPFS_SPI_TXDONE               (1 << 0)
+
+/* STATUS register */
+
+#define MPFS_SPI_ACTIVE               (1 << 7)
+#define MPFS_SPI_SSEL                 (1 << 6)
+#define MPFS_SPI_TXUNDERRUN           (1 << 5)
+#define MPFS_SPI_RXOVERFLOW           (1 << 4)
+#define MPFS_SPI_TXFULL               (1 << 3)
+#define MPFS_SPI_RXEMPTY              (1 << 2)
+#define MPFS_SPI_DONE                 (1 << 1)
+#define MPFS_SPI_FIRSTFRAME           (1 << 0)
+
+/* CONTROL2 register */
+
+#define MPFS_SPI_INTEN_TXFRM          (1 << 7)
+#define MPFS_SPI_INTEN_DATA_RX        (1 << 6)
+#define MPFS_SPI_INTEN_SSEND          (1 << 5)
+#define MPFS_SPI_INTEN_CMD            (1 << 4)
+#define MPFS_SPI_CMDSIZE_MASK         (7 << 0)
+#define MPFS_SPI_CMDSIZE_SHIFT        (1)
+
+/* COMMAND register */
+
+#define MPFS_SPI_TXFIFORST            (1 << 1)
+#define MPFS_SPI_RXFIFORST            (1 << 0)
+
+#endif /* __ARCH_RISC_V_SRC_MPFS_HARDWARE_MPFS_CORESPI_H */

arch/risc-v/src/mpfs/mpfs_corespi.h

@@ -0,0 +1,103 @@
+/****************************************************************************
+ * arch/risc-v/src/mpfs/mpfs_corespi.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_MPFS_MPFS_CORESPI_H
+#define __ARCH_RISCV_SRC_MPFS_MPFS_CORESPI_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#include <nuttx/spi/spi.h>
+#include <nuttx/spi/spi_transfer.h>
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: mpfs_corespibus_initialize
+ *
+ * Description:
+ *   Initialize the selected SPI bus
+ *
+ * Input Parameters:
+ *   Port number (for hardware that has multiple SPI interfaces)
+ *
+ * Returned Value:
+ *   Valid SPI device structure reference on success; a NULL on failure
+ *
+ ****************************************************************************/
+
+struct spi_dev_s *mpfs_corespibus_initialize(int port);
+
+/****************************************************************************
+ * Name: mpfs_corespibus_uninitialize
+ *
+ * Description:
+ *   Uninitialize an SPI bus
+ *
+ ****************************************************************************/
+
+int mpfs_corespibus_uninitialize(struct spi_dev_s *dev);
+
+/****************************************************************************
+ * Name:  mpfs_corespi_select
+ *
+ * Description:
+ *   The external function, mpfs_corespi_select
+ *
+ * Input Parameters:
+ *   dev -       Device-specific state data
+ *   devid - The SPI CS or device number
+ *   selected - true: assert CS, false de-assert CS
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void weak_function mpfs_corespi_select(struct spi_dev_s *dev,
+                                       uint32_t devid, bool selected);
+
+#ifdef __cplusplus
+}
+#endif
+#undef EXTERN
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_RISCV_SRC_MPFS_MPFS_CORESPI_H */

boards/risc-v/mpfs/common/src/mpfs_board_spi.c

@@ -32,6 +32,7 @@
 #include <nuttx/spi/spi_transfer.h>
 
 #include "mpfs_spi.h"
+#include "mpfs_corespi.h"
 
 /****************************************************************************
  * Public Functions
@@ -48,7 +49,8 @@
 int mpfs_board_spi_init(void)
 {
   int ret = OK;
-#if defined(CONFIG_MPFS_SPI0) || defined(CONFIG_MPFS_SPI1)
+#if defined(CONFIG_MPFS_SPI0) || defined(CONFIG_MPFS_SPI1) || \
+    defined(CONFIG_MPFS_CORESPI)
   struct spi_dev_s *spi;
 #ifdef CONFIG_SPI_DRIVER
   int port = 0;
@@ -95,5 +97,28 @@ int mpfs_board_spi_init(void)
 
 #endif /* CONFIG_SPI_DRIVER */
 #endif /* CONFIG_MPFS_SPI1 */
+
+#ifdef CONFIG_MPFS_CORESPI
+  /* REVISIT: Initialize all of them ? */
+
+  spi = mpfs_corespibus_initialize(0);
+  if (spi == NULL)
+    {
+      spierr("Failed to initialize SPI%d\n", 2);
+      return -ENODEV;
+    }
+
+#ifdef CONFIG_SPI_DRIVER
+  ret = spi_register(spi, 2);
+  if (ret < 0)
+    {
+      spierr("Failed to register /dev/spi%d: %d\n", 2, ret);
+
+      mpfs_spibus_uninitialize(spi);
+    }
+
+#endif /* CONFIG_SPI_DRIVER */
+#endif
+
   return ret;
 }

boards/risc-v/mpfs/icicle/configs/hwtest/defconfig

@@ -47,10 +47,12 @@ CONFIG_MMCSD=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_MPFS_COREPWM0=y
 CONFIG_MPFS_COREPWM1=y
+CONFIG_MPFS_CORESPI=y
 CONFIG_MPFS_DMA=y
 CONFIG_MPFS_EMMCSD=y
 CONFIG_MPFS_ENABLE_DPFPU=y
 CONFIG_MPFS_HAVE_COREPWM=y
+CONFIG_MPFS_HAVE_CORESPI=y
 CONFIG_MPFS_I2C0=y
 CONFIG_MPFS_I2C1=y
 CONFIG_MPFS_SPI0=y

boards/risc-v/mpfs/icicle/src/mpfs_bringup.c

@@ -114,7 +114,8 @@ int mpfs_bringup(void)
     }
 #endif /* CONFIG_MPFS_ROMFS_MOUNT */
 
-#if defined(CONFIG_MPFS_SPI0) || defined(CONFIG_MPFS_SPI1)
+#if defined(CONFIG_MPFS_SPI0) || defined(CONFIG_MPFS_SPI1) || \
+    defined(CONFIG_MPFS_HAVE_CORESPI)
   /* Configure SPI peripheral interfaces */
 
   ret = mpfs_board_spi_init();