ARMv7-A/i.MX6 SMP: Move SMP coherernt cache setup to earlier in initialization of CPUn, n>0

arch/arm/src/armv7-a/arm_cpustart.c

@@ -47,7 +47,6 @@
 #include "up_internal.h"
 #include "cp15_cacheops.h"
 #include "gic.h"
-#include "scu.h"
 #include "sched/sched.h"
 
 #ifdef CONFIG_SMP
@@ -110,10 +109,6 @@ int arm_start_handler(int irq, FAR void *context)
 
   sinfo("CPU%d Started\n", cpu);
 
-  /* Enable SMP cache coherency for the CPU */
-
-  arm_enable_smp(cpu);
-
   /* Reset scheduler parameters */
 
   tcb = this_task();

arch/arm/src/imx6/imx_cpuboot.c

@@ -51,6 +51,7 @@
 #include "chip/imx_src.h"
 #include "sctlr.h"
 #include "smp.h"
+#include "scu.h"
 #include "fpu.h"
 #include "gic.h"
 
@@ -259,6 +260,10 @@ void imx_cpu_enable(void)
 
 void arm_cpu_boot(int cpu)
 {
+  /* Enable SMP cache coherency for the CPU */
+
+  arm_enable_smp(cpu);
+
 #ifdef CONFIG_ARCH_FPU
   /* Initialize the FPU */