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arch/pic32mz: Fix typos in PPS register mapping defines
The PIC32MZ architecture provides a Peripheral Pin Select (PPS) which allows mapping peripherals to different GPIO pins. To map a peripheral output, a value is programmed to a register called RPnxR, where n is the GPIO port (A thru K) and x is the GPIO pin (0 thru 15). The names of these registers in code are PIC32MZ_RPnxR. However, in various definitions, these were mistakenly written as PI32MZ_RPnxR (missing C in PIC32). This prevents using any of the affected mappings. This issue is fixed by repairing the define names. * arch/mips/src/pic32mz/hardware/pic32mzec_pps.h, arch/mips/src/pic32mz/hardware/pic32mzef_pps.h: (): s/PI32MZ/PIC32MZ/g
This commit is contained in:
committed by
Xiang Xiao
parent
7c90fbd7c2
commit
212ef18803
@@ -1040,102 +1040,102 @@
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* the register address.
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*/
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#define C1OUT_RPB0R 14, PI32MZ_RPB0R
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#define C1OUT_RPB7R 14, PI32MZ_RPB7R
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#define C1OUT_RPB8R 14, PI32MZ_RPB8R
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#define C1OUT_RPB15R 14, PI32MZ_RPB15R
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#define C1OUT_RPC3R 14, PI32MZ_RPC3R
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#define C1OUT_RPD4R 14, PI32MZ_RPD4R
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#define C1OUT_RPD9R 14, PI32MZ_RPD9R
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#define C1OUT_RPD12R 14, PI32MZ_RPD12R
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#define C1OUT_RPE3R 14, PI32MZ_RPE3R
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#define C1OUT_RPE9R 14, PI32MZ_RPE9R
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#define C1OUT_RPF8R 14, PI32MZ_RPF8R
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#define C1OUT_RPF12R 14, PI32MZ_RPF12R
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#define C1OUT_RPG6R 14, PI32MZ_RPG6R
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#define C1OUT_RPB0R 14, PIC32MZ_RPB0R
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#define C1OUT_RPB7R 14, PIC32MZ_RPB7R
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#define C1OUT_RPB8R 14, PIC32MZ_RPB8R
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#define C1OUT_RPB15R 14, PIC32MZ_RPB15R
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#define C1OUT_RPC3R 14, PIC32MZ_RPC3R
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#define C1OUT_RPD4R 14, PIC32MZ_RPD4R
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#define C1OUT_RPD9R 14, PIC32MZ_RPD9R
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#define C1OUT_RPD12R 14, PIC32MZ_RPD12R
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#define C1OUT_RPE3R 14, PIC32MZ_RPE3R
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#define C1OUT_RPE9R 14, PIC32MZ_RPE9R
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#define C1OUT_RPF8R 14, PIC32MZ_RPF8R
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#define C1OUT_RPF12R 14, PIC32MZ_RPF12R
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#define C1OUT_RPG6R 14, PIC32MZ_RPG6R
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#define C1TX_RPA14R 15, PI32MZ_RPA14R
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#define C1TX_RPB5R 15, PI32MZ_RPB5R
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#define C1TX_RPB9R 15, PI32MZ_RPB9R
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#define C1TX_RPB10R 15, PI32MZ_RPB10R
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#define C1TX_RPC1R 15, PI32MZ_RPC1R
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#define C1TX_RPC14R 15, PI32MZ_RPC14R
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#define C1TX_RPD2R 15, PI32MZ_RPD2R
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#define C1TX_RPD6R 15, PI32MZ_RPD6R
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#define C1TX_RPD10R 15, PI32MZ_RPD10R
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#define C1TX_RPD14R 15, PI32MZ_RPD14R
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#define C1TX_RPF1R 15, PI32MZ_RPF1R
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#define C1TX_RPF4R 15, PI32MZ_RPF4R
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#define C1TX_RPG1R 15, PI32MZ_RPG1R
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#define C1TX_RPG8R 15, PI32MZ_RPG8R
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#define C1TX_RPA14R 15, PIC32MZ_RPA14R
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#define C1TX_RPB5R 15, PIC32MZ_RPB5R
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#define C1TX_RPB9R 15, PIC32MZ_RPB9R
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#define C1TX_RPB10R 15, PIC32MZ_RPB10R
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#define C1TX_RPC1R 15, PIC32MZ_RPC1R
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#define C1TX_RPC14R 15, PIC32MZ_RPC14R
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#define C1TX_RPD2R 15, PIC32MZ_RPD2R
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#define C1TX_RPD6R 15, PIC32MZ_RPD6R
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#define C1TX_RPD10R 15, PIC32MZ_RPD10R
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#define C1TX_RPD14R 15, PIC32MZ_RPD14R
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#define C1TX_RPF1R 15, PIC32MZ_RPF1R
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#define C1TX_RPF4R 15, PIC32MZ_RPF4R
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#define C1TX_RPG1R 15, PIC32MZ_RPG1R
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#define C1TX_RPG8R 15, PIC32MZ_RPG8R
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#define C2OUT_RPA14R 14, PI32MZ_RPA14R
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#define C2OUT_RPB5R 14, PI32MZ_RPB5R
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#define C2OUT_RPB9R 14, PI32MZ_RPB9R
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#define C2OUT_RPB10R 14, PI32MZ_RPB10R
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#define C2OUT_RPC1R 14, PI32MZ_RPC1R
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#define C2OUT_RPC14R 14, PI32MZ_RPC14R
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#define C2OUT_RPD2R 14, PI32MZ_RPD2R
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#define C2OUT_RPD6R 14, PI32MZ_RPD6R
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#define C2OUT_RPD10R 14, PI32MZ_RPD10R
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#define C2OUT_RPD14R 14, PI32MZ_RPD14R
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#define C2OUT_RPF1R 14, PI32MZ_RPF1R
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#define C2OUT_RPF4R 14, PI32MZ_RPF4R
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#define C2OUT_RPG1R 14, PI32MZ_RPG1R
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#define C2OUT_RPG8R 14, PI32MZ_RPG8R
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#define C2OUT_RPA14R 14, PIC32MZ_RPA14R
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#define C2OUT_RPB5R 14, PIC32MZ_RPB5R
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#define C2OUT_RPB9R 14, PIC32MZ_RPB9R
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#define C2OUT_RPB10R 14, PIC32MZ_RPB10R
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#define C2OUT_RPC1R 14, PIC32MZ_RPC1R
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#define C2OUT_RPC14R 14, PIC32MZ_RPC14R
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#define C2OUT_RPD2R 14, PIC32MZ_RPD2R
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#define C2OUT_RPD6R 14, PIC32MZ_RPD6R
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#define C2OUT_RPD10R 14, PIC32MZ_RPD10R
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#define C2OUT_RPD14R 14, PIC32MZ_RPD14R
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#define C2OUT_RPF1R 14, PIC32MZ_RPF1R
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#define C2OUT_RPF4R 14, PIC32MZ_RPF4R
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#define C2OUT_RPG1R 14, PIC32MZ_RPG1R
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#define C2OUT_RPG8R 14, PIC32MZ_RPG8R
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#define C2TX_RPB2R 15, PI32MZ_RPB2R
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#define C2TX_RPB6R 15, PI32MZ_RPB6R
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#define C2TX_RPB14R 15, PI32MZ_RPB14R
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#define C2TX_RPC2R 15, PI32MZ_RPC2R
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#define C2TX_RPD0R 15, PI32MZ_RPD0R
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#define C2TX_RPD1R 15, PI32MZ_RPD1R
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#define C2TX_RPD5R 15, PI32MZ_RPD5R
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#define C2TX_RPE8R 15, PI32MZ_RPE8R
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#define C2TX_RPF2R 15, PI32MZ_RPF2R
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#define C2TX_RPF3R 15, PI32MZ_RPF3R
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#define C2TX_RPF13R 15, PI32MZ_RPF13R
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#define C2TX_RPG9R 15, PI32MZ_RPG9R
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#define C2TX_RPB2R 15, PIC32MZ_RPB2R
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#define C2TX_RPB6R 15, PIC32MZ_RPB6R
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#define C2TX_RPB14R 15, PIC32MZ_RPB14R
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#define C2TX_RPC2R 15, PIC32MZ_RPC2R
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#define C2TX_RPD0R 15, PIC32MZ_RPD0R
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#define C2TX_RPD1R 15, PIC32MZ_RPD1R
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#define C2TX_RPD5R 15, PIC32MZ_RPD5R
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#define C2TX_RPE8R 15, PIC32MZ_RPE8R
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#define C2TX_RPF2R 15, PIC32MZ_RPF2R
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#define C2TX_RPF3R 15, PIC32MZ_RPF3R
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#define C2TX_RPF13R 15, PIC32MZ_RPF13R
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#define C2TX_RPG9R 15, PIC32MZ_RPG9R
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#define OC1_RPB2R 12, PI32MZ_RPB2R
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#define OC1_RPB6R 12, PI32MZ_RPB6R
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#define OC1_RPB14R 12, PI32MZ_RPB14R
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#define OC1_RPC2R 12, PI32MZ_RPC2R
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#define OC1_RPD0R 12, PI32MZ_RPD0R
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#define OC1_RPD1R 12, PI32MZ_RPD1R
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#define OC1_RPD5R 12, PI32MZ_RPD5R
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#define OC1_RPE8R 12, PI32MZ_RPE8R
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#define OC1_RPF2R 12, PI32MZ_RPF2R
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#define OC1_RPF3R 12, PI32MZ_RPF3R
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#define OC1_RPF13R 12, PI32MZ_RPF13R
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#define OC1_RPG9R 12, PI32MZ_RPG9R
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#define OC1_RPB2R 12, PIC32MZ_RPB2R
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#define OC1_RPB6R 12, PIC32MZ_RPB6R
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#define OC1_RPB14R 12, PIC32MZ_RPB14R
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#define OC1_RPC2R 12, PIC32MZ_RPC2R
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#define OC1_RPD0R 12, PIC32MZ_RPD0R
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#define OC1_RPD1R 12, PIC32MZ_RPD1R
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#define OC1_RPD5R 12, PIC32MZ_RPD5R
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#define OC1_RPE8R 12, PIC32MZ_RPE8R
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#define OC1_RPF2R 12, PIC32MZ_RPF2R
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#define OC1_RPF3R 12, PIC32MZ_RPF3R
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#define OC1_RPF13R 12, PIC32MZ_RPF13R
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#define OC1_RPG9R 12, PIC32MZ_RPG9R
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#define OC2_RPB2R 11, PI32MZ_RPB2R
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#define OC2_RPB6R 11, PI32MZ_RPB6R
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#define OC2_RPB14R 11, PI32MZ_RPB14R
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#define OC2_RPC2R 11, PI32MZ_RPC2R
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#define OC2_RPD0R 11, PI32MZ_RPD0R
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#define OC2_RPD1R 11, PI32MZ_RPD1R
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#define OC2_RPD5R 11, PI32MZ_RPD5R
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#define OC2_RPE8R 11, PI32MZ_RPE8R
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#define OC2_RPF2R 11, PI32MZ_RPF2R
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#define OC2_RPF3R 11, PI32MZ_RPF3R
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#define OC2_RPF13R 11, PI32MZ_RPF13R
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#define OC2_RPG9R 11, PI32MZ_RPG9R
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#define OC2_RPB2R 11, PIC32MZ_RPB2R
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#define OC2_RPB6R 11, PIC32MZ_RPB6R
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#define OC2_RPB14R 11, PIC32MZ_RPB14R
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#define OC2_RPC2R 11, PIC32MZ_RPC2R
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#define OC2_RPD0R 11, PIC32MZ_RPD0R
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#define OC2_RPD1R 11, PIC32MZ_RPD1R
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#define OC2_RPD5R 11, PIC32MZ_RPD5R
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#define OC2_RPE8R 11, PIC32MZ_RPE8R
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#define OC2_RPF2R 11, PIC32MZ_RPF2R
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#define OC2_RPF3R 11, PIC32MZ_RPF3R
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#define OC2_RPF13R 11, PIC32MZ_RPF13R
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#define OC2_RPG9R 11, PIC32MZ_RPG9R
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#define OC3_RPA14R 11, PI32MZ_RPA14R
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#define OC3_RPB5R 11, PI32MZ_RPB5R
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#define OC3_RPB9R 11, PI32MZ_RPB9R
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#define OC3_RPB10R 11, PI32MZ_RPB10R
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#define OC3_RPC1R 11, PI32MZ_RPC1R
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#define OC3_RPC14R 11, PI32MZ_RPC14R
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#define OC3_RPD2R 11, PI32MZ_RPD2R
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#define OC3_RPD6R 11, PI32MZ_RPD6R
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#define OC3_RPD10R 11, PI32MZ_RPD10R
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#define OC3_RPD14R 11, PI32MZ_RPD14R
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#define OC3_RPF1R 11, PI32MZ_RPF1R
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#define OC3_RPF4R 11, PI32MZ_RPF4R
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#define OC3_RPG1R 11, PI32MZ_RPG1R
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#define OC3_RPA14R 11, PIC32MZ_RPA14R
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#define OC3_RPB5R 11, PIC32MZ_RPB5R
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#define OC3_RPB9R 11, PIC32MZ_RPB9R
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#define OC3_RPB10R 11, PIC32MZ_RPB10R
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#define OC3_RPC1R 11, PIC32MZ_RPC1R
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#define OC3_RPC14R 11, PIC32MZ_RPC14R
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#define OC3_RPD2R 11, PIC32MZ_RPD2R
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#define OC3_RPD6R 11, PIC32MZ_RPD6R
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#define OC3_RPD10R 11, PIC32MZ_RPD10R
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#define OC3_RPD14R 11, PIC32MZ_RPD14R
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#define OC3_RPF1R 11, PIC32MZ_RPF1R
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#define OC3_RPF4R 11, PIC32MZ_RPF4R
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#define OC3_RPG1R 11, PIC32MZ_RPG1R
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#define OC3_RPG8R 11, PIC32MZ_RPG8R
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#define OC4_RPA15R 11, PIC32MZ_RPA15R
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@@ -762,8 +762,8 @@
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#define T2CKR_RPF1 4
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#define T2CKR_RPF4 2
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#define T2CKR_RPG1 12
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#define T2CKR_RPG8 1
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#define T3CKR_RPB0 5
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#define T3CKR_RPB7 7
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#define T3CKR_RPB8 2
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@@ -1042,102 +1042,102 @@
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* address.
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*/
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#define C1OUT_RPB0R 14, PI32MZ_RPB0R
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#define C1OUT_RPB7R 14, PI32MZ_RPB7R
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#define C1OUT_RPB8R 14, PI32MZ_RPB8R
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#define C1OUT_RPB15R 14, PI32MZ_RPB15R
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#define C1OUT_RPC3R 14, PI32MZ_RPC3R
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#define C1OUT_RPD4R 14, PI32MZ_RPD4R
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#define C1OUT_RPD9R 14, PI32MZ_RPD9R
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#define C1OUT_RPD12R 14, PI32MZ_RPD12R
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#define C1OUT_RPE3R 14, PI32MZ_RPE3R
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#define C1OUT_RPE9R 14, PI32MZ_RPE9R
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#define C1OUT_RPF8R 14, PI32MZ_RPF8R
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#define C1OUT_RPF12R 14, PI32MZ_RPF12R
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#define C1OUT_RPG6R 14, PI32MZ_RPG6R
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#define C1OUT_RPB0R 14, PIC32MZ_RPB0R
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#define C1OUT_RPB7R 14, PIC32MZ_RPB7R
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#define C1OUT_RPB8R 14, PIC32MZ_RPB8R
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#define C1OUT_RPB15R 14, PIC32MZ_RPB15R
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#define C1OUT_RPC3R 14, PIC32MZ_RPC3R
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#define C1OUT_RPD4R 14, PIC32MZ_RPD4R
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#define C1OUT_RPD9R 14, PIC32MZ_RPD9R
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#define C1OUT_RPD12R 14, PIC32MZ_RPD12R
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#define C1OUT_RPE3R 14, PIC32MZ_RPE3R
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#define C1OUT_RPE9R 14, PIC32MZ_RPE9R
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#define C1OUT_RPF8R 14, PIC32MZ_RPF8R
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#define C1OUT_RPF12R 14, PIC32MZ_RPF12R
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#define C1OUT_RPG6R 14, PIC32MZ_RPG6R
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#define C1TX_RPA14R 15, PI32MZ_RPA14R
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#define C1TX_RPB5R 15, PI32MZ_RPB5R
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#define C1TX_RPB9R 15, PI32MZ_RPB9R
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#define C1TX_RPB10R 15, PI32MZ_RPB10R
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#define C1TX_RPC1R 15, PI32MZ_RPC1R
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#define C1TX_RPC14R 15, PI32MZ_RPC14R
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#define C1TX_RPD2R 15, PI32MZ_RPD2R
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#define C1TX_RPD6R 15, PI32MZ_RPD6R
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#define C1TX_RPD10R 15, PI32MZ_RPD10R
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#define C1TX_RPD14R 15, PI32MZ_RPD14R
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#define C1TX_RPF1R 15, PI32MZ_RPF1R
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#define C1TX_RPF4R 15, PI32MZ_RPF4R
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#define C1TX_RPG1R 15, PI32MZ_RPG1R
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#define C1TX_RPG8R 15, PI32MZ_RPG8R
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#define C1TX_RPA14R 15, PIC32MZ_RPA14R
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#define C1TX_RPB5R 15, PIC32MZ_RPB5R
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#define C1TX_RPB9R 15, PIC32MZ_RPB9R
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#define C1TX_RPB10R 15, PIC32MZ_RPB10R
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#define C1TX_RPC1R 15, PIC32MZ_RPC1R
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#define C1TX_RPC14R 15, PIC32MZ_RPC14R
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#define C1TX_RPD2R 15, PIC32MZ_RPD2R
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#define C1TX_RPD6R 15, PIC32MZ_RPD6R
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#define C1TX_RPD10R 15, PIC32MZ_RPD10R
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#define C1TX_RPD14R 15, PIC32MZ_RPD14R
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#define C1TX_RPF1R 15, PIC32MZ_RPF1R
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#define C1TX_RPF4R 15, PIC32MZ_RPF4R
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#define C1TX_RPG1R 15, PIC32MZ_RPG1R
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#define C1TX_RPG8R 15, PIC32MZ_RPG8R
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#define C2OUT_RPA14R 14, PI32MZ_RPA14R
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#define C2OUT_RPB5R 14, PI32MZ_RPB5R
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#define C2OUT_RPB9R 14, PI32MZ_RPB9R
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#define C2OUT_RPB10R 14, PI32MZ_RPB10R
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#define C2OUT_RPC1R 14, PI32MZ_RPC1R
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#define C2OUT_RPC14R 14, PI32MZ_RPC14R
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#define C2OUT_RPD2R 14, PI32MZ_RPD2R
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#define C2OUT_RPD6R 14, PI32MZ_RPD6R
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#define C2OUT_RPD10R 14, PI32MZ_RPD10R
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#define C2OUT_RPD14R 14, PI32MZ_RPD14R
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#define C2OUT_RPF1R 14, PI32MZ_RPF1R
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#define C2OUT_RPF4R 14, PI32MZ_RPF4R
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#define C2OUT_RPG1R 14, PI32MZ_RPG1R
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#define C2OUT_RPG8R 14, PI32MZ_RPG8R
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#define C2OUT_RPA14R 14, PIC32MZ_RPA14R
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#define C2OUT_RPB5R 14, PIC32MZ_RPB5R
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#define C2OUT_RPB9R 14, PIC32MZ_RPB9R
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#define C2OUT_RPB10R 14, PIC32MZ_RPB10R
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#define C2OUT_RPC1R 14, PIC32MZ_RPC1R
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#define C2OUT_RPC14R 14, PIC32MZ_RPC14R
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#define C2OUT_RPD2R 14, PIC32MZ_RPD2R
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#define C2OUT_RPD6R 14, PIC32MZ_RPD6R
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#define C2OUT_RPD10R 14, PIC32MZ_RPD10R
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#define C2OUT_RPD14R 14, PIC32MZ_RPD14R
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#define C2OUT_RPF1R 14, PIC32MZ_RPF1R
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#define C2OUT_RPF4R 14, PIC32MZ_RPF4R
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#define C2OUT_RPG1R 14, PIC32MZ_RPG1R
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#define C2OUT_RPG8R 14, PIC32MZ_RPG8R
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#define C2TX_RPB2R 15, PI32MZ_RPB2R
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#define C2TX_RPB6R 15, PI32MZ_RPB6R
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#define C2TX_RPB14R 15, PI32MZ_RPB14R
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#define C2TX_RPC2R 15, PI32MZ_RPC2R
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#define C2TX_RPD0R 15, PI32MZ_RPD0R
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#define C2TX_RPD1R 15, PI32MZ_RPD1R
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#define C2TX_RPD5R 15, PI32MZ_RPD5R
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#define C2TX_RPE8R 15, PI32MZ_RPE8R
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#define C2TX_RPF2R 15, PI32MZ_RPF2R
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#define C2TX_RPF3R 15, PI32MZ_RPF3R
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#define C2TX_RPF13R 15, PI32MZ_RPF13R
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#define C2TX_RPG9R 15, PI32MZ_RPG9R
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#define C2TX_RPB2R 15, PIC32MZ_RPB2R
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#define C2TX_RPB6R 15, PIC32MZ_RPB6R
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#define C2TX_RPB14R 15, PIC32MZ_RPB14R
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#define C2TX_RPC2R 15, PIC32MZ_RPC2R
|
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#define C2TX_RPD0R 15, PIC32MZ_RPD0R
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#define C2TX_RPD1R 15, PIC32MZ_RPD1R
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#define C2TX_RPD5R 15, PIC32MZ_RPD5R
|
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#define C2TX_RPE8R 15, PIC32MZ_RPE8R
|
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#define C2TX_RPF2R 15, PIC32MZ_RPF2R
|
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#define C2TX_RPF3R 15, PIC32MZ_RPF3R
|
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#define C2TX_RPF13R 15, PIC32MZ_RPF13R
|
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#define C2TX_RPG9R 15, PIC32MZ_RPG9R
|
||||
|
||||
#define OC1_RPB2R 12, PI32MZ_RPB2R
|
||||
#define OC1_RPB6R 12, PI32MZ_RPB6R
|
||||
#define OC1_RPB14R 12, PI32MZ_RPB14R
|
||||
#define OC1_RPC2R 12, PI32MZ_RPC2R
|
||||
#define OC1_RPD0R 12, PI32MZ_RPD0R
|
||||
#define OC1_RPD1R 12, PI32MZ_RPD1R
|
||||
#define OC1_RPD5R 12, PI32MZ_RPD5R
|
||||
#define OC1_RPE8R 12, PI32MZ_RPE8R
|
||||
#define OC1_RPF2R 12, PI32MZ_RPF2R
|
||||
#define OC1_RPF3R 12, PI32MZ_RPF3R
|
||||
#define OC1_RPF13R 12, PI32MZ_RPF13R
|
||||
#define OC1_RPG9R 12, PI32MZ_RPG9R
|
||||
#define OC1_RPB2R 12, PIC32MZ_RPB2R
|
||||
#define OC1_RPB6R 12, PIC32MZ_RPB6R
|
||||
#define OC1_RPB14R 12, PIC32MZ_RPB14R
|
||||
#define OC1_RPC2R 12, PIC32MZ_RPC2R
|
||||
#define OC1_RPD0R 12, PIC32MZ_RPD0R
|
||||
#define OC1_RPD1R 12, PIC32MZ_RPD1R
|
||||
#define OC1_RPD5R 12, PIC32MZ_RPD5R
|
||||
#define OC1_RPE8R 12, PIC32MZ_RPE8R
|
||||
#define OC1_RPF2R 12, PIC32MZ_RPF2R
|
||||
#define OC1_RPF3R 12, PIC32MZ_RPF3R
|
||||
#define OC1_RPF13R 12, PIC32MZ_RPF13R
|
||||
#define OC1_RPG9R 12, PIC32MZ_RPG9R
|
||||
|
||||
#define OC2_RPB2R 11, PI32MZ_RPB2R
|
||||
#define OC2_RPB6R 11, PI32MZ_RPB6R
|
||||
#define OC2_RPB14R 11, PI32MZ_RPB14R
|
||||
#define OC2_RPC2R 11, PI32MZ_RPC2R
|
||||
#define OC2_RPD0R 11, PI32MZ_RPD0R
|
||||
#define OC2_RPD1R 11, PI32MZ_RPD1R
|
||||
#define OC2_RPD5R 11, PI32MZ_RPD5R
|
||||
#define OC2_RPE8R 11, PI32MZ_RPE8R
|
||||
#define OC2_RPF2R 11, PI32MZ_RPF2R
|
||||
#define OC2_RPF3R 11, PI32MZ_RPF3R
|
||||
#define OC2_RPF13R 11, PI32MZ_RPF13R
|
||||
#define OC2_RPG9R 11, PI32MZ_RPG9R
|
||||
#define OC2_RPB2R 11, PIC32MZ_RPB2R
|
||||
#define OC2_RPB6R 11, PIC32MZ_RPB6R
|
||||
#define OC2_RPB14R 11, PIC32MZ_RPB14R
|
||||
#define OC2_RPC2R 11, PIC32MZ_RPC2R
|
||||
#define OC2_RPD0R 11, PIC32MZ_RPD0R
|
||||
#define OC2_RPD1R 11, PIC32MZ_RPD1R
|
||||
#define OC2_RPD5R 11, PIC32MZ_RPD5R
|
||||
#define OC2_RPE8R 11, PIC32MZ_RPE8R
|
||||
#define OC2_RPF2R 11, PIC32MZ_RPF2R
|
||||
#define OC2_RPF3R 11, PIC32MZ_RPF3R
|
||||
#define OC2_RPF13R 11, PIC32MZ_RPF13R
|
||||
#define OC2_RPG9R 11, PIC32MZ_RPG9R
|
||||
|
||||
#define OC3_RPA14R 11, PI32MZ_RPA14R
|
||||
#define OC3_RPB5R 11, PI32MZ_RPB5R
|
||||
#define OC3_RPB9R 11, PI32MZ_RPB9R
|
||||
#define OC3_RPB10R 11, PI32MZ_RPB10R
|
||||
#define OC3_RPC1R 11, PI32MZ_RPC1R
|
||||
#define OC3_RPC14R 11, PI32MZ_RPC14R
|
||||
#define OC3_RPD2R 11, PI32MZ_RPD2R
|
||||
#define OC3_RPD6R 11, PI32MZ_RPD6R
|
||||
#define OC3_RPD10R 11, PI32MZ_RPD10R
|
||||
#define OC3_RPD14R 11, PI32MZ_RPD14R
|
||||
#define OC3_RPF1R 11, PI32MZ_RPF1R
|
||||
#define OC3_RPF4R 11, PI32MZ_RPF4R
|
||||
#define OC3_RPG1R 11, PI32MZ_RPG1R
|
||||
#define OC3_RPA14R 11, PIC32MZ_RPA14R
|
||||
#define OC3_RPB5R 11, PIC32MZ_RPB5R
|
||||
#define OC3_RPB9R 11, PIC32MZ_RPB9R
|
||||
#define OC3_RPB10R 11, PIC32MZ_RPB10R
|
||||
#define OC3_RPC1R 11, PIC32MZ_RPC1R
|
||||
#define OC3_RPC14R 11, PIC32MZ_RPC14R
|
||||
#define OC3_RPD2R 11, PIC32MZ_RPD2R
|
||||
#define OC3_RPD6R 11, PIC32MZ_RPD6R
|
||||
#define OC3_RPD10R 11, PIC32MZ_RPD10R
|
||||
#define OC3_RPD14R 11, PIC32MZ_RPD14R
|
||||
#define OC3_RPF1R 11, PIC32MZ_RPF1R
|
||||
#define OC3_RPF4R 11, PIC32MZ_RPF4R
|
||||
#define OC3_RPG1R 11, PIC32MZ_RPG1R
|
||||
#define OC3_RPG8R 11, PIC32MZ_RPG8R
|
||||
|
||||
#define OC4_RPA15R 11, PIC32MZ_RPA15R
|
||||
|
||||
Reference in New Issue
Block a user