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Cosmetic: Changlog and update to comments

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This commit is contained in:
Gregory Nutt
2013-12-20 16:24:22 -06:00
parent 385e1fcfb1
commit 1e7365eea4
7 changed files with 9 additions and 7 deletions
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ChangeLog
+3 -1
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@@ -6240,4 +6240,6 @@
frontends configuration tools (if you built them) (2013-12-16)
* arch/arm/src/armv7-a/arm_head.h: Fixe some errors in the cache
invalidation logic (only seem to matter for Cortex-A8) (21-3-12-19).
* Kconfig and all Make.defs files: Add CONFIG_DEBUG_NOOPT. Now
you can indepenently enable/disable debug symbols and optimization
(2013-12-20).
arch/arm/src/armv7-m/up_exception.S
+1 -1
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@@ -229,7 +229,7 @@ exception_common:
/* Restore the interrupt state */
#ifdef CONFIG_ARMV7M_USEBASEPRI
msr basepri, r3 /* Restore interrupts priority masking*/
msr basepri, r3 /* Restore interrupts priority masking */
cpsie i /* Re-enable interrupts */
#else
msr primask, r3 /* Restore interrupts */
arch/arm/src/kinetis/kinetis_vectors.S
+1 -1
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@@ -765,7 +765,7 @@ kinetis_common:
/* Restore the interrupt state */
#ifdef CONFIG_ARMV7M_USEBASEPRI
msr basepri, r3 /* Restore interrupts priority masking*/
msr basepri, r3 /* Restore interrupts priority masking */
cpsie i /* Re-enable interrupts */
#else
msr primask, r3 /* Restore interrupts */
arch/arm/src/lm/lm_vectors.S
+1 -1
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@@ -368,7 +368,7 @@ lm_irqcommon:
/* Restore the interrupt state */
#ifdef CONFIG_ARMV7M_USEBASEPRI
msr basepri, r3 /* Restore interrupts priority masking*/
msr basepri, r3 /* Restore interrupts priority masking */
cpsie i /* Re-enable interrupts */
#else
msr primask, r3 /* Restore interrupts */
arch/arm/src/lpc17xx/lpc17_vectors.S
+1 -1
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@@ -377,7 +377,7 @@ lpc17_common:
/* Restore the interrupt state */
#ifdef CONFIG_ARMV7M_USEBASEPRI
msr basepri, r3 /* Restore interrupts priority masking*/
msr basepri, r3 /* Restore interrupts priority masking */
cpsie i /* Re-enable interrupts */
#else
msr primask, r3 /* Restore interrupts */
arch/arm/src/sam34/sam_vectors.S
+1 -1
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@@ -383,7 +383,7 @@ sam_common:
/* Restore the interrupt state */
#ifdef CONFIG_ARMV7M_USEBASEPRI
msr basepri, r3 /* Restore interrupts priority masking*/
msr basepri, r3 /* Restore interrupts priority masking */
cpsie i /* Re-enable interrupts */
#else
msr primask, r3 /* Restore interrupts */
arch/arm/src/stm32/stm32_vectors.S
+1 -1
View File
@@ -390,7 +390,7 @@ stm32_common:
/* Restore the interrupt state */
#ifdef CONFIG_ARMV7M_USEBASEPRI
msr basepri, r3 /* Restore interrupts priority masking*/
msr basepri, r3 /* Restore interrupts priority masking */
cpsie i /* Re-enable interrupts */
#else
msr primask, r3 /* Restore interrupts */