SAMA5: Adapt clocking for different boot modes. New header files for AXI matrix, BSC, and SFR

configs/lpc4330-xplorer/README.txt

@@ -425,12 +425,12 @@ Code Red IDE/Tools
   By default, the configurations here assume that you are executing directly
   from SRAM.
 
-    CONFIG_BOOT_SRAM=y             : Executing in SRAM
+    CONFIG_LPC43_BOOT_SRAM=y       : Executing in SRAM
     CONFIG_LPC43_CODEREDW=y        : Code Red under Windows
 
   To execute from SPIFI, you would need to set:
 
-    CONFIG_BOOT_SPIFI=y            : Executing from SPIFI
+    CONFIG_LPC43_BOOT_SPIFI=y      : Executing from SPIFI
     CONFIG_DRAM_SIZE=(128*1024)    : SRAM Bank0 size
     CONFIG_DRAM_START=0x10000000   : SRAM Bank0 base address
     CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset
@@ -725,20 +725,20 @@ LPC4330-Xplorer Configuration Options
 
        CONFIG_ARCH_FPU=y
  
-    CONFIG_BOOT_xxx - The startup code needs to know if the code is running
+    CONFIG_LPC43_BOOT_xxx - The startup code needs to know if the code is running
        from internal FLASH, external FLASH, SPIFI, or SRAM in order to
        initialize properly.  Note that a boot device is not specified for 
        cases where the code is copied into SRAM; those cases are all covered
-       by CONFIG_BOOT_SRAM.
+       by CONFIG_LPC43_BOOT_SRAM.
 
-       CONFIG_BOOT_SRAM=y      : Running from SRAM             (0x1000:0000)
-       CONFIG_BOOT_SPIFI=y     : Running from QuadFLASH        (0x1400:0000)
-       CONFIG_BOOT_FLASHA=y    : Running in internal FLASHA    (0x1a00:0000)
-       CONFIG_BOOT_FLASHB=y    : Running in internal FLASHA    (0x1b00:0000)
-       CONFIG_BOOT_CS0FLASH=y  : Running in external FLASH CS0 (0x1c00:0000)
-       CONFIG_BOOT_CS1FLASH=y  : Running in external FLASH CS1 (0x1d00:0000)
-       CONFIG_BOOT_CS2FLASH=y  : Running in external FLASH CS2 (0x1e00:0000)
-       CONFIG_BOOT_CS3FLASH=y  : Running in external FLASH CS3 (0x1f00:0000)
+       CONFIG_LPC43_BOOT_SRAM=y      : Running from SRAM             (0x1000:0000)
+       CONFIG_LPC43_BOOT_SPIFI=y     : Running from QuadFLASH        (0x1400:0000)
+       CONFIG_LPC43_BOOT_FLASHA=y    : Running in internal FLASHA    (0x1a00:0000)
+       CONFIG_LPC43_BOOT_FLASHB=y    : Running in internal FLASHA    (0x1b00:0000)
+       CONFIG_LPC43_BOOT_CS0FLASH=y  : Running in external FLASH CS0 (0x1c00:0000)
+       CONFIG_LPC43_BOOT_CS1FLASH=y  : Running in external FLASH CS1 (0x1d00:0000)
+       CONFIG_LPC43_BOOT_CS2FLASH=y  : Running in external FLASH CS2 (0x1e00:0000)
+       CONFIG_LPC43_BOOT_CS3FLASH=y  : Running in external FLASH CS3 (0x1f00:0000)
 
     CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
        have LEDs
@@ -909,7 +909,7 @@ Where <subdir> is one of the following:
     examples/ostest.  By default, this project assumes that you are
     executing directly from SRAM.
 
-      CONFIG_BOOT_SRAM=y             : Executing in SRAM
+      CONFIG_LPC43_BOOT_SRAM=y       : Executing in SRAM
       CONFIG_LPC43_CODEREDW=y        : Code Red under Windows
 
     This configuration directory, performs a simple test of the USB host
@@ -949,12 +949,12 @@ Where <subdir> is one of the following:
     examples/ostest.    By default, this project assumes that you are
     executing directly from SRAM.
 
-      CONFIG_BOOT_SRAM=y             : Executing in SRAM
+      CONFIG_LPC43_BOOT_SRAM=y       : Executing in SRAM
       CONFIG_LPC43_CODEREDW=y        : Code Red under Windows
 
     To execute from SPIFI, you would need to set:
 
-      CONFIG_BOOT_SPIFI=y            : Executing from SPIFI
+      CONFIG_LPC43_BOOT_SPIFI=y      : Executing from SPIFI
       CONFIG_DRAM_SIZE=(128*1024)    : SRAM Bank0 size
       CONFIG_DRAM_START=0x10000000   : SRAM Bank0 base address
       CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset

configs/lpc4330-xplorer/nsh/Make.defs

@@ -39,19 +39,19 @@ include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
 
 # Setup for the kind of memory that we are executing from
 
-ifeq ($(CONFIG_BOOT_SRAM),y)
+ifeq ($(CONFIG_LPC43_BOOT_SRAM),y)
   LDSCRIPT = ramconfig.ld
 endif
-ifeq ($(CONFIG_BOOT_SPIFI),y)
+ifeq ($(CONFIG_LPC43_BOOT_SPIFI),y)
   LDSCRIPT = spificonfig.ld
 endif
-ifeq ($(CONFIG_BOOT_FLASHA),y)
+ifeq ($(CONFIG_LPC43_BOOT_FLASHA),y)
   LDSCRIPT = flashaconfig.ld
 endif
-ifeq ($(CONFIG_BOOT_FLASHB),y)
+ifeq ($(CONFIG_LPC43_BOOT_FLASHB),y)
   LDSCRIPT = flashaconfig.ld
 endif
-ifeq ($(CONFIG_BOOT_CS0FLASH),y)
+ifeq ($(CONFIG_LPC43_BOOT_CS0FLASH),y)
   LDSCRIPT = cs0flash.ld
 endif
 

configs/lpc4330-xplorer/nsh/defconfig

@@ -60,14 +60,14 @@ CONFIG_ARMV7M_CMNVECTOR=y
 #
 # Execution address space
 #
-CONFIG_BOOT_SRAM=y
-CONFIG_BOOT_SPIFI=n
-CONFIG_BOOT_FLASHA=n
-CONFIG_BOOT_FLASHB=n
-CONFIG_BOOT_CS0FLASH=n
-CONFIG_BOOT_CS1FLASH=n
-CONFIG_BOOT_CS2FLASH=n
-CONFIG_BOOT_CS3FLASH=n
+CONFIG_LPC43_BOOT_SRAM=y
+CONFIG_LPC43_BOOT_SPIFI=n
+CONFIG_LPC43_BOOT_FLASHA=n
+CONFIG_LPC43_BOOT_FLASHB=n
+CONFIG_LPC43_BOOT_CS0FLASH=n
+CONFIG_LPC43_BOOT_CS1FLASH=n
+CONFIG_LPC43_BOOT_CS2FLASH=n
+CONFIG_LPC43_BOOT_CS3FLASH=n
 
 #
 # Identify toolchain and linker options

configs/lpc4330-xplorer/ostest/Make.defs

@@ -39,19 +39,19 @@ include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
 
 # Setup for the kind of memory that we are executing from
 
-ifeq ($(CONFIG_BOOT_SRAM),y)
+ifeq ($(CONFIG_LPC43_BOOT_SRAM),y)
   LDSCRIPT = ramconfig.ld
 endif
-ifeq ($(CONFIG_BOOT_SPIFI),y)
+ifeq ($(CONFIG_LPC43_BOOT_SPIFI),y)
   LDSCRIPT = spificonfig.ld
 endif
-ifeq ($(CONFIG_BOOT_FLASHA),y)
+ifeq ($(CONFIG_LPC43_BOOT_FLASHA),y)
   LDSCRIPT = flashaconfig.ld
 endif
-ifeq ($(CONFIG_BOOT_FLASHB),y)
+ifeq ($(CONFIG_LPC43_BOOT_FLASHB),y)
   LDSCRIPT = flashaconfig.ld
 endif
-ifeq ($(CONFIG_BOOT_CS0FLASH),y)
+ifeq ($(CONFIG_LPC43_BOOT_CS0FLASH),y)
   LDSCRIPT = cs0flash.ld
 endif
 

configs/lpc4330-xplorer/ostest/defconfig

@@ -60,14 +60,14 @@ CONFIG_ARMV7M_CMNVECTOR=y
 #
 # Execution address space
 #
-CONFIG_BOOT_SRAM=y
-CONFIG_BOOT_SPIFI=n
-CONFIG_BOOT_FLASHA=n
-CONFIG_BOOT_FLASHB=n
-CONFIG_BOOT_CS0FLASH=n
-CONFIG_BOOT_CS1FLASH=n
-CONFIG_BOOT_CS2FLASH=n
-CONFIG_BOOT_CS3FLASH=n
+CONFIG_LPC43_BOOT_SRAM=y
+CONFIG_LPC43_BOOT_SPIFI=n
+CONFIG_LPC43_BOOT_FLASHA=n
+CONFIG_LPC43_BOOT_FLASHB=n
+CONFIG_LPC43_BOOT_CS0FLASH=n
+CONFIG_LPC43_BOOT_CS1FLASH=n
+CONFIG_LPC43_BOOT_CS2FLASH=n
+CONFIG_LPC43_BOOT_CS3FLASH=n
 
 #
 # Identify toolchain and linker options

configs/sama5d3x-ek/ostest/Make.defs

@@ -37,7 +37,24 @@ include ${TOPDIR}/.config
 include ${TOPDIR}/tools/Config.mk
 include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs
 
-LDSCRIPT = isram.ld
+ifeq ($(CONFIG_SAMA5_BOOT_SRAM),y)
+  LDSCRIPT = isram.ld
+endif
+ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y)
+  LDSCRIPT = ddram.ld
+endif
+ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y)
+#  LDSCRIPT = cs0flash.ld
+endif
+ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y)
+#  LDSCRIPT = cs1flash.ld
+endif
+ifeq ($(CONFIG_SAMA5_BOOT_CS2FLASH),y)
+#  LDSCRIPT = cs2flash.ld
+endif
+ifeq ($(CONFIG_SAMA5_BOOT_CS3FLASH),y)
+#  LDSCRIPT = cs3flash.ld
+endif
 
 ifeq ($(WINTOOL),y)
   # Windows-native toolchains

configs/sama5d3x-ek/ostest/defconfig

@@ -160,6 +160,13 @@ CONFIG_SAMA5_UART0=y
 # CONFIG_SAMA5_ARM is not set
 # CONFIG_SAMA5_FUSE is not set
 # CONFIG_SAMA5_MPDDRC is not set
+# CONFIG_PIO_IRQ is not set
+CONFIG_SAMA5_BOOT_SRAM=y
+# CONFIG_SAMA5_BOOT_SDRAM is not set
+# CONFIG_SAMA5_BOOT_CS0FLASH is not set
+# CONFIG_SAMA5_BOOT_CS1FLASH is not set
+# CONFIG_SAMA5_BOOT_CS2FLASH is not set
+# CONFIG_SAMA5_BOOT_CS3FLASH is not set
 
 #
 # External Memory Configuration