configs: add nucleo-l496zg board files

This commit is contained in:
Juha Niskanen
2017-05-02 15:36:18 +03:00
committed by Gregory Nutt
parent 5f86fedc2b
commit 1829282442
27 changed files with 5274 additions and 18 deletions
+38 -4
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@@ -708,7 +708,7 @@ config ARCH_BOARD_NUCLEO_144
select ARCH_HAVE_IRQBUTTONS
---help---
STMicro Nucleo-144 development board featuring STMicroelectronics
F2, F3, F4 and F7 MCU families. The board is a "Hardware pattern"
F2, F3, F4, F7 and L4 MCU families. The board is a "Hardware pattern"
that can be populated with the 144 pin package of the following MCUs:
Target STM32 Order code
@@ -716,14 +716,44 @@ config ARCH_BOARD_NUCLEO_144
STM32F303ZET6 NUCLEO-F303ZE
STM32F429ZIT6 NUCLEO-F429ZI
STM32F446ZET6 NUCLEO-F446ZE
STM32F746ZGT6 NUCLEO-F746ZG
STM32F767ZIT6 NUCLEO-F767ZI
STM32L496ZGT6 NUCLEO-L496ZG
STM32L496ZGT6P NUCLEO-L496ZG-P
Supported in this release are:
Supported in this configuration are:
NUCLEO-F746ZG - STM32F746ZGT6 a 216MHz Cortex-M7, w/FPU - 1024KiB
Flash memory and 320KiB SRAM.
NUCLEO-F746ZG - STM32F746ZGT6 a 216MHz Cortex-M7, w/FPU -
1024KiB Flash memory and 320KiB SRAM.
NUCLEO-F767ZI - STM32F767ZIT6 a 216MHz Cortex-M7, w/DPFPU -
2048KiB Flash memory and 512KiB SRAM.
config ARCH_BOARD_NUCLEO_L496ZG
bool "STM32L496 Nucleo L496ZG"
depends on ARCH_CHIP_STM32L496ZG
select ARCH_HAVE_LEDS
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
STMicro Nucleo-144 development board featuring STMicroelectronics
F2, F3, F4, F7 and L4 MCU families. The board is a "Hardware pattern"
that can be populated with the 144 pin package of the following MCUs:
Target STM32 Order code
STM32F207ZGT6 NUCLEO-F207ZG
STM32F303ZET6 NUCLEO-F303ZE
STM32F429ZIT6 NUCLEO-F429ZI
STM32F446ZET6 NUCLEO-F446ZE
STM32F746ZGT6 NUCLEO-F746ZG
STM32F767ZIT6 NUCLEO-F767ZI
STM32L496ZGT6 NUCLEO-L496ZG
STM32L496ZGT6P NUCLEO-L496ZG-P
Supported in this configuration are:
NUCLEO-L496ZG - STM32L496ZGT6 a 80MHz Cortex-M4, w/FPU -
1024KiB Flash memory and 320KiB SRAM.
config ARCH_BOARD_NUCLEO_F072RB
bool "STM32F072 Nucleo F072RB"
depends on ARCH_CHIP_STM32F072RB
@@ -1518,6 +1548,7 @@ config ARCH_BOARD
default "nucleo-f334r8" if ARCH_BOARD_NUCLEO_F334R8
default "nucleo-f4x1re" if ARCH_BOARD_NUCLEO_F401RE || ARCH_BOARD_NUCLEO_F411RE
default "nucleo-l476rg" if ARCH_BOARD_NUCLEO_L476RG
default "nucleo-l496zg" if ARCH_BOARD_NUCLEO_L496ZG
default "qemu-i486" if ARCH_BOARD_QEMU_I486
default "sabre-6quad" if ARCH_BOARD_SABRE_6QUAD
default "sama5d2-xult" if ARCH_BOARD_SAMA5D2_XULT
@@ -1835,6 +1866,9 @@ endif
if ARCH_BOARD_NUCLEO_L476RG
source "configs/nucleo-l476rg/Kconfig"
endif
if ARCH_BOARD_NUCLEO_L496ZG
source "configs/nucleo-l496zg/Kconfig"
endif
if ARCH_BOARD_QEMU_I486
source "configs/qemu-i486/Kconfig"
endif
+14 -10
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@@ -32,14 +32,17 @@ Nucleo-144 Boards:
The Nucleo-144 is a standard board for use with several STM32 parts in the
LQFP144 package. Variants include
STM32 Part Board Variant Name
------------- ------------------
STM32F207ZGT6 NUCLEO-F207ZG
STM32F303ZET6 NUCLEO-F303ZE
STM32F429ZIT6 NUCLEO-F429ZI
STM32F446ZET6 NUCLEO-F446ZE
STM32F746ZGT6 NUCLEO-F746ZG
STM32F767ZIT6 NUCLEO-F767ZI
STM32 Part Board Variant Name
------------- ------------------
STM32F207ZGT6 NUCLEO-F207ZG
STM32F303ZET6 NUCLEO-F303ZE
STM32F429ZIT6 NUCLEO-F429ZI
STM32F446ZET6 NUCLEO-F446ZE
STM32F746ZGT6 NUCLEO-F746ZG
STM32F767ZIT6 NUCLEO-F767ZI
STM32L496ZGT6 NUCLEO-L496ZG
STM32L496ZGT6P NUCLEO-L496ZG-P
------------- ------------------
This directory is intended to support all Nucleo-144 variants since the
@@ -48,9 +51,10 @@ board design provides uniformity in the documentation from ST and should
allow us to quickly change configurations by just cloning a configuration
and changing the CPU choice and board initialization. Unfortunately for
the developer, the CPU specific information must be extracted from the
common information in the documentation.
common information in the documentation. The exception are the STM32L496ZG
boards, which are supported by configs/nucleo-l496zg
Please read the User Manaul UM1727: Getting started with STM32 Nucleo board
Please read the User Manual UM1727: Getting started with STM32 Nucleo board
software development tools and take note of the Powering options for the
board (6.3 Power supply and power selection) and the Solder bridges based
hardware configuration changes that are configurable (6.11 Solder bridges).
+2 -1
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@@ -1,5 +1,5 @@
/****************************************************************************
* config/nucleo-144/src/stm32_appinitilaize.c
* config/nucleo-144/src/stm32_appinitialize.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
@@ -42,6 +42,7 @@
#include <nuttx/config.h>
#include <sys/types.h>
#include <sys/mount.h>
#include <debug.h>
#include <syslog.h>
+2 -2
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@@ -6,9 +6,9 @@ NucleoL476RG board from ST Micro. See
http://www.st.com/nucleo-l476rg
NucleoF476RG:
NucleoL476RG:
Microprocessor: 32-bit ARM Cortex M4 at 80MHz STM32F476RGT6
Microprocessor: 32-bit ARM Cortex M4 at 80MHz STM32L476RGT6
Memory: 1024 KB Flash and 96+32 KB SRAM
ADC: 2×12-bit, 2.4 MSPS A/D converter: up to 24 channels
DMA: 16-stream DMA controllers with FIFOs and burst support
+1 -1
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@@ -34,7 +34,7 @@
*
****************************************************************************/
/* The STM32F411RE has 512Kb of FLASH beginning at address 0x0800:0000 and
/* The STM32L476RG has 512Kb of FLASH beginning at address 0x0800:0000 and
* 128Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH,
* FLASH memory is aliased to address 0x0000:0000 where the code expects to
* begin execution by jumping to the entry point in the 0x0800:0000 address
+223
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@@ -0,0 +1,223 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_NUCLEO_144
choice
prompt "Select Console wiring."
default NUCLEO_ARDUINO
---help---
Select where you will connect the console.
Virtual COM Port:
Advantage: Use the ST-Link as a console. No Extra wiring
neded.
Disdvantage: Not the best choice for initial bring up.
ARDUINO Connector:
Advantage: You have a shield so it is
easy.
Disdvantage: You loose the use of the
other functions on PC6, PC7
STM32F7
ARDUIONO FUNCTION GPIO
-- ----- --------- ----
DO RX USART6_RX PG9
D1 TX USART6_TX PG14
-- ----- --------- ---
OR
Morpho Connector:
STM32F7
MORPHO FUNCTION GPIO
-------- --------- -----
CN12-64 USART8_RX PE0
CN11-61 USART8_TX PE1
-------- --------- -----
config NUCLEO_CONSOLE_ARDUINO
bool "ARDUINO Connector"
select STM32F7_USART6
select USART6_SERIALDRIVER
select USART6_SERIAL_CONSOLE
config NUCLEO_CONSOLE_VIRTUAL
bool "Virtual Comport"
select STM32F7_USART3
select USART3_SERIALDRIVER
select USART3_SERIAL_CONSOLE
config NUCLEO_CONSOLE_MORPHO
bool "Morpho Connector"
select STM32F7_UART8
select UART8_SERIALDRIVER
select UART8_SERIAL_CONSOLE
config NUCLEO_CONSOLE_NONE
bool "No Console"
endchoice # "Select Console wiring"
config NUCLEO_SPI_TEST
bool "Enable SPI test"
default n
---help---
Enable Spi test - initalize and configure SPI to send
NUCLEO_SPI_TEST_MESSAGE text. The text is sent on the
selected SPI Buses with the configured parameters.
Note the CS lines will not be asserted.
if NUCLEO_SPI_TEST
config NUCLEO_SPI_TEST_MESSAGE
string "Text to Send on SPI Bus(es)"
default "Hello World"
depends on NUCLEO_SPI_TEST
---help---
Text to sent on SPI bus(es)
config NUCLEO_SPI1_TEST
bool "Test SPI bus 1"
default n
depends on NUCLEO_SPI_TEST
---help---
Enable Spi test - on SPI BUS 1
if NUCLEO_SPI1_TEST
config NUCLEO_SPI1_TEST_FREQ
int "SPI 1 Clock Freq in Hz"
default 1000000
depends on NUCLEO_SPI1_TEST
---help---
Sets SPI 1 Clock Freq
config NUCLEO_SPI1_TEST_BITS
int "SPI 1 number of bits"
default 8
depends on NUCLEO_SPI1_TEST
---help---
Sets SPI 1 bit length
choice
prompt "SPI BUS 1 Clock Mode"
default NUCLEO_SPI1_TEST_MODE3
---help---
Sets SPI 1 clock mode
config NUCLEO_SPI1_TEST_MODE0
bool "CPOL=0 CHPHA=0"
config NUCLEO_SPI1_TEST_MODE1
bool "CPOL=0 CHPHA=1"
config NUCLEO_SPI1_TEST_MODE2
bool "CPOL=1 CHPHA=0"
config NUCLEO_SPI1_TEST_MODE3
bool "CPOL=1 CHPHA=1"
endchoice # "SPI BUS 1 Clock Mode"
endif # NUCLEO_SPI1_TEST
config NUCLEO_SPI2_TEST
bool "Test SPI bus 2"
default n
depends on NUCLEO_SPI_TEST
---help---
Enable Spi test - on SPI BUS 2
if NUCLEO_SPI2_TEST
config NUCLEO_SPI2_TEST_FREQ
int "SPI 2 Clock Freq in Hz"
default 12000000
depends on NUCLEO_SPI2_TEST
---help---
Sets SPI 2 Clock Freq
config NUCLEO_SPI2_TEST_BITS
int "SPI 2 number of bits"
default 8
depends on NUCLEO_SPI2_TEST
---help---
Sets SPI 2 bit length
choice
prompt "SPI BUS 2 Clock Mode"
default NUCLEO_SPI2_TEST_MODE3
---help---
Sets SPI 2 clock mode
config NUCLEO_SPI2_TEST_MODE0
bool "CPOL=0 CHPHA=0"
config NUCLEO_SPI2_TEST_MODE1
bool "CPOL=0 CHPHA=1"
config NUCLEO_SPI2_TEST_MODE2
bool "CPOL=1 CHPHA=0"
config NUCLEO_SPI2_TEST_MODE3
bool "CPOL=1 CHPHA=1"
endchoice # "SPI BUS 2 Clock Mode"
endif # NUCLEO_SPI2_TEST
config NUCLEO_SPI3_TEST
bool "Test SPI bus 3"
default n
depends on NUCLEO_SPI_TEST
---help---
Enable Spi test - on SPI BUS 3
if NUCLEO_SPI3_TEST
config NUCLEO_SPI3_TEST_FREQ
int "SPI 3 Clock Freq in Hz"
default 40000000
depends on NUCLEO_SPI3_TEST
---help---
Sets SPI 3 Clock Freq
config NUCLEO_SPI3_TEST_BITS
int "SPI 3 number of bits"
default 8
depends on NUCLEO_SPI3_TEST
---help---
Sets SPI 3 bit length
choice
prompt "SPI BUS 3 Clock Mode"
default NUCLEO_SPI3_TEST_MODE3
---help---
Sets SPI 3 clock mode
config NUCLEO_SPI3_TEST_MODE0
bool "CPOL=0 CHPHA=0"
config NUCLEO_SPI3_TEST_MODE1
bool "CPOL=0 CHPHA=1"
config NUCLEO_SPI3_TEST_MODE2
bool "CPOL=1 CHPHA=0"
config NUCLEO_SPI3_TEST_MODE3
bool "CPOL=1 CHPHA=1"
endchoice # "SPI BUS 3 Clock Mode"
endif # NUCLEO_SPI3_TEST
endif # NUCLEO_SPI_TEST
endif # ARCH_BOARD_NUCLEO_144
+378
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@@ -0,0 +1,378 @@
README
======
This README discusses issues unique to NuttX configurations for the STMicro
Nucleo-144 board. See
http://www.st.com/content/ccc/resource/technical/document/data_brief/group0/7b/df/1d/e9/64/55/43/8d/DM00247910/files/DM00247910.pdf/jcr:content/translations/en.DM00247910.pdf
Contents
========
- Nucleo-144 Boards
- Nucleo L496ZG
- Hardware
- Button
- LED
- U[S]ARTs and Serial Consoles
- SPI
- SDIO - MMC
- SPI Test
- Configurations
nsh
Nucleo-144 Boards:
=================
The Nucleo-144 is a standard board for use with several STM32 parts in the
LQFP144 package. Variants include
STM32 Part Board Variant Name
------------- ------------------
STM32F207ZGT6 NUCLEO-F207ZG
STM32F303ZET6 NUCLEO-F303ZE
STM32F429ZIT6 NUCLEO-F429ZI
STM32F446ZET6 NUCLEO-F446ZE
STM32F746ZGT6 NUCLEO-F746ZG
STM32F767ZIT6 NUCLEO-F767ZI
STM32L496ZGT6 NUCLEO-L496ZG
STM32L496ZGT6P NUCLEO-L496ZG-P
------------- ------------------
This directory supports the L4 variants of Nucleo-144
Please read the User Manual UM2179: Getting started with STM32 Nucleo board
software development tools and take note of the Powering options for the
board (6.3 Power supply and power selection) and the Solder bridges based
hardware configuration changes that are configurable (6.11 Solder bridges).
Also note that UM1727 is not valid for L4 Nucleo-144 boards!
Common Board Features:
---------------------
Peripherals: 8 leds, 2 push button (3 LEDs, 1 button) under software
control
Debug: STLINK/V2-1 debugger/programmer Uses a STM32F103CB to
provide a ST-Link for programming, debug similar to the
OpenOcd FTDI function - USB to JTAG front-end.
Expansion I/F: ST Zio and Extended Ardino and Morpho Headers
Nucleo L496ZG
=============
ST Nucleo L496ZG board from ST Micro is supported. See
http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-l496zg.html
The Nucleo L496ZG order part number is NUCLEO-L496ZG. It is one member of
the STM32 Nucleo-144 board family.
NUCLEO-L496ZG Features:
----------------------
Microprocessor: STM32L496ZGT6 Core: ARM 32-bit Cortex®-M4 CPU with FPU,
80 MHz, MPU, and DSP instructions.
Memory: 1024 KB Flash 320KB of SRAM (including 64KB of SRAM2)
ADC: 3×12-bit: up to 24 channels
DMA: 2 X 7-stream DMA controllers with FIFOs and burst support
Timers: Up to 13 timers: (2x 16-bit lowpower), two 32-bit timers,
2x watchdogs, SysTick
GPIO: 114 I/O ports with interrupt capability
LCD: LCD-TFT Controller, Parallel interface
I2C: 4 × I2C interfaces (SMBus/PMBus)
U[S]ARTs: 3 USARTs, 2 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA,
modem control)
SPI/12Ss: 6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S
for audio class accuracy via internal audio PLL or external
clock
QSPI: Dual mode Quad-SPI
SAIs: 2 Serial Audio Interfaces
CAN: 2 X CAN interface
SDMMC interface
USB: USB 2.0 full-speed device/host/OTG controller with on-chip
PHY
Camera Interface: 8/14 Bit
CRC calculation unit
TRG: True random number generator
RTC
See https://developer.mbed.org/platforms/ST-Nucleo-L496ZG for additional
information about this board.
Hardware
========
< Section needs updating >
GPIO - there are 144 I/O lines on the STM32L4xxZx with various pins pined out
on the Nucleo 144.
Keep in mind that:
1) The I/O is 3.3 Volt not 5 Volt like on the Arduino products.
2) The Nucleo-144 board family has 3 pages of Solder Bridges AKA Solder
Blobs (SB) that can alter the factory configuration. We will note SB
in effect but will assume the facitory defualt settings.
Our main concern is establishing a console and LED utilization for
debugging. Because so many pins can be multiplexed with so many functions,
the above mentioned graphic may be helpful in indentifying a serial port.
There are 4 choices that can be made from the menuconfig:
CONFIG_NUCLEO_CONSOLE_ARDUINO or CONFIG_NUCLEO_CONSOLE_MORPHO or
CONFIG_NUCLEO_CONSOLE_VIRTUAL or CONFIG_NUCLEO_CONSOLE_NONE
The CONFIG_NUCLEO_CONSOLE_NONE makes no preset for the console. You should still visit
the U[S]ART selection and Device Drivers to disable any U[S]ART reamaing.
The CONFIG_NUCLEO_CONSOLE_ARDUINO configurations assume that you are using a
standard Arduio RS-232 shield with the serial interface with RX on pin D0 and
TX on pin D1 from USART6:
-------- ---------------
STM32F7
ARDUIONO FUNCTION GPIO
-- ----- --------- -----
DO RX USART6_RX PG9
D1 TX USART6_TX PG14
-- ----- --------- -----
The CONFIG_NUCLEO_CONSOLE_MORPHO configurations uses Serial Port 8 (USART8)
with TX on PE1 and RX on PE0.
Serial
------
SERIAL_RX PE_0
SERIAL_TX PE_1
The CONFIG_NUCLEO_CONSOLE_VIRTUAL configurations uses Serial Port 3 (USART3)
with TX on PD8 and RX on PD9.
Serial
------
SERIAL_RX PD9
SERIAL_TX PD8
These signals are internally connected to the on board ST-Link
Of course if your design has used those pins you can choose a completely
different U[S]ART to use as the console. In that Case, you will need to edit
the include/board.h to select different U[S]ART and / or pin selections.
Buttons
-------
B1 USER: the user button is connected to the I/O PC13 (Tamper support, SB173
ON and SB180 OFF)
LEDs
----
The Board provides a 3 user LEDs, LD1-LD3
LED1 (Green) PB_0 (SB120 ON and SB119 OFF)
LED2 (Blue) PB_7 (SB139 ON)
LED3 (Red) PB_14 (SP118 ON)
- When the I/O is HIGH value, the LEDs are on.
- When the I/O is LOW, the LEDs are off.
These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/stm32_autoleds.c. The LEDs are used to encode OS
related events as follows when the LEDs are available:
SYMBOL Meaning RED GREEN BLUE
------------------- ----------------------- --- ----- ----
LED_STARTED NuttX has been started OFF OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF OFF ON
LED_IRQSENABLED Interrupts enabled OFF ON OFF
LED_STACKCREATED Idle stack created OFF ON ON
LED_INIRQ In an interrupt NC NC ON (momentary)
LED_SIGNAL In a signal handler NC ON OFF (momentary)
LED_ASSERTION An assertion failed ON NC ON (momentary)
LED_PANIC The system has crashed ON OFF OFF (flashing 2Hz)
LED_IDLE MCU is is sleep mode ON OFF OFF
OFF - means that the OS is still initializing. Initialization is very fast
so if you see this at all, it probably means that the system is
hanging up somewhere in the initialization phases.
GREEN - This means that the OS completed initialization.
BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is
illuminated and extinguished when the interrupt or signal handler
exits.
VIOLET - If a recovered assertion occurs, the RED and blue LED will be
illuminated briefly while the assertion is handled. You will
probably never see this.
Flashing RED - In the event of a fatal crash, all other LEDs will be
extinguished and RED LED will FLASH at a 2Hz rate.
Thus if the GREEN LED is lit, NuttX has successfully booted and is,
apparently, running normally. If the RED LED is flashing at
approximately 2Hz, then a fatal error has been detected and the system has
halted.
Serial Consoles
===============
< Section needs updating >
USART6 (CONFIG_NUCLEO_CONSOLE_ARDUINO)
------
STM32F7
ARDUIONO FUNCTION GPIO
-- ----- --------- -----
DO RX USART6_RX PG9
D1 TX USART6_TX PG14
-- ----- --------- -----
You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL
Nucleo 144 FTDI TTL-232R-3V3
------------- -------------------
TXD - D1-TXD - RXD - Pin 5 (Yellow)
RXD - D0-RXD - TXD - Pin 4 (Orange)
GND GND - GND Pin 1 (Black)
------------- -------------------
*Note you will be reverse RX/TX
Use make menuconfig to configure USART6 as the console:
CONFIG_STM32F7_USART6=y
CONFIG_USARTs_SERIALDRIVER=y
CONFIG_USARTS_SERIAL_CONSOLE=y
CONFIG_USART6_RXBUFSIZE=256
CONFIG_USART6_TXBUFSIZE=256
CONFIG_USART6_BAUD=115200
CONFIG_USART6_BITS=8
CONFIG_USART6_PARITY=0
CONFIG_USART6_2STOP=0
USART8 (CONFIG_NUCLEO_CONSOLE_MORPHO)
------
Pins and Connectors:
FUNC GPIO Connector
Pin NAME
---- --- ------- ----
TXD: PE1 CN11-61, PE1
RXD: PE0 CN12-64, PE0
CN10-33, D34
---- --- ------- ----
You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL
Nucleo 144 FTDI TTL-232R-3V3
------------- -------------------
TXD - CN11-61 - RXD - Pin 5 (Yellow)
RXD - CN12-64 - TXD - Pin 4 (Orange)
GND CN12-63 - GND Pin 1 (Black)
------------- -------------------
*Note you will be reverse RX/TX
Use make menuconfig to configure USART8 as the console:
CONFIG_STM32L4_UART8=y
CONFIG_UART8_SERIALDRIVER=y
CONFIG_UART8_SERIAL_CONSOLE=y
CONFIG_UART8_RXBUFSIZE=256
CONFIG_UART8_TXBUFSIZE=256
CONFIG_UART8_BAUD=115200
CONFIG_UART8_BITS=8
CONFIG_UART8_PARITY=0
CONFIG_UART8_2STOP=0
Virtual COM Port (CONFIG_NUCLEO_CONSOLE_VIRTUAL)
----------------
Yet another option is to use USART3 and the USB virtual COM port. This
option may be more convenient for long term development, but is painful
to use during board bring-up.
Solder Bridges. This configuration requires:
PD8 USART3 TX SB5 ON and SB7 OFF (Default)
PD9 USART3 RX SB6 ON and SB4 OFF (Default)
Configuring USART3 is the same as given above but add the S and #3.
Question: What BAUD should be configure to interface with the Virtual
COM port? 115200 8N1?
Default
-------
As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the
virtual COM port is enabled.
SPI
---
Since this board is so generic, having a quick way to vet the SPI
configuration seams in order. So the board provides a quick test
that can be selected vi CONFIG_NUCLEO_SPI_TEST that will initalise
the selected buses (SPI1-SPI3) and send some text on the bus at
application initalization time board_app_initialize.
SDIO
----
To test the SD performace one can use a SparkFun microSD Sniffer
from https://www.sparkfun.com/products/9419 or similar board
and connect it as follows:
VCC V3.3 CN11 16
GND GND CN11-8
CMD PD2 CN11-4
CLK PC12 CN11-3
DAT0 - PC8 CN12-2
DAT1 - PC9 CN12-1
DAT2 PC10 CN11-1
CD PC11 CN11-2
Configurations
==============
nsh:
----
Configures the NuttShell (nsh) located at apps/examples/nsh for the
Nucleo-144 boards. The Configuration enables the serial interfaces
on USART6. Support for builtin applications is enabled, but in the base
configuration no builtin applications are selected (see NOTES below).
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configuration using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. If this is the intall configuration then Execute
'cd tools && ./configure.sh nucleo-144/nsh && cd ..'
in nuttx/ in order to start configuration process.
Caution: Doing this step more than once will overwrite .config with
the contents of the nucleo-144/nsh/defconfig file.
c. Execute 'make oldconfig' in nuttx/ in order to refresh the
configuration.
d. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
e. Save the .config file to reuse it in the future starting at step d.
2. By default, this configuration uses the ARM GNU toolchain
for Linux. That can easily be reconfigured, of course.
CONFIG_HOST_LINUX=y : Builds under Linux
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : ARM GNU for Linux
3. Although the default console is USART3 (which would correspond to
the Virtual COM port) I have done all testing with the console
device configured for UART8 (see instruction above under "Serial
Consoles).
+458
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@@ -0,0 +1,458 @@
/************************************************************************************
* configs/nucleo-l496zg/include/board.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* Mark Olsson <post@markolsson.se>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIG_NUCLEO_L496ZG_INCLUDE_BOARD_H
#define __CONFIG_NUCLEO_L496ZG_INCLUDE_BOARD_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#ifdef __KERNEL__
#include "stm32l4_rcc.h"
#ifdef CONFIG_STM32L4_SDMMC1
# include "stm32l4_sdmmc.h"
#endif
#endif
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Clocking *************************************************************************/
/* The Nucleo-144 board provides the following clock sources:
*
* MCO: 8 MHz from MCO output of ST-LINK is used as input clock
* X2: 32.768 KHz crystal for LSE
* X3: HSE crystal oscillator (not provided)
*
* So we have these clock source available within the STM32
*
* HSI: 16 MHz RC factory-trimmed
* LSI: 32 KHz RC
* HSE: 8 MHz from MCO output of ST-LINK
* LSE: 32.768 kHz
*/
#define STM32_BOARD_XTAL 8000000ul
#define STM32_HSI_FREQUENCY 16000000ul
#define STM32_LSI_FREQUENCY 32000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
#define HSI_CLOCK_CONFIG
#if defined(HSI_CLOCK_CONFIG)
#define STM32L4_BOARD_USEHSI
/* Prescaler common to all PLL inputs; will be 1 */
#define STM32L4_PLLCFG_PLLM RCC_PLLCFG_PLLM(1)
/* 'main' PLL config; we use this to generate our system clock via the R
* output. We set it up as 16 MHz / 1 * 10 / 2 = 80 MHz
*
* XXX NOTE: currently the main PLL is implicitly turned on and is implicitly
* the system clock; this should be configurable since not all applications may
* want things done this way.
*/
#define STM32L4_PLLCFG_PLLN RCC_PLLCFG_PLLN(10)
#define STM32L4_PLLCFG_PLLP 0
#undef STM32L4_PLLCFG_PLLP_ENABLED
#define STM32L4_PLLCFG_PLLQ RCC_PLLCFG_PLLQ_2
#define STM32L4_PLLCFG_PLLQ_ENABLED
#define STM32L4_PLLCFG_PLLR RCC_PLLCFG_PLLR_2
#define STM32L4_PLLCFG_PLLR_ENABLED
/* 'SAIPLL1' is used to generate the 48 MHz clock, since we can't
* do that with the main PLL's N value. We set N = 13, and enable
* the Q output (ultimately for CLK48) with /4. So,
* 16 MHz / 1 * 12 / 4 = 48 MHz
*
* XXX NOTE: currently the SAIPLL /must/ be explicitly selected in the
* menuconfig, or else all this is a moot point, and the various 48 MHz
* peripherals will not work (RNG at present). I would suggest removing
* that option from Kconfig altogether, and simply making it an option
* that is selected via a #define here, like all these other params.
*/
#define STM32L4_PLLSAI1CFG_PLLN RCC_PLLSAI1CFG_PLLN(12)
#define STM32L4_PLLSAI1CFG_PLLP 0
#undef STM32L4_PLLSAI1CFG_PLLP_ENABLED
#define STM32L4_PLLSAI1CFG_PLLQ RCC_PLLSAI1CFG_PLLQ_4
#define STM32L4_PLLSAI1CFG_PLLQ_ENABLED
#define STM32L4_PLLSAI1CFG_PLLR 0
#undef STM32L4_PLLSAI1CFG_PLLR_ENABLED
/* 'SAIPLL2' is not used in this application */
#define STM32L4_PLLSAI2CFG_PLLN RCC_PLLSAI2CFG_PLLN(8)
#define STM32L4_PLLSAI2CFG_PLLP 0
#undef STM32L4_PLLSAI2CFG_PLLP_ENABLED
#define STM32L4_PLLSAI2CFG_PLLR 0
#undef STM32L4_PLLSAI2CFG_PLLR_ENABLED
#define STM32L4_SYSCLK_FREQUENCY 80000000ul
/* CLK48 will come from PLLSAI1 (implicitly Q) */
#define STM32L4_USE_CLK48 1
#define STM32L4_CLK48_SEL RCC_CCIPR_CLK48SEL_PLLSAI1
/* Enable the LSE oscillator, used automatically trim the MSI, and for RTC */
#define STM32L4_USE_LSE 1
/* AHB clock (HCLK) is SYSCLK (80MHz) */
#define STM32L4_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
#define STM32L4_HCLK_FREQUENCY STM32L4_SYSCLK_FREQUENCY
#define STM32L4_BOARD_HCLK STM32L4_HCLK_FREQUENCY /* Same as above, to satisfy compiler */
/* APB1 clock (PCLK1) is HCLK/1 (80MHz) */
#define STM32L4_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK /* PCLK1 = HCLK / 1 */
#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
/* Timers driven from APB1 will be twice PCLK1 */
/* REVISIT : this can be configured */
#define STM32L4_APB1_TIM2_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM3_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM4_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM5_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM6_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM7_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
/* APB2 clock (PCLK2) is HCLK (80MHz) */
#define STM32L4_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
/* Timers driven from APB2 will be twice PCLK2 */
/* REVISIT : this can be configured */
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
*/
/* REVISIT : this can be configured */
#elif defined(HSE_CLOCK_CONFIG)
# error "Not implemented"
#endif
/* SDMMC dividers. Note that slower clocking is required when DMA is disabled
* in order to avoid RX overrun/TX underrun errors due to delayed responses
* to service FIFOs in interrupt driven mode. These values have not been
* tuned!!!
*
* SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(118+2)=400 KHz
*/
#define STM32_SDMMC_INIT_CLKDIV (118 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
/* DMA ON: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(1+2)=16 MHz
* DMA OFF: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define STM32_SDMMC_MMCXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#else
# define STM32_SDMMC_MMCXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#endif
/* DMA ON: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(1+2)=16 MHz
* DMA OFF: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define STM32_SDMMC_SDXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#else
# define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#endif
#if defined(CONFIG_STM32L4_SDMMC2)
# define GPIO_SDMMC2_D0 GPIO_SDMMC2_D0_1
# define GPIO_SDMMC2_D1 GPIO_SDMMC2_D1_1
# define GPIO_SDMMC2_D2 GPIO_SDMMC2_D2_1
# define GPIO_SDMMC2_D3 GPIO_SDMMC2_D3_1
#endif
/* DMA Channel/Stream Selections *****************************************************/
/* Stream selections are arbitrary for now but might become important in the future
* if we set aside more DMA channels/streams.
*
* SDMMC DMA is on DMA2
*
* SDMMC1 DMA
* DMAMAP_SDMMC1_1 = Channel 4, Stream 3
* DMAMAP_SDMMC1_2 = Channel 4, Stream 6
*
* SDMMC2 DMA
* DMAMAP_SDMMC2_1 = Channel 11, Stream 0
* DMAMAP_SDMMC3_2 = Channel 11, Stream 5
*/
#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_1
#define DMAMAP_SDMMC2 DMAMAP_SDMMC2_1
/* FLASH wait states
*
* --------- ---------- -----------
* VDD MAX SYSCLK WAIT STATES
* --------- ---------- -----------
* 1.7-2.1 V 180 MHz 8
* 2.1-2.4 V 216 MHz 9
* 2.4-2.7 V 216 MHz 8
* 2.7-3.6 V 216 MHz 7
* --------- ---------- -----------
*/
#define BOARD_FLASH_WAITSTATES 7
/* LED definitions ******************************************************************/
/* The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED, LD2 a Blue
* LED and LD3 a Red LED, that can be controlled by software. The following
* definitions assume the default Solder Bridges are installed.
*
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way.
* The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED1 0
#define BOARD_LED2 1
#define BOARD_LED3 2
#define BOARD_NLEDS 3
#define BOARD_LED_GREEN BOARD_LED1
#define BOARD_LED_BLUE BOARD_LED2
#define BOARD_LED_RED BOARD_LED3
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
#define BOARD_LED2_BIT (1 << BOARD_LED2)
#define BOARD_LED3_BIT (1 << BOARD_LED3)
/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
* include/board.h and src/stm32_autoleds.c. The LEDs are used to encode OS-related
* events as follows:
*
*
* SYMBOL Meaning LED state
* Red Green Blue
* ---------------------- -------------------------- ------ ------ ----*/
#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */
#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */
#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */
#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */
#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */
#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */
#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */
#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */
#define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */
/* Thus if the Green LED is statically on, NuttX has successfully booted and
* is, apparently, running normally. If the Red LED is flashing at
* approximately 2Hz, then a fatal error has been detected and the system
* has halted.
*/
/* Button definitions ***************************************************************/
/* The Nucleo-L496ZG supports one button: Pushbutton B1, labeled "User", is
* connected to GPIO PC13. A high value will be sensed when the button is depressed.
*/
#define BUTTON_USER 0
#define NUM_BUTTONS 1
#define BUTTON_USER_BIT (1 << BUTTON_USER)
/* Alternate function pin selections ************************************************/
#define GPIO_USART2_TX GPIO_USART2_TX_2
#define GPIO_USART2_RX GPIO_USART2_RX_2
#define GPIO_USART3_TX GPIO_USART3_TX_2
#define GPIO_USART3_RX GPIO_USART3_RX_2
#if defined(CONFIG_NUCLEO_CONSOLE_ARDUINO)
/* USART6:
*
* These configurations assume that you are using a standard Arduio RS-232 shield
* with the serial interface with RX on pin D0 and TX on pin D1:
*
* -------- ---------------
* STM32F7
* ARDUIONO FUNCTION GPIO
* -- ----- --------- -----
* DO RX USART6_RX PG9
* D1 TX USART6_TX PG14
* -- ----- --------- -----
*/
# define GPIO_USART6_RX GPIO_USART6_RX_2
# define GPIO_USART6_TX GPIO_USART6_TX_2
#endif
/* USART3:
* Use USART3 and the USB virtual COM port
*/
#if defined(CONFIG_NUCLEO_CONSOLE_VIRTUAL)
/* LPUART1 is connector to Virtual COM port PG6 and PG7, but there is no lpserial. */
//#define GPIO_USART2_TX GPIO_LPUART1_TX_3
//#define GPIO_USART2_RX GPIO_LPUART1_RX_3
# error "No Nucleo virtual console before lpserial is unimplemented"
#endif
/* DMA channels *************************************************************/
/* ADC */
#define ADC1_DMA_CHAN DMAMAP_ADC1_1
#define ADC2_DMA_CHAN DMAMAP_ADC2_1
#define ADC3_DMA_CHAN DMAMAP_ADC3_1
/* SPI
*
*
* PA6 SPI1_MISO CN12-13
* PA7 SPI1_MOSI CN12-15
* PA5 SPI1_SCK CN12-11
*
* PB14 SPI2_MISO CN12-28
* PB15 SPI2_MOSI CN12-26
* PB13 SPI2_SCK CN12-30
*
* PB4 SPI3_MISO CN12-27
* PB5 SPI3_MOSI CN12-29
* PB3 SPI3_SCK CN12-31
*/
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_3
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_1
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_1
/* I2C
*
*
* PB8 I2C1_SCL CN12-3
* PB9 I2C1_SDA CN12-5
* PB10 I2C2_SCL CN11-51
* PB11 I2C2_SDA CN12-18
*
* PA8 I2C3_SCL CN12-23
* PC9 I2C3_SDA CN12-1
*
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1
#define GPIO_I2C3_SDA GPIO_I2C3_SDA_1
#define GPIO_I2C4_SCL GPIO_I2C4_SCL_1
#define GPIO_I2C4_SDA GPIO_I2C4_SDA_1
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
/************************************************************************************
* Name: stm32l4_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void stm32l4_boardinitialize(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIG_NUCLEO_L496ZG_INCLUDE_BOARD_H */
+112
View File
@@ -0,0 +1,112 @@
############################################################################
# configs/nucleo-144/l496-nsh/Make.defs
#
# Copyright (C) 2014 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = l496zg-flash.ld
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)/tools/copydir.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
MKDEP = $(TOPDIR)/tools/mknulldeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(ARCROSSDEV)ar rcs
NM = $(ARCROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ASMEXT = .S
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
HOSTLDFLAGS =
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,109 @@
/****************************************************************************
* configs/nucleo-144/scripts/kernel-space.ld
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > kflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > kflash
.ARM.extab : {
*(.ARM.extab*)
} > kflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > kflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > ksram AT > kflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > ksram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,119 @@
/****************************************************************************
* configs/nucleo-l496zg/scripts/l496zg-flash.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Sebastien Lorquet <sebastien@lorquet.fr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32L496ZG has 1024Kb of FLASH beginning at address 0x0800:0000 and
* 256Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH,
* FLASH memory is aliased to address 0x0000:0000 where the code expects to
* begin execution by jumping to the entry point in the 0x0800:0000 address
* range.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
}
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
/* The STM32L496ZG has 256Kb of SRAM beginning at the following address */
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
+129
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@@ -0,0 +1,129 @@
/****************************************************************************
* configs/nucleo-144/scripts/memory.ld
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32F746NGH6 has 1024Kb of main FLASH memory. This FLASH memory can
* be accessed from either the AXIM interface at address 0x0800:0000 or from
* the ITCM interface at address 0x0020:0000.
*
* Additional information, including the option bytes, is available at at
* FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM).
*
* In the STM32F746NGH6, two different boot spaces can be selected through
* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
* BOOT_ADD1 option bytes:
*
* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
* ST programmed value: Flash on ITCM at 0x0020:0000
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000
*
* NuttX does not modify these option byes. On the unmodified STM32F746G
* DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0020:0000 in ITCM FLASH.
*
* The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM).
* SRAM is split up into three blocks:
*
* 1) 64Kb of DTCM SRM beginning at address 0x2000:0000
* 2) 240Kb of SRAM1 beginning at address 0x2001:0000
* 3) 16Kb of SRAM2 beginning at address 0x2004:c000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*
* For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of
* FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which
* should fit into 64KB and, of course, can be optimized as needed (See
* also configs/stm32f746g-disco/scripts/kernel-space.ld). Allowing the
* additional does permit addition debug instrumentation to be added to the
* kernel space without overflowing the partition.
*
* Alignment of the user space FLASH partition is also a critical factor:
* The user space FLASH partition will be spanned with a single region of
* size 2**n bytes. The alignment of the user-space region must be the same.
* As a consequence, as the user-space increases in size, the alignment
* requirement also increases.
*
* This alignment requirement means that the largest user space FLASH region
* you can have will be 512KB at it would have to be positioned at
* 0x08800000. If you change this address, don't forget to change the
* CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
* the check in kernel/userspace.c.
*
* For the same reasons, the maximum size of the SRAM mapping is limited to
* 4KB. Both of these alignment limitations could be reduced by using
* multiple regions to map the FLASH/SDRAM range or perhaps with some
* clever use of subregions.
*
* A detailed memory map for the 112KB SRAM region is as follows:
*
* 0x20001 0000: Kernel .data region. Typical size: 0.1KB
* ------- ---- Kernel .bss region. Typical size: 1.8KB
* 0x20001 0800: Kernel IDLE thread stack (approximate). Size is
* determined by CONFIG_IDLETHREAD_STACKSIZE and
* adjustments for alignment. Typical is 1KB.
* ------- ---- Padded to 4KB
* 0x20001 1000: User .data region. Size is variable.
* ------- ---- User .bss region Size is variable.
* 0x20001 2000: Beginning of kernel heap. Size determined by
* CONFIG_MM_KERNEL_HEAPSIZE.
* ------- ---- Beginning of user heap. Can vary with other settings.
* 0x20004 c000: End+1 of SRAM1
*/
MEMORY
{
/* ITCM boot address */
itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K
/* 1024KB FLASH */
kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K
/* 240KB of contiguous SRAM1 */
ksram (rwx) : ORIGIN = 0x20010000, LENGTH = 4K
usram (rwx) : ORIGIN = 0x20011000, LENGTH = 4K
xsram (rwx) : ORIGIN = 0x20012000, LENGTH = 240K - 8K
/* DTCM SRAM */
dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K
}
+111
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@@ -0,0 +1,111 @@
/****************************************************************************
* configs/nucleo-144/scripts/user-space.ld
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
SECTIONS
{
.userspace : {
*(.userspace)
} > uflash
.text : {
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > uflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > uflash
.ARM.extab : {
*(.ARM.extab*)
} > uflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > uflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > usram AT > uflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > usram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
+2
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@@ -0,0 +1,2 @@
/.depend
/Make.dep
+72
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@@ -0,0 +1,72 @@
############################################################################
# configs/nucleo-l496zg/src/Makefile
#
# Copyright (C) 2015 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
# David Sidrane <david_s5@nscdg.com>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
-include $(TOPDIR)/Make.defs
ASRCS =
CSRCS = stm32_boot.c
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += stm32_autoleds.c
else
CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
endif
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinitialize.c
endif
ifeq ($(CONFIG_SPI),y)
CSRCS += stm32_spi.c
endif
ifeq ($(CONFIG_ADC),y)
CSRCS += stm32_adc.c
endif
ifeq ($(CONFIG_MMCSD),y)
CSRCS += stm32_sdio.c
endif
ifeq ($(CONFIG_STM32L4_OTGFS),y)
CSRCS += stm32_usb.c
endif
include $(TOPDIR)/configs/Board.mk
+285
View File
@@ -0,0 +1,285 @@
/************************************************************************************
* configs/nucleo-l496zg/src/nucleo-144.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* Mark Olsson <post@markolsson.se>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIGS_NUCLEO_L496ZG_SRC_NUCLEO_144_H
#define __CONFIGS_NUCLEO_L496ZG_SRC_NUCLEO_144_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Configuration ********************************************************************/
/* procfs File System */
#ifdef CONFIG_FS_PROCFS
# ifdef CONFIG_NSH_PROC_MOUNTPOINT
# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
# else
# define STM32_PROCFS_MOUNTPOINT "/proc"
# endif
#endif
/* Nucleo-144 GPIO Pin Definitions **************************************************/
/* LED
*
* The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED, LD2 a
* Blue LED and LD3 a Red LED, that can be controlled by software. The following definitions assume
* the default Solder Bridges are installed.
*/
#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
GPIO_PORTC | GPIO_PIN7)
#define GPIO_LD2 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
GPIO_PORTB | GPIO_PIN7)
#define GPIO_LD3 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
GPIO_PORTB | GPIO_PIN14)
#define GPIO_LED_GREEN GPIO_LD1
#define GPIO_LED_BLUE GPIO_LD2
#define GPIO_LED_RED GPIO_LD3
#define LED_DRIVER_PATH "/dev/userleds"
/* BUTTONS
*
* The Blue pushbutton B1, labeled "User", is connected to GPIO PC13. A high value
* will be sensed when the button is depressed.
* Note:
* 1) That the EXTI is included in the definition to enable an interrupt on this
* IO.
* 2) The following definitions assume the default Solder Bridges are installed.
*/
#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13)
/* SPI ***************************************************************************/
#define GPIO_SPI_CS (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_SET)
#define GPIO_SPI1_CS0 (GPIO_SPI_CS | GPIO_PORTD | GPIO_PIN14)
#define GPIO_SPI1_CS1 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN15)
#define GPIO_SPI1_CS2 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN14)
#define GPIO_SPI1_CS3 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN2)
#define GPIO_SPI2_CS0 (GPIO_SPI_CS | GPIO_PORTD | GPIO_PIN7)
#define GPIO_SPI2_CS1 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN1)
#define GPIO_SPI2_CS2 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN2)
#define GPIO_SPI2_CS3 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN3)
#define GPIO_SPI3_CS0 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN4)
#define GPIO_SPI3_CS1 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN5)
#define GPIO_SPI3_CS2 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN6)
#define GPIO_SPI3_CS3 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN7)
/* Logical SPI Chip Selects used to index */
#define NUCLEO_SPI_BUS1_CS0 0
#define NUCLEO_SPI_BUS1_CS1 1
#define NUCLEO_SPI_BUS1_CS2 2
#define NUCLEO_SPI_BUS1_CS3 3
#define NUCLEO_SPI_BUS2_CS0 4
#define NUCLEO_SPI_BUS2_CS1 5
#define NUCLEO_SPI_BUS2_CS2 6
#define NUCLEO_SPI_BUS2_CS3 7
#define NUCLEO_SPI_BUS3_CS0 8
#define NUCLEO_SPI_BUS3_CS1 9
#define NUCLEO_SPI_BUS3_CS2 10
#define NUCLEO_SPI_BUS3_CS3 11
#if defined(CONFIG_STM32L4_SDMMC1) || defined(CONFIG_STM32L4_SDMMC2)
# define HAVE_SDIO
#endif
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_MMCSD_SDIO)
# undef HAVE_SDIO
#endif
#define SDIO_SLOTNO 0 /* Only one slot */
#ifdef HAVE_SDIO
# if defined(CONFIG_STM32L4_SDMMC1)
# define GPIO_SDMMC1_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI | GPIO_PORTC | GPIO_PIN6)
# endif
# if defined(CONFIG_NSH_MMCSDSLOTNO) && (CONFIG_NSH_MMCSDSLOTNO != 0)
# warning "Only one MMC/SD slot, slot 0"
# define CONFIG_NSH_MMCSDSLOTNO SDIO_SLOTNO
# endif
# if defined(CONFIG_NSH_MMCSDMINOR)
# define SDIO_MINOR CONFIG_NSH_MMCSDMINOR
# else
# define SDIO_MINOR 0
# endif
/* SD card bringup does not work if performed on the IDLE thread because it
* will cause waiting. Use either:
*
* CONFIG_LIB_BOARDCTL=y, OR
* CONFIG_BOARD_INITIALIZE=y && CONFIG_BOARD_INITTHREAD=y
*/
# if defined(CONFIG_BOARD_INITIALIZE) && !defined(CONFIG_LIB_BOARDCTL) && \
!defined(CONFIG_BOARD_INITTHREAD)
# warning SDIO initialization cannot be perfomed on the IDLE thread
# undef HAVE_SDIO
# endif
#endif
/* USB OTG FS
*
* PA9 OTG_FS_VBUS VBUS sensing (also connected to the green LED)
* PG6 OTG_FS_PowerSwitchOn
* PG5 OTG_FS_Overcurrent
*/
#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)
#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN6)
#ifdef CONFIG_USBHOST
# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|\
GPIO_SPEED_100MHz|GPIO_PUSHPULL|\
GPIO_PORTG|GPIO_PIN5)
#else
# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN5)
#endif
/************************************************************************************
* Public data
************************************************************************************/
#ifndef __ASSEMBLY__
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the Nucleo-144 board.
*
************************************************************************************/
#if defined(CONFIG_SPI)
void stm32_spidev_initialize(void);
#endif
/************************************************************************************
* Name: stm32_spidev_bus_test
*
* Description:
* Called to create the defined SPI buses and test them by initializing them
* and sending the NUCLEO_SPI_TEST (no chip select).
*
************************************************************************************/
#if defined(CONFIG_NUCLEO_SPI_TEST)
int stm32_spidev_bus_test(void);
#endif
/************************************************************************************
* Name: stm32_dma_alloc_init
*
* Description:
* Called to create a FAT DMA allocator
*
* Returned Value:
* 0 on success or -ENOMEM
*
************************************************************************************/
void stm32_dma_alloc_init(void);
#if defined (CONFIG_FAT_DMAMEMORY)
int stm32_dma_alloc_init(void);
#endif
/****************************************************************************
* Name: stm32_sdio_initialize
*
* Description:
* Called at application startup time to initialize the SCMMC functionality.
*
****************************************************************************/
#ifdef CONFIG_MMCSD
int stm32_sdio_initialize(void);
#endif
/************************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in inialization to setup USB-related
* GPIO pins for the nucleo-144 board.
*
************************************************************************************/
#ifdef CONFIG_STM32L4_OTGFS
void stm32_usbinitialize(void);
#endif
/************************************************************************************
* Name: stm32_adc_setup
*
* Description:
* Initialize ADC and register the ADC driver.
*
************************************************************************************/
#ifdef CONFIG_ADC
int stm32_adc_setup(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_NUCLEO_L496ZG_SRC_NUCLEO_144_H */
+174
View File
@@ -0,0 +1,174 @@
/************************************************************************************
* configs/nucleo-144/src/stm32_adc.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/analog/adc.h>
#include <arch/board/board.h>
#include "chip.h"
#include "stm32l4_gpio.h"
#include "stm32l4_adc.h"
#include "nucleo-144.h"
#ifdef CONFIG_ADC
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Configuration ********************************************************************/
/* Up to 3 ADC interfaces are supported */
#if STM32L4_NADC < 3
# undef CONFIG_STM32L4_ADC3
#endif
#if STM32L4_NADC < 2
# undef CONFIG_STM32L4_ADC2
#endif
#if STM32L4_NADC < 1
# undef CONFIG_STM32L4_ADC1
#endif
#if defined(CONFIG_STM32L4_ADC1) || defined(CONFIG_STM32L4_ADC2) || defined(CONFIG_STM32L4_ADC3)
#ifndef CONFIG_STM32L4_ADC1
# warning "Channel information only available for ADC1"
#endif
/* The number of ADC channels in the conversion list */
#define ADC1_NCHANNELS 1
/************************************************************************************
* Private Data
************************************************************************************/
/* Identifying number of each ADC channel: Variable Resistor.
*
* {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15};
*/
#ifdef CONFIG_STM32L4_ADC1
static const uint8_t g_chanlist[ADC1_NCHANNELS] = {3};
/* Configurations of pins used byte each ADC channels
*
* {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN5,
* GPIO_ADC1_IN6, GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9, GPIO_ADC1_IN10,
* GPIO_ADC1_IN11, GPIO_ADC1_IN12, GPIO_ADC1_IN13, GPIO_ADC1_IN15};
*/
static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN3};
#endif
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_adc_setup
*
* Description:
* Initialize ADC and register the ADC driver.
*
************************************************************************************/
int stm32_adc_setup(void)
{
#ifdef CONFIG_STM32L4_ADC1
static bool initialized = false;
struct adc_dev_s *adc;
int ret;
int i;
/* Check if we have already initialized */
if (!initialized)
{
/* Configure the pins as analog inputs for the selected channels */
for (i = 0; i < ADC1_NCHANNELS; i++)
{
if (g_pinlist[i] != 0)
{
stm32l4_configgpio(g_pinlist[i]);
}
}
/* Call stm32_adcinitialize() to get an instance of the ADC interface */
adc = stm32l4_adc_initialize(1, g_chanlist, ADC1_NCHANNELS);
if (adc == NULL)
{
aerr("ERROR: Failed to get ADC interface\n");
return -ENODEV;
}
/* Register the ADC driver at "/dev/adc0" */
ret = adc_register("/dev/adc0", adc);
if (ret < 0)
{
aerr("ERROR: adc_register failed: %d\n", ret);
return ret;
}
/* Now we are initialized */
initialized = true;
}
return OK;
#else
return -ENOSYS;
#endif
}
#endif /* CONFIG_STM32L4_ADC1 || CONFIG_STM32L4_ADC2 || CONFIG_STM32L4_ADC3 */
#endif /* CONFIG_ADC */
@@ -0,0 +1,200 @@
/****************************************************************************
* config/nucleo-144/src/stm32_appinitialize.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* Mark Olsson <post@markolsson.se>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sys/mount.h>
#include <debug.h>
#include <syslog.h>
#include "nucleo-144.h"
#include <nuttx/leds/userled.h>
#include "stm32l4_i2c.h"
/****************************************************************************
* Private Data
***************************************************************************/
#if defined(CONFIG_STM32L4_I2C1)
struct i2c_master_s* i2c1;
#endif
#if defined(CONFIG_STM32L4_I2C2)
struct i2c_master_s* i2c2;
#endif
#if defined(CONFIG_STM32L4_I2C3)
struct i2c_master_s* i2c3;
#endif
#if defined(CONFIG_STM32L4_I2C4)
struct i2c_master_s* i2c4;
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initalization logic and the the
* matching application logic. The value cold be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
int ret;
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n",
STM32_PROCFS_MOUNTPOINT, ret);
}
#endif
#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER)
/* Register the LED driver */
ret = userled_lower_initialize(LED_DRIVER_PATH);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_ADC
/* Initialize ADC and register the ADC driver. */
ret = stm32_adc_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
}
#endif
#if defined(CONFIG_FAT_DMAMEMORY)
if (stm32_dma_alloc_init() < 0)
{
syslog(LOG_ERR, "DMA alloc FAILED");
}
#endif
#if defined(CONFIG_NUCLEO_SPI_TEST)
/* Create SPI interfaces */
ret = stm32_spidev_bus_test();
if (ret != OK)
{
syslog(LOG_ERR, "ERROR: Failed to initialize SPI interfaces: %d\n", ret);
return ret;
}
#endif
#if defined(CONFIG_MMCSD)
/* Configure SDIO */
/* Initialize the SDIO block driver */
ret = stm32l4_sdio_initialize();
if (ret != OK)
{
ferr("ERROR: Failed to initialize MMC/SD driver: %d\n", ret);
return ret;
}
#endif
#if defined(CONFIG_I2C)
/* Configure I2C */
/* REVISIT: this is ugly! */
#if defined(CONFIG_STM32L4_I2C1)
i2c1 = stm32l4_i2cbus_initialize(1);
#endif
#if defined(CONFIG_STM32L4_I2C2)
i2c2 = stm32l4_i2cbus_initialize(2);
#endif
#if defined(CONFIG_STM32L4_I2C3)
i2c3 = stm32l4_i2cbus_initialize(3);
#endif
#if defined(CONFIG_STM32L4_I2C4)
i2c4 = stm32l4_i2cbus_initialize(4);
#endif
#ifdef CONFIG_I2C_DRIVER
#if defined(CONFIG_STM32L4_I2C1)
i2c_register(i2c1, 1);
#endif
#if defined(CONFIG_STM32L4_I2C2)
i2c_register(i2c2, 2);
#endif
#if defined(CONFIG_STM32L4_I2C3)
i2c_register(i2c3, 3);
#endif
#if defined(CONFIG_STM32L4_I2C4)
i2c_register(i2c4, 4);
#endif
#endif
#endif /* CONFIG_I2C */
UNUSED(ret);
return OK;
}
+188
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@@ -0,0 +1,188 @@
/****************************************************************************
* configs/nucleo-144/src/stm32_autoleds.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "stm32l4_gpio.h"
#include "nucleo-144.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0]))
/****************************************************************************
* Private Data
****************************************************************************/
/* Indexed by BOARD_LED_<color> */
static const uint32_t g_ledmap[BOARD_NLEDS] =
{
GPIO_LED_GREEN,
GPIO_LED_BLUE,
GPIO_LED_RED,
};
static bool g_initialized;
/****************************************************************************
* Private Functions
****************************************************************************/
static void phy_set_led(int led, bool state)
{
/* Active High */
stm32l4_gpiowrite(g_ledmap[led], state);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
int i;
/* Configure the LD1 GPIO for output. Initial state is OFF */
for (i = 0; i < ARRAYSIZE(g_ledmap); i++)
{
stm32l4_configgpio(g_ledmap[i]);
}
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
switch (led)
{
default:
break;
case LED_HEAPALLOCATE:
phy_set_led(BOARD_LED_BLUE, true);
break;
case LED_IRQSENABLED:
phy_set_led(BOARD_LED_BLUE, false);
phy_set_led(BOARD_LED_GREEN, true);
break;
case LED_STACKCREATED:
phy_set_led(BOARD_LED_GREEN, true);
phy_set_led(BOARD_LED_BLUE, true);
g_initialized = true;
break;
case LED_INIRQ:
phy_set_led(BOARD_LED_BLUE, true);
break;
case LED_SIGNAL:
phy_set_led(BOARD_LED_GREEN, true);
break;
case LED_ASSERTION:
phy_set_led(BOARD_LED_RED, true);
phy_set_led(BOARD_LED_BLUE, true);
break;
case LED_PANIC:
phy_set_led(BOARD_LED_RED, true);
break;
case LED_IDLE : /* IDLE */
phy_set_led(BOARD_LED_RED, true);
break;
}
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
switch (led)
{
default:
break;
case LED_SIGNAL:
phy_set_led(BOARD_LED_GREEN, false);
break;
case LED_INIRQ:
phy_set_led(BOARD_LED_BLUE, false);
break;
case LED_ASSERTION:
phy_set_led(BOARD_LED_RED, false);
phy_set_led(BOARD_LED_BLUE, false);
break;
case LED_PANIC:
phy_set_led(BOARD_LED_RED, false);
break;
case LED_IDLE : /* IDLE */
phy_set_led(BOARD_LED_RED, false);
break;
}
}
#endif /* CONFIG_ARCH_LEDS */
+109
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@@ -0,0 +1,109 @@
/************************************************************************************
* configs/nucleo-144/src/stm32_boot.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "nucleo-144.h"
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32l4_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void stm32l4_boardinitialize(void)
{
#ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */
board_autoled_initialize();
#endif
#if defined(CONFIG_STM32L4_OTGFS) || defined(CONFIG_STM32L4_HOST)
stm32_usbinitialize();
#endif
#if defined(CONFIG_SPI)
/* Configure SPI chip selects */
stm32_spidev_initialize();
#endif
}
/************************************************************************************
* Name: board_initialize
*
* Description:
* If CONFIG_BOARD_INITIALIZE is selected, then an additional initialization call
* will be performed in the boot-up sequence to a function called
* board_initialize(). board_initialize() will be called immediately after
* up_initialize() is called and just before the initial application is started.
* This additional initialization phase may be used, for example, to initialize
* board-specific device drivers.
*
************************************************************************************/
#ifdef CONFIG_BOARD_INITIALIZE
void board_initialize(void)
{
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
/* Perform NSH initialization here instead of from the NSH. This
* alternative NSH initialization is necessary when NSH is ran in user-space
* but the initialization function must run in kernel space.
*/
(void)board_app_initialize(0);
#endif
}
#endif
+120
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@@ -0,0 +1,120 @@
/****************************************************************************
* configs/nucleo-144/src/stm32_buttons.c
*
* Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stddef.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "stm32l4_gpio.h"
#include "nucleo-144.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
void board_button_initialize(void)
{
stm32l4_configgpio(GPIO_BTN_USER);
}
/****************************************************************************
* Name: board_buttons
****************************************************************************/
uint32_t board_buttons(void)
{
return stm32l4_gpioread(GPIO_BTN_USER) ? 1 : 0;
}
/************************************************************************************
* Button support.
*
* Description:
* board_button_initialize() must be called to initialize button resources. After
* that, board_buttons() may be called to collect the current state of all
* buttons or board_button_irq() may be called to register button interrupt
* handlers.
*
* After board_button_initialize() has been called, board_buttons() may be called to
* collect the state of all buttons. board_buttons() returns an 32-bit bit set
* with each bit associated with a button. See the BUTTON_*_BIT
* definitions in board.h for the meaning of each bit.
*
* board_button_irq() may be called to register an interrupt handler that will
* be called when a button is depressed or released. The ID value is a
* button enumeration value that uniquely identifies a button resource. See the
* BUTTON_* definitions in board.h for the meaning of enumeration
* value.
*
************************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
{
int ret = -EINVAL;
if (id == BUTTON_USER)
{
ret = stm32l4_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler, arg);
}
return ret;
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */
+117
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@@ -0,0 +1,117 @@
/****************************************************************************
* configs/nucleo-144/stc/stm32_dma_alloc.c
*
* Copyright (C) 2016 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <syslog.h>
#include <stdint.h>
#include <errno.h>
#include <nuttx/mm/gran.h>
#include "nucleo-144.h"
#if defined(CONFIG_FAT_DMAMEMORY)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#if !defined(CONFIG_GRAN)
# error microSD DMA support requires CONFIG_GRAN
#endif
#define BOARD_DMA_ALLOC_POOL_SIZE (8*512)
/************************************************************************************
* Private Data
************************************************************************************/
static GRAN_HANDLE dma_allocator;
/* The DMA heap size constrains the total number of things that can be
* ready to do DMA at a time.
*
* For example, FAT DMA depends on one sector-sized buffer per filesystem plus
* one sector-sized buffer per file.
*
* We use a fundamental alignment / granule size of 64B; this is sufficient
* to guarantee alignment for the largest STM32 DMA burst (16 beats x 32bits).
*/
static uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] __attribute__((aligned(64)));
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_dma_alloc_init
*
* Description:
* All boards may optionally provide this API to instantiate a pool of
* memory for uses with FAST FS DMA operations.
*
************************************************************************************/
int stm32_dma_alloc_init(void)
{
dma_allocator = gran_initialize(g_dma_heap,
sizeof(g_dma_heap),
7, /* 128B granule - must be > alignment (XXX bug?) */
6); /* 64B alignment */
if (dma_allocator == NULL)
{
return -ENOMEM;
}
return OK;
}
/* DMA-aware allocator stubs for the FAT filesystem. */
void *fat_dma_alloc(size_t size)
{
return gran_alloc(dma_allocator, size);
}
void fat_dma_free(FAR void *memory, size_t size)
{
gran_free(dma_allocator, memory, size);
}
#endif /* CONFIG_FAT_DMAMEMORY */
+180
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/****************************************************************************
* config/nucleo-144/src/stm32_sdio.c
*
* Copyright (C) 2014, 2016-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include "chip.h"
#include "nucleo-144.h"
#include "stm32l4_gpio.h"
#include "stm32l4_sdmmc.h"
#ifdef CONFIG_MMCSD
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Card detections requires card support and a card detection GPIO */
#define HAVE_NCD 1
#if !defined(GPIO_SDMMC1_NCD)
# undef HAVE_NCD
#endif
/****************************************************************************
* Private Data
****************************************************************************/
static FAR struct sdio_dev_s *g_sdio_dev;
#ifdef HAVE_NCD
static bool g_sd_inserted = 0xff; /* Impossible value */
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_ncd_interrupt
*
* Description:
* Card detect interrupt handler.
*
****************************************************************************/
#ifdef HAVE_NCD
static int stm32_ncd_interrupt(int irq, FAR void *context)
{
bool present;
present = !stm32_gpioread(GPIO_SDMMC1_NCD);
if (g_sdio_dev && present != g_sd_inserted)
{
sdio_mediachange(g_sdio_dev, present);
g_sd_inserted = present;
}
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_sdio_initialize
*
* Description:
* Initialize SDIO-based MMC/SD card support
*
****************************************************************************/
int stm32_sdio_initialize(void)
{
int ret;
#ifdef HAVE_NCD
/* Card detect */
bool cd_status;
/* Configure the card detect GPIO */
stm32_configgpio(GPIO_SDMMC1_NCD);
/* Register an interrupt handler for the card detect pin */
(void)stm32_gpiosetevent(GPIO_SDMMC1_NCD, true, true, true,
stm32_ncd_interrupt, NULL);
#endif
/* Mount the SDIO-based MMC/SD block driver */
/* First, get an instance of the SDIO interface */
finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);
g_sdio_dev = sdio_initialize(SDIO_SLOTNO);
if (!g_sdio_dev)
{
ferr("ERROR: Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
return -ENODEV;
}
/* Now bind the SDIO interface to the MMC/SD driver */
finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev);
if (ret != OK)
{
ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
return ret;
}
finfo("Successfully bound SDIO to the MMC/SD driver\n");
#ifdef HAVE_NCD
/* Use SD card detect pin to check if a card is g_sd_inserted */
cd_status = !stm32_gpioread(GPIO_SDMMC1_NCD);
finfo("Card detect : %d\n", cd_status);
sdio_mediachange(g_sdio_dev, cd_status);
#else
/* Assume that the SD card is inserted. What choice do we have? */
sdio_mediachange(g_sdio_dev, true);
#endif
return OK;
}
#endif /* HAVE_SDIO */
+362
View File
@@ -0,0 +1,362 @@
/************************************************************************************
* configs/nucleo-144/src/stm32_spi.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "chip.h"
#include "stm32l4_gpio.h"
#include "stm32l4_spi.h"
#include "nucleo-144.h"
#if defined(CONFIG_SPI)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0]))
#if defined(CONFIG_NUCLEO_SPI1_TEST)
# if defined(CONFIG_NUCLEO_SPI1_TEST_MODE0)
# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE0
# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE1)
# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE1
# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE2)
# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE2
# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE3)
# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE3
# else
# error "No CONFIG_NUCLEO_SPI1_TEST_MODEx defined"
# endif
#endif
#if defined(CONFIG_NUCLEO_SPI2_TEST)
# if defined(CONFIG_NUCLEO_SPI2_TEST_MODE0)
# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE0
# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE1)
# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE1
# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE2)
# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE2
# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE3)
# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE3
# else
# error "No CONFIG_NUCLEO_SPI2_TEST_MODEx defined"
# endif
#endif
#if defined(CONFIG_NUCLEO_SPI3_TEST)
# if defined(CONFIG_NUCLEO_SPI3_TEST_MODE0)
# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE0
# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE1)
# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE1
# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE2)
# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE2
# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE3)
# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE3
# else
# error "No CONFIG_NUCLEO_SPI3_TEST_MODEx defined"
# endif
#endif
/************************************************************************************
* Private Data
************************************************************************************/
/* Indexed by NUCLEO_SPI_BUSx_CSx */
static const uint32_t g_spigpio[] =
{
#if defined(GPIO_SPI1_CS0)
GPIO_SPI1_CS0,
#endif
#if defined(GPIO_SPI1_CS1)
GPIO_SPI1_CS1,
#endif
#if defined(GPIO_SPI1_CS2)
GPIO_SPI1_CS2,
#endif
#if defined(GPIO_SPI1_CS3)
GPIO_SPI1_CS3,
#endif
#if defined(GPIO_SPI2_CS0)
GPIO_SPI2_CS0,
#endif
#if defined(GPIO_SPI2_CS1)
GPIO_SPI2_CS1,
#endif
#if defined(GPIO_SPI2_CS2)
GPIO_SPI2_CS2,
#endif
#if defined(GPIO_SPI2_CS3)
GPIO_SPI2_CS3,
#endif
#if defined(GPIO_SPI3_CS0)
GPIO_SPI3_CS0,
#endif
#if defined(GPIO_SPI3_CS1)
GPIO_SPI3_CS1,
#endif
#if defined(GPIO_SPI3_CS2)
GPIO_SPI3_CS2,
#endif
#if defined(GPIO_SPI3_CS3)
GPIO_SPI3_CS3,
#endif
};
#if defined(CONFIG_NUCLEO_SPI_TEST)
# if defined(CONFIG_STM32L4_SPI1)
struct spi_dev_s *spi1;
# endif
# if defined(CONFIG_STM32L4_SPI2)
struct spi_dev_s *spi2;
# endif
# if defined(CONFIG_STM32L4_SPI3)
struct spi_dev_s *spi3;
# endif
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the Nucleo-144 board.
*
************************************************************************************/
void weak_function stm32_spidev_initialize(void)
{
int i;
/* Configure SPI CS GPIO for output */
for (i = 0; i < ARRAYSIZE(g_spigpio); i++)
{
stm32l4_configgpio(g_spigpio[i]);
}
}
/****************************************************************************
* Name: stm32_spi1/2/3/4/5select and stm32_spi1/2/3/4/5status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
* are provided by common STM32 logic. To use this common SPI logic on your
* board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32L4_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
stm32l4_gpiowrite(g_spigpio[devid], !selected);
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32L4_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
stm32l4_gpiowrite(g_spigpio[devid], !selected);
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32L4_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
stm32l4_gpiowrite(g_spigpio[devid], !selected);
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
/****************************************************************************
* Name: stm32_spi1cmddata
*
* Description:
* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
* or command (false). This function must be provided by platform-specific
* logic. This is an implementation of the cmddata method of the SPI
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
*
* Input Parameters:
*
* spi - SPI device that controls the bus the device that requires the CMD/
* DATA selection.
* devid - If there are multiple devices on the bus, this selects which one
* to select cmd or data. NOTE: This design restricts, for example,
* one one SPI display per SPI bus.
* cmd - true: select command; false: select data
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32L4_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32L4_SPI2
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32L4_SPI3
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#endif /* CONFIG_SPI_CMDDATA */
#if defined(CONFIG_NUCLEO_SPI_TEST)
int stm32_spidev_bus_test(void)
{
/* Configure and test SPI-*/
uint8_t *tx = (uint8_t *)CONFIG_NUCLEO_SPI_TEST_MESSAGE;
#if defined(CONFIG_NUCLEO_SPI1_TEST)
spi1 = stm32l3_spibus_initialize(1);
if (!spi1)
{
syslog(LOG_ERR, "ERROR Failed to initialize SPI port 1\n");
return -ENODEV;
}
/* Default SPI1 to NUCLEO_SPI1_FREQ and mode */
SPI_SETFREQUENCY(spi1, CONFIG_NUCLEO_SPI1_TEST_FREQ);
SPI_SETBITS(spi1, CONFIG_NUCLEO_SPI1_TEST_BITS);
SPI_SETMODE(spi1, CONFIG_NUCLEO_SPI1_TEST_MODE);
SPI_EXCHANGE(spi1, tx, NULL, ARRAYSIZE(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
#endif
#if defined(CONFIG_NUCLEO_SPI2_TEST)
spi2 = stm32l4_spibus_initialize(2);
if (!spi2)
{
syslog(LOG_ERR, "ERROR Failed to initialize SPI port 2\n");
return -ENODEV;
}
/* Default SPI2 to NUCLEO_SPI2_FREQ and mode */
SPI_SETFREQUENCY(spi2, CONFIG_NUCLEO_SPI2_TEST_FREQ);
SPI_SETBITS(spi2, CONFIG_NUCLEO_SPI2_TEST_BITS);
SPI_SETMODE(spi2, CONFIG_NUCLEO_SPI2_TEST_MODE);
SPI_EXCHANGE(spi2, tx, NULL, ARRAYSIZE(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
#endif
#if defined(CONFIG_NUCLEO_SPI3_TEST)
spi3 = stm32l4_spibus_initialize(3);
if (!spi3)
{
syslog(LOG_ERR, "ERROR Failed to initialize SPI port 2\n");
return -ENODEV;
}
/* Default SPI3 to NUCLEO_SPI3_FREQ and mode */
SPI_SETFREQUENCY(spi3, CONFIG_NUCLEO_SPI3_TEST_FREQ);
SPI_SETBITS(spi3, CONFIG_NUCLEO_SPI3_TEST_BITS);
SPI_SETMODE(spi3, CONFIG_NUCLEO_SPI3_TEST_MODE);
SPI_EXCHANGE(spi3, tx, NULL, ARRAYSIZE(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
#endif
return OK;
}
#endif /* NUCLEO_SPI_TEST */
#endif /* defined(CONFIG_SPI) */
+331
View File
@@ -0,0 +1,331 @@
/************************************************************************************
* configs//nucleo-144/src/stm32_usb.c
*
* Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <sched.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbdev_trace.h>
#include "up_arch.h"
#include "chip.h"
#include "stm32l4_gpio.h"
#include "stm32l4_otgfs.h"
#include "nucleo-144.h"
#ifdef CONFIG_STM32L4_OTGFS
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
# define HAVE_USB 1
#else
# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
# undef HAVE_USB
#endif
#ifndef CONFIG_NUCLEO144_USBHOST_PRIO
# define CONFIG_NUCLEO144_USBHOST_PRIO 100
#endif
#ifndef CONFIG_NUCLEO_USBHOST_STACKSIZE
# define CONFIG_NUCLEO_USBHOST_STACKSIZE 1024
#endif
/************************************************************************************
* Private Data
************************************************************************************/
#ifdef CONFIG_USBHOST
static struct usbhost_connection_s *g_usbconn;
#endif
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Name: usbhost_waiter
*
* Description:
* Wait for USB devices to be connected.
*
************************************************************************************/
#ifdef CONFIG_USBHOST
static int usbhost_waiter(int argc, char *argv[])
{
struct usbhost_hubport_s *hport;
uinfo("Running\n");
for (;;)
{
/* Wait for the device to change state */
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
uinfo("%s\n", hport->connected ? "connected" : "disconnected");
/* Did we just become connected? */
if (hport->connected)
{
/* Yes.. enumerate the newly connected device */
(void)CONN_ENUMERATE(g_usbconn, hport);
}
}
/* Keep the compiler from complaining */
return 0;
}
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in inialization to setup USB-related
* GPIO pins for the nucleo-144 board.
*
************************************************************************************/
void stm32_usbinitialize(void)
{
/* The OTG FS has an internal soft pull-up. No GPIO configuration is required */
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32L4_OTGFS
stm32l4_configgpio(GPIO_OTGFS_VBUS);
stm32l4_configgpio(GPIO_OTGFS_PWRON);
stm32l4_configgpio(GPIO_OTGFS_OVER);
#endif
}
/***********************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host functionality.
* This function will start a thread that will monitor for device
* connection/disconnection events.
*
***********************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_usbhost_initialize(void)
{
int pid;
#if defined(CONFIG_USBHOST_HUB) || defined(CONFIG_USBHOST_MSC) || \
defined(CONFIG_USBHOST_HIDKBD) || defined(CONFIG_USBHOST_HIDMOUSE)
int ret;
#endif
/* First, register all of the class drivers needed to support the drivers
* that we care about:
*/
uinfo("Register class drivers\n");
#ifdef CONFIG_USBHOST_HUB
/* Initialize USB hub class support */
ret = usbhost_hub_initialize();
if (ret < 0)
{
uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_MSC
/* Register the USB mass storage class class */
ret = usbhost_msc_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_CDCACM
/* Register the CDC/ACM serial class */
ret = usbhost_cdcacm_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_HIDKBD
/* Initialize the HID keyboard class */
ret = usbhost_kbdinit();
if (ret != OK)
{
uerr("ERROR: Failed to register the HID keyboard class\n");
}
#endif
#ifdef CONFIG_USBHOST_HIDMOUSE
/* Initialize the HID mouse class */
ret = usbhost_mouse_init();
if (ret != OK)
{
uerr("ERROR: Failed to register the HID mouse class\n");
}
#endif
/* Then get an instance of the USB host interface */
uinfo("Initialize USB host\n");
g_usbconn = stm32l4_otgfshost_initialize(0);
if (g_usbconn)
{
/* Start a thread to handle device connection. */
uinfo("Start usbhost_waiter\n");
pid = task_create("usbhost", CONFIG_STM32F4DISCO_USBHOST_PRIO,
CONFIG_STM32F4DISCO_USBHOST_STACKSIZE,
(main_t)usbhost_waiter, (FAR char * const *)NULL);
return pid < 0 ? -ENOEXEC : OK;
}
return -ENODEV;
}
#endif
/***********************************************************************************
* Name: stm32_usbhost_vbusdrive
*
* Description:
* Enable/disable driving of VBUS 5V output. This function must be provided be
* each platform that implements the STM32 OTG FS host interface
*
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
* or, if 5 V are available on the application board, a basic power switch, must
* be added externally to drive the 5 V VBUS line. The external charge pump can
* be driven by any GPIO output. When the application decides to power on VBUS
* using the chosen GPIO, it must also set the port power bit in the host port
* control and status register (PPWR bit in OTG_FS_HPRT).
*
* "The application uses this field to control power to this port, and the core
* clears this bit on an overcurrent condition."
*
* Input Parameters:
* iface - For future growth to handle multiple USB host interface. Should be zero.
* enable - true: enable VBUS power; false: disable VBUS power
*
* Returned Value:
* None
*
***********************************************************************************/
#ifdef CONFIG_USBHOST
void stm32_usbhost_vbusdrive(int iface, bool enable)
{
DEBUGASSERT(iface == 0);
/* Set the Power Switch by driving the active low enable pin */
stm32l4_gpiowrite(GPIO_OTGFS_PWRON, !enable);
}
#endif
/************************************************************************************
* Name: stm32_setup_overcurrent
*
* Description:
* Setup to receive an interrupt-level callback if an overcurrent condition is
* detected.
*
* Input Parameter:
* handler - New overcurrent interrupt handler
* arg - The argument provided for the interrupt handler
*
* Returned value:
* Zero (OK) is returned on success. Otherwise, a negated errno value is returned
* to indicate the nature of the failure.
*
************************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_setup_overcurrent(xcpt_t handler, void *arg)
{
return stm32l4_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
}
#endif
/************************************************************************************
* Name: stm32_usbsuspend
*
* Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
* used. This function is called whenever the USB enters or leaves suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power, etc.
* while the USB is suspended.
*
************************************************************************************/
#ifdef CONFIG_USBDEV
void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{
uinfo("resume: %d\n", resume);
}
#endif
#endif /* CONFIG_STM32_OTGFS */
+144
View File
@@ -0,0 +1,144 @@
/****************************************************************************
* configs/nucleo-144/src/stm32_userleds.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* Mark Olsson <post@markolsson.se>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "stm32l4_gpio.h"
#include "nucleo-144.h"
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0]))
/****************************************************************************
* Private Data
****************************************************************************/
/* This array maps an LED number to GPIO pin configuration and is indexed by
* BOARD_LED_<color>
*/
static const uint32_t g_ledcfg[BOARD_NLEDS] =
{
GPIO_LED_GREEN,
GPIO_LED_BLUE,
GPIO_LED_RED,
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
*
* Description:
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the
* board_userled_initialize() is available to initialize the LED from user
* application logic.
*
****************************************************************************/
void board_userled_initialize(void)
{
int i;
/* Configure LED1-3 GPIOs for output */
for (i = 0; i < ARRAYSIZE(g_ledcfg); i++)
{
stm32l4_configgpio(g_ledcfg[i]);
}
}
/****************************************************************************
* Name: board_userled
*
* Description:
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is
* available to control the LED from user application logic.
*
****************************************************************************/
void board_userled(int led, bool ledon)
{
if ((unsigned)led < ARRAYSIZE(g_ledcfg))
{
stm32l4_gpiowrite(g_ledcfg[led], ledon);
}
}
/****************************************************************************
* Name: board_userled_all
*
* Description:
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() is
* available to control the LED from user application logic. NOTE: since
* there is only a single LED on-board, this is function is not very useful.
*
****************************************************************************/
void board_userled_all(uint8_t ledset)
{
int i;
/* Configure LED1-3 GPIOs for output */
for (i = 0; i < ARRAYSIZE(g_ledcfg); i++)
{
stm32l4_gpiowrite(g_ledcfg[i], (ledset & (1 << i)) != 0);
}
}
#endif /* !CONFIG_ARCH_LEDS */