mirror of
https://github.com/apache/nuttx.git
synced 2026-05-22 22:20:01 +08:00
Changes to Kconfig and matching defconfig files
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5085 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
@@ -16,7 +16,7 @@ config NUTTX_NEWCONFIG
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bool
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default y
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menu "General Setup"
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menu "Build Setup"
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config EXPERIMENTAL
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bool "Prompt for development and/or incomplete code/drivers"
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@@ -258,7 +258,7 @@ menu "Board Selection"
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source "configs/Kconfig"
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endmenu
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menu "Kernel Features"
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menu "RTOS Features"
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source sched/Kconfig
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endmenu
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+19
-19
@@ -1591,52 +1591,52 @@ endmenu
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menu "UART4 Configuration"
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depends on STM32_UART4
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config USART4_SERIAL_CONSOLE
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config UART4_SERIAL_CONSOLE
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bool "UART4 serial console"
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default y if !STM32_USART1 && !STM32_USART2 && !STM32_USART3
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---help---
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Selects the UART4 for the console and ttys0 (default is the USART1).
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config USART4_RXBUFSIZE
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config UART4_RXBUFSIZE
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int "UART4 Rx buffer size"
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default 256
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---help---
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Characters are buffered as received. This specific the size of the receive
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buffer.
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config USART4_TXBUFSIZE
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config UART4_TXBUFSIZE
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int "UART4 Tx buffer size"
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default 256
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---help---
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Characters are buffered before being sent. This specific the size of the
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transmit buffer
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config USART4_BAUD
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config UART4_BAUD
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int "UART4 BAUD"
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default 11520
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---help---
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The configured BAUD of the UART
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config USART4_BITS
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config UART4_BITS
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int "UART4 number of bits"
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default 8
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---help---
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The number of bits. Must be either 7 or 8.
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config USART4_PARITY
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config UART4_PARITY
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int "UART4 parity"
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default 0
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---help---
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0=no parity, 1=odd parity, 2=even parity
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config USART4_2STOP
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config UART4_2STOP
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bool "UART4 two stop bits"
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default n
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---help---
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Two stop bits
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config USART4_RXDMA
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bool "USART4 Rx DMA"
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config UART4_RXDMA
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bool "UART4 Rx DMA"
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default n
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depends on STM32_STM32F40XX && ARCH_DMA && STM32_DMA1
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---help---
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@@ -1647,52 +1647,52 @@ endmenu
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menu "UART5 Configuration"
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depends on STM32_UART5
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config USART5_SERIAL_CONSOLE
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config UART5_SERIAL_CONSOLE
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bool "UART5 serial console"
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default y if !STM32_USART1 && !STM32_USART2 && !STM32_USART3 && !STM32_UART4
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---help---
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Selects the UART5 for the console and ttys0 (default is the USART1).
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config USART5_RXBUFSIZE
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int "USART5 Rx buffer size"
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config UART5_RXBUFSIZE
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int "UART5 Rx buffer size"
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default 256
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---help---
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Characters are buffered as received. This specific the size of the receive
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buffer.
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config USART5_TXBUFSIZE
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config UART5_TXBUFSIZE
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int "UART5 Tx buffer size"
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default 256
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---help---
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Characters are buffered before being sent. This specific the size of the
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transmit buffer
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config USART5_BAUD
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config UART5_BAUD
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int "UART5 BAUD"
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default 11520
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---help---
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The configured BAUD of the UART
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config USART5_BITS
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config UART5_BITS
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int "UART5 number of bits"
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default 8
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---help---
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The number of bits. Must be either 7 or 8.
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config USART5_PARITY
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config UART5_PARITY
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int "UART5 parity"
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default 0
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---help---
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0=no parity, 1=odd parity, 2=even parity
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config USART5_2STOP
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config UART5_2STOP
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bool "UART5 two stop bits"
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default n
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---help---
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Two stop bits
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config USART5_RXDMA
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bool "USART5 Rx DMA"
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config UART5_RXDMA
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bool "UART5 Rx DMA"
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default n
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depends on STM32_STM32F40XX && ARCH_DMA && STM32_DMA1
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---help---
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@@ -85,22 +85,22 @@
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# define STM32_CONSOLE_2STOP CONFIG_USART3_2STOP
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# define STM32_CONSOLE_TX GPIO_USART3_TX
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# define STM32_CONSOLE_RX GPIO_USART3_RX
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#elif defined(CONFIG_USART4_SERIAL_CONSOLE)
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#elif defined(CONFIG_UART4_SERIAL_CONSOLE)
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# define STM32_CONSOLE_BASE STM32_UART4_BASE
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# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
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# define STM32_CONSOLE_BAUD CONFIG_USART4_BAUD
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# define STM32_CONSOLE_BITS CONFIG_USART4_BITS
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# define STM32_CONSOLE_PARITY CONFIG_USART4_PARITY
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# define STM32_CONSOLE_2STOP CONFIG_USART4_2STOP
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# define STM32_CONSOLE_BAUD CONFIG_UART4_BAUD
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# define STM32_CONSOLE_BITS CONFIG_UART4_BITS
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# define STM32_CONSOLE_PARITY CONFIG_UART4_PARITY
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# define STM32_CONSOLE_2STOP CONFIG_UART4_2STOP
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# define STM32_CONSOLE_TX GPIO_UART4_TX
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# define STM32_CONSOLE_RX GPIO_UART4_RX
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#elif defined(CONFIG_USART5_SERIAL_CONSOLE)
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#elif defined(CONFIG_UART5_SERIAL_CONSOLE)
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# define STM32_CONSOLE_BASE STM32_UART5_BASE
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# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
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# define STM32_CONSOLE_BAUD CONFIG_USART5_BAUD
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# define STM32_CONSOLE_BITS CONFIG_USART5_BITS
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# define STM32_CONSOLE_PARITY CONFIG_USART5_PARITY
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# define STM32_CONSOLE_2STOP CONFIG_USART5_2STOP
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# define STM32_CONSOLE_BAUD CONFIG_UART5_BAUD
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# define STM32_CONSOLE_BITS CONFIG_UART5_BITS
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# define STM32_CONSOLE_PARITY CONFIG_UART5_PARITY
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# define STM32_CONSOLE_2STOP CONFIG_UART5_2STOP
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# define STM32_CONSOLE_TX GPIO_UART5_TX
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# define STM32_CONSOLE_RX GPIO_UART5_RX
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#elif defined(CONFIG_USART6_SERIAL_CONSOLE)
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@@ -90,7 +90,7 @@
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# endif
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# if defined(CONFIG_USART2_RXDMA) || defined(CONFIG_USART3_RXDMA) || \
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defined(CONFIG_USART4_RXDMA) || defined(CONFIG_USART5_RXDMA)
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defined(CONFIG_UART4_RXDMA) || defined(CONFIG_UART5_RXDMA)
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# ifndef CONFIG_STM32_DMA1
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# error STM32 USART2/3/4/5 receive DMA requires CONFIG_STM32_DMA1
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# endif
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@@ -113,11 +113,11 @@
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# error "USART3 DMA channel not defined (DMAMAP_USART3_RX)"
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# endif
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# if defined(CONFIG_USART4_RXDMA) && !defined(DMAMAP_UART4_RX)
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# if defined(CONFIG_UART4_RXDMA) && !defined(DMAMAP_UART4_RX)
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# error "UART4 DMA channel not defined (DMAMAP_UART4_RX)"
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# endif
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# if defined(CONFIG_USART5_RXDMA) && !defined(DMAMAP_UART5_RX)
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# if defined(CONFIG_UART5_RXDMA) && !defined(DMAMAP_UART5_RX)
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# error "UART5 DMA channel not defined (DMAMAP_UART5_RX)"
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# endif
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@@ -338,17 +338,17 @@ static char g_usart3rxfifo[RXDMA_BUFFER_SIZE];
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#endif
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#ifdef CONFIG_STM32_UART4
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static char g_uart4rxbuffer[CONFIG_USART4_RXBUFSIZE];
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static char g_uart4txbuffer[CONFIG_USART4_TXBUFSIZE];
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# ifdef CONFIG_USART4_RXDMA
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static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE];
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static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE];
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# ifdef CONFIG_UART4_RXDMA
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static char g_uart4rxfifo[RXDMA_BUFFER_SIZE];
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# endif
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#endif
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#ifdef CONFIG_STM32_UART5
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static char g_uart5rxbuffer[CONFIG_USART5_RXBUFSIZE];
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static char g_uart5txbuffer[CONFIG_USART5_TXBUFSIZE];
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# ifdef CONFIG_USART5_RXDMA
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static char g_uart5rxbuffer[CONFIG_UART5_RXBUFSIZE];
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static char g_uart5txbuffer[CONFIG_UART5_TXBUFSIZE];
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# ifdef CONFIG_UART5_RXDMA
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static char g_uart5rxfifo[RXDMA_BUFFER_SIZE];
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# endif
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#endif
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@@ -526,15 +526,15 @@ static struct up_dev_s g_uart4priv =
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#endif
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.recv =
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{
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.size = CONFIG_USART4_RXBUFSIZE,
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.size = CONFIG_UART4_RXBUFSIZE,
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.buffer = g_uart4rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_USART4_TXBUFSIZE,
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.size = CONFIG_UART4_TXBUFSIZE,
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.buffer = g_uart4txbuffer,
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},
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#ifdef CONFIG_USART4_RXDMA
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#ifdef CONFIG_UART4_RXDMA
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.ops = &g_uart_dma_ops,
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#else
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.ops = &g_uart_ops,
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@@ -543,21 +543,21 @@ static struct up_dev_s g_uart4priv =
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},
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.irq = STM32_IRQ_UART4,
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.parity = CONFIG_USART4_PARITY,
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.bits = CONFIG_USART4_BITS,
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.stopbits2 = CONFIG_USART4_2STOP,
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.baud = CONFIG_USART4_BAUD,
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.parity = CONFIG_UART4_PARITY,
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.bits = CONFIG_UART4_BITS,
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.stopbits2 = CONFIG_UART4_2STOP,
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.baud = CONFIG_UART4_BAUD,
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.apbclock = STM32_PCLK1_FREQUENCY,
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.usartbase = STM32_UART4_BASE,
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.tx_gpio = GPIO_UART4_TX,
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.rx_gpio = GPIO_UART4_RX,
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#ifdef GPIO_USART4_CTS
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#ifdef GPIO_UART4_CTS
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.cts_gpio = GPIO_UART4_CTS,
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#endif
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#ifdef GPIO_USART4_RTS
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#ifdef GPIO_UART4_RTS
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.rts_gpio = GPIO_UART4_RTS,
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#endif
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#ifdef CONFIG_USART4_RXDMA
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#ifdef CONFIG_UART4_RXDMA
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.rxdma_channel = DMAMAP_UART4_RX,
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.rxfifo = g_uart4rxfifo,
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#endif
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@@ -577,15 +577,15 @@ static struct up_dev_s g_uart5priv =
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#endif
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.recv =
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{
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.size = CONFIG_USART5_RXBUFSIZE,
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.size = CONFIG_UART5_RXBUFSIZE,
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.buffer = g_uart5rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_USART5_TXBUFSIZE,
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.size = CONFIG_UART5_TXBUFSIZE,
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.buffer = g_uart5txbuffer,
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},
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#ifdef CONFIG_USART5_RXDMA
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#ifdef CONFIG_UART5_RXDMA
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.ops = &g_uart_dma_ops,
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#else
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.ops = &g_uart_ops,
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@@ -594,21 +594,21 @@ static struct up_dev_s g_uart5priv =
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},
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.irq = STM32_IRQ_UART5,
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.parity = CONFIG_USART5_PARITY,
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.bits = CONFIG_USART5_BITS,
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.stopbits2 = CONFIG_USART5_2STOP,
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.baud = CONFIG_USART5_BAUD,
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.parity = CONFIG_UART5_PARITY,
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.bits = CONFIG_UART5_BITS,
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.stopbits2 = CONFIG_UART5_2STOP,
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.baud = CONFIG_UART5_BAUD,
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.apbclock = STM32_PCLK1_FREQUENCY,
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.usartbase = STM32_UART5_BASE,
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.tx_gpio = GPIO_UART5_TX,
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.rx_gpio = GPIO_UART5_RX,
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#ifdef GPIO_USART5_CTS
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#ifdef GPIO_UART5_CTS
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.cts_gpio = GPIO_UART5_CTS,
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#endif
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#ifdef GPIO_USART5_RTS
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#ifdef GPIO_UART5_RTS
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.rts_gpio = GPIO_UART5_RTS,
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#endif
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#ifdef CONFIG_USART5_RXDMA
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#ifdef CONFIG_UART5_RXDMA
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.rxdma_channel = DMAMAP_UART5_RX,
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.rxfifo = g_uart5rxfifo,
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#endif
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@@ -1898,14 +1898,14 @@ void stm32_serial_dma_poll(void)
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}
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#endif
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#ifdef CONFIG_USART4_RXDMA
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#ifdef CONFIG_UART4_RXDMA
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if (g_uart4priv.rxdma != NULL)
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{
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up_dma_rxcallback(g_uart4priv.rxdma, 0, &g_uart4priv);
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}
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#endif
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#ifdef CONFIG_USART5_RXDMA
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#ifdef CONFIG_UART5_RXDMA
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if (g_uart5priv.rxdma != NULL)
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{
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up_dma_rxcallback(g_uart5priv.rxdma, 0, &g_uart5priv);
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@@ -84,40 +84,40 @@
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#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART1)
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# undef CONFIG_USART3_SERIAL_CONSOLE
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# undef CONFIG_USART4_SERIAL_CONSOLE
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# undef CONFIG_USART5_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# undef CONFIG_USART6_SERIAL_CONSOLE
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# define CONSOLE_UART 1
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# define HAVE_CONSOLE 1
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#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART2)
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART3_SERIAL_CONSOLE
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# undef CONFIG_USART4_SERIAL_CONSOLE
|
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# undef CONFIG_USART5_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# undef CONFIG_USART6_SERIAL_CONSOLE
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# define CONSOLE_UART 2
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# define HAVE_CONSOLE 1
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#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART3)
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
|
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# undef CONFIG_USART4_SERIAL_CONSOLE
|
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# undef CONFIG_USART5_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_UART5_SERIAL_CONSOLE
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# undef CONFIG_USART6_SERIAL_CONSOLE
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# define CONSOLE_UART 3
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# define HAVE_CONSOLE 1
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#elif defined(CONFIG_USART4_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART4)
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#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART4)
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||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
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# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART5_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART5_SERIAL_CONSOLE
|
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# undef CONFIG_USART6_SERIAL_CONSOLE
|
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# define CONSOLE_UART 4
|
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# define HAVE_CONSOLE 1
|
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#elif defined(CONFIG_USART5_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART5)
|
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#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART5)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART4_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART6_SERIAL_CONSOLE
|
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# define CONSOLE_UART 5
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# define HAVE_CONSOLE 1
|
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@@ -125,16 +125,16 @@
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# undef CONFIG_USART1_SERIAL_CONSOLE
|
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# undef CONFIG_USART2_SERIAL_CONSOLE
|
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# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART4_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART5_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
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# undef CONFIG_UART5_SERIAL_CONSOLE
|
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# define CONSOLE_UART 6
|
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# define HAVE_CONSOLE 1
|
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#else
|
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# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
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# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART4_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART5_SERIAL_CONSOLE
|
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# undef CONFIG_UART4_SERIAL_CONSOLE
|
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# undef CONFIG_UART5_SERIAL_CONSOLE
|
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# undef CONFIG_USART6_SERIAL_CONSOLE
|
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# define CONSOLE_UART 0
|
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# undef HAVE_CONSOLE
|
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@@ -149,8 +149,8 @@
|
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# undef CONFIG_USART1_RXDMA
|
||||
# undef CONFIG_USART2_RXDMA
|
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# undef CONFIG_USART3_RXDMA
|
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# undef CONFIG_USART4_RXDMA
|
||||
# undef CONFIG_USART5_RXDMA
|
||||
# undef CONFIG_UART4_RXDMA
|
||||
# undef CONFIG_UART5_RXDMA
|
||||
# undef CONFIG_USART6_RXDMA
|
||||
#endif
|
||||
|
||||
@@ -169,11 +169,11 @@
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32_UART4
|
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# undef CONFIG_USART4_RXDMA
|
||||
# undef CONFIG_UART4_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32_UART5
|
||||
# undef CONFIG_USART5_RXDMA
|
||||
# undef CONFIG_UART5_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32_USART6
|
||||
@@ -184,8 +184,8 @@
|
||||
|
||||
#undef SERIAL_HAVE_DMA
|
||||
#if defined(CONFIG_USART1_RXDMA) || defined(CONFIG_USART2_RXDMA) || \
|
||||
defined(CONFIG_USART3_RXDMA) || defined(CONFIG_USART4_RXDMA) || \
|
||||
defined(CONFIG_USART5_RXDMA) || defined(CONFIG_USART6_RXDMA)
|
||||
defined(CONFIG_USART3_RXDMA) || defined(CONFIG_UART4_RXDMA) || \
|
||||
defined(CONFIG_UART5_RXDMA) || defined(CONFIG_USART6_RXDMA)
|
||||
# define SERIAL_HAVE_DMA 1
|
||||
#endif
|
||||
|
||||
@@ -198,9 +198,9 @@
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32_USART3) && !defined(CONFIG_USART3_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32_UART4) && !defined(CONFIG_USART4_RXDMA)
|
||||
#elif defined(CONFIG_STM32_UART4) && !defined(CONFIG_UART4_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32_UART5) && !defined(CONFIG_USART5_RXDMA)
|
||||
#elif defined(CONFIG_STM32_UART5) && !defined(CONFIG_UART5_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32_USART6) && !defined(CONFIG_USART6_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
|
||||
@@ -93,7 +93,7 @@ CONFIG_USART0_RXBUFSIZE=256
|
||||
CONFIG_USART0_BAUD=38400
|
||||
CONFIG_USART0_BITS=8
|
||||
CONFIG_USART0_PARITY=0
|
||||
CONFIG_USART0_2STOP=0
|
||||
CONFIG_USART0_2STOP=n
|
||||
|
||||
CONFIG_USART1_SERIAL_CONSOLE=n
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
@@ -101,7 +101,7 @@ CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART1_BAUD=38400
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
||||
@@ -125,9 +125,9 @@ CONFIG_USART0_PARITY=0
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
|
||||
CONFIG_USART0_2STOP=0
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART0_2STOP=n
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
||||
@@ -125,9 +125,9 @@ CONFIG_USART0_PARITY=0
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
|
||||
CONFIG_USART0_2STOP=0
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART0_2STOP=n
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
||||
@@ -49,7 +49,7 @@ CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x11000000
|
||||
CONFIG_DRAM_SIZE=285212672
|
||||
|
||||
#
|
||||
# C5471 specific device driver settings
|
||||
@@ -67,8 +67,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
|
||||
#
|
||||
# C5471 Ethernet Driver settings
|
||||
|
||||
@@ -49,7 +49,7 @@ CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x11000000
|
||||
CONFIG_DRAM_SIZE=285212672
|
||||
|
||||
#
|
||||
# General build options
|
||||
@@ -75,8 +75,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
|
||||
#
|
||||
# C5471 Ethernet Driver settings
|
||||
|
||||
@@ -49,7 +49,7 @@ CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x11000000
|
||||
CONFIG_DRAM_SIZE=285212672
|
||||
|
||||
#
|
||||
# C5471 specific device driver settings
|
||||
@@ -67,8 +67,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
|
||||
#
|
||||
# C5471 Ethernet Driver settings
|
||||
|
||||
@@ -49,7 +49,7 @@ CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x11000000
|
||||
CONFIG_DRAM_SIZE=285212672
|
||||
|
||||
#
|
||||
# C5471 specific device driver settings
|
||||
@@ -67,8 +67,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
|
||||
#
|
||||
# C5471 Ethernet Driver settings
|
||||
|
||||
@@ -49,7 +49,7 @@ CONFIG_ARCH_INTERRUPTSTACK=1024
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x00840000
|
||||
CONFIG_DRAM_SIZE=8650752
|
||||
|
||||
#
|
||||
# C5471 specific device driver settings
|
||||
@@ -68,8 +68,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
CONFIG_STDIO_LINE_BUFFER=y
|
||||
|
||||
#
|
||||
|
||||
@@ -52,7 +52,7 @@ CONFIG_ARCH_INTERRUPTSTACK=1024
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x00840000
|
||||
CONFIG_DRAM_SIZE=8650752
|
||||
|
||||
#
|
||||
# C5471 specific device driver settings
|
||||
@@ -71,8 +71,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
CONFIG_STDIO_LINE_BUFFER=y
|
||||
|
||||
#
|
||||
|
||||
@@ -52,7 +52,7 @@ CONFIG_ARCH_INTERRUPTSTACK=1024
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x00840000
|
||||
CONFIG_DRAM_SIZE=8650752
|
||||
|
||||
#
|
||||
# C5471 specific device driver settings
|
||||
@@ -71,8 +71,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
CONFIG_STDIO_LINE_BUFFER=y
|
||||
|
||||
#
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_MCS92S12NEC64=y
|
||||
CONFIG_ARCH_BOARD="demo9s12ne64"
|
||||
CONFIG_ARCH_BOARD_DEMOS92S12NEC64=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_NOINTC=y
|
||||
CONFIG_ARCH_IRQPRIO=n
|
||||
@@ -77,7 +77,7 @@ CONFIG_SCI0_RXBUFSIZE=32
|
||||
CONFIG_SCI0_BAUD=115200
|
||||
CONFIG_SCI0_BITS=8
|
||||
CONFIG_SCI0_PARITY=0
|
||||
CONFIG_SCI0_2STOP=0
|
||||
CONFIG_SCI0_2STOP=n
|
||||
|
||||
CONFIG_SCI1_SERIAL_CONSOLE=n
|
||||
CONFIG_SCI1_TXBUFSIZE=32
|
||||
@@ -85,7 +85,7 @@ CONFIG_SCI1_RXBUFSIZE=32
|
||||
CONFIG_SCI1_BAUD=115200
|
||||
CONFIG_SCI1_BITS=8
|
||||
CONFIG_SCI1_PARITY=0
|
||||
CONFIG_SCI1_2STOP=0
|
||||
CONFIG_SCI1_2STOP=n
|
||||
|
||||
#
|
||||
# MC9S12NEC64 specific SSI device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD="ea3131"
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x00030000
|
||||
CONFIG_DRAM_SIZE=196608
|
||||
CONFIG_DRAM_START=0x11028000
|
||||
CONFIG_DRAM_VSTART=0x11028000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@@ -99,7 +99,7 @@ CONFIG_UART_RXBUFSIZE=256
|
||||
CONFIG_UART_BAUD=115200
|
||||
CONFIG_UART_BITS=8
|
||||
CONFIG_UART_PARITY=0
|
||||
CONFIG_UART_2STOP=0
|
||||
CONFIG_UART_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD="ea3131"
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x00030000
|
||||
CONFIG_DRAM_SIZE=196608
|
||||
CONFIG_DRAM_START=0x11028000
|
||||
CONFIG_DRAM_VSTART=0x11028000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@@ -99,7 +99,7 @@ CONFIG_UART_RXBUFSIZE=256
|
||||
CONFIG_UART_BAUD=115200
|
||||
CONFIG_UART_BITS=8
|
||||
CONFIG_UART_PARITY=0
|
||||
CONFIG_UART_2STOP=0
|
||||
CONFIG_UART_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD="ea3131"
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x00030000
|
||||
CONFIG_DRAM_SIZE=196608
|
||||
CONFIG_DRAM_START=0x11028000
|
||||
CONFIG_DRAM_VSTART=0x11028000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@@ -99,7 +99,7 @@ CONFIG_UART_RXBUFSIZE=256
|
||||
CONFIG_UART_BAUD=115200
|
||||
CONFIG_UART_BITS=8
|
||||
CONFIG_UART_PARITY=0
|
||||
CONFIG_UART_2STOP=0
|
||||
CONFIG_UART_2STOP=n
|
||||
|
||||
#
|
||||
# MP25x Configuration
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD="ea3131"
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x00030000
|
||||
CONFIG_DRAM_SIZE=196608
|
||||
CONFIG_DRAM_START=0x11028000
|
||||
CONFIG_DRAM_VSTART=0x11028000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@@ -99,7 +99,7 @@ CONFIG_UART_RXBUFSIZE=256
|
||||
CONFIG_UART_BAUD=115200
|
||||
CONFIG_UART_BITS=8
|
||||
CONFIG_UART_PARITY=0
|
||||
CONFIG_UART_2STOP=0
|
||||
CONFIG_UART_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD="ea3131"
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x00030000
|
||||
CONFIG_DRAM_SIZE=196608
|
||||
CONFIG_DRAM_START=0x11028000
|
||||
CONFIG_DRAM_VSTART=0x11028000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@@ -99,7 +99,7 @@ CONFIG_UART_RXBUFSIZE=256
|
||||
CONFIG_UART_BAUD=115200
|
||||
CONFIG_UART_BITS=8
|
||||
CONFIG_UART_PARITY=0
|
||||
CONFIG_UART_2STOP=0
|
||||
CONFIG_UART_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LPC3152=y
|
||||
CONFIG_ARCH_BOARD="ea3152"
|
||||
CONFIG_ARCH_BOARD_EA3152=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x00030000
|
||||
CONFIG_DRAM_SIZE=196608
|
||||
CONFIG_DRAM_START=0x11028000
|
||||
CONFIG_DRAM_VSTART=0x11028000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@@ -99,7 +99,7 @@ CONFIG_UART_RXBUFSIZE=256
|
||||
CONFIG_UART_BAUD=115200
|
||||
CONFIG_UART_BITS=8
|
||||
CONFIG_UART_PARITY=0
|
||||
CONFIG_UART_2STOP=0
|
||||
CONFIG_UART_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6918=y
|
||||
CONFIG_ARCH_BOARD="eagle100"
|
||||
CONFIG_ARCH_BOARD_EAGLE100=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -83,8 +83,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6918 specific SSI device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6918=y
|
||||
CONFIG_ARCH_BOARD="eagle100"
|
||||
CONFIG_ARCH_BOARD_EAGLE100=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -83,8 +83,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6918 specific SSI device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6918=y
|
||||
CONFIG_ARCH_BOARD="eagle100"
|
||||
CONFIG_ARCH_BOARD_EAGLE100=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -83,8 +83,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6918 specific SSI device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6918=y
|
||||
CONFIG_ARCH_BOARD="eagle100"
|
||||
CONFIG_ARCH_BOARD_EAGLE100=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -83,8 +83,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6918 specific SSI device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6918=y
|
||||
CONFIG_ARCH_BOARD="eagle100"
|
||||
CONFIG_ARCH_BOARD_EAGLE100=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -83,8 +83,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6918 specific SSI device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6918=y
|
||||
CONFIG_ARCH_BOARD="eagle100"
|
||||
CONFIG_ARCH_BOARD_EAGLE100=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -83,8 +83,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6918 specific SSI device driver settings
|
||||
|
||||
@@ -44,7 +44,7 @@ CONFIG_ARCH_CHIP_LM3S9B96=y
|
||||
CONFIG_ARCH_BOARD="ekk-lm3s9b96"
|
||||
CONFIG_ARCH_BOARD_EKKLM3S9B96=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00018000
|
||||
CONFIG_DRAM_SIZE=98304
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -99,9 +99,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6B96 specific SSI device driver settings
|
||||
|
||||
@@ -44,7 +44,7 @@ CONFIG_ARCH_CHIP_LM3S9B96=y
|
||||
CONFIG_ARCH_BOARD="ekk-lm3s9b96"
|
||||
CONFIG_ARCH_BOARD_EKKLM3S9B96=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00018000
|
||||
CONFIG_DRAM_SIZE=98304
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -99,9 +99,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6B96 specific SSI device driver settings
|
||||
|
||||
@@ -68,8 +68,8 @@ CONFIG_UART0_BAUD=57600
|
||||
CONFIG_UART1_BAUD=57600
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
||||
@@ -71,8 +71,8 @@ CONFIG_UART0_BITS=0
|
||||
CONFIG_UART1_BITS=0
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
||||
@@ -71,8 +71,8 @@ CONFIG_UART0_BITS=0
|
||||
CONFIG_UART1_BITS=0
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
||||
@@ -71,8 +71,8 @@ CONFIG_UART0_BITS=0
|
||||
CONFIG_UART1_BITS=0
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
||||
@@ -71,8 +71,8 @@ CONFIG_UART0_BITS=0
|
||||
CONFIG_UART1_BITS=0
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
||||
@@ -70,8 +70,8 @@ CONFIG_UART0_BITS=0
|
||||
CONFIG_UART1_BITS=0
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
||||
@@ -71,8 +71,8 @@ CONFIG_UART0_BITS=0
|
||||
CONFIG_UART1_BITS=0
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_STM32F103VCT6=y
|
||||
CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -116,44 +116,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103Z specific SSI device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_STM32F103VCT6=y
|
||||
CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -114,44 +114,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103V specific SSI device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_STM32F103VCT6=y
|
||||
CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -119,44 +119,44 @@ CONFIG_STM32_TIM3_PARTIAL_REMAP=y
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103Z specific SSI device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_STM32F103VCT6=y
|
||||
CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -114,44 +114,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103V specific SSI device driver settings
|
||||
|
||||
@@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -118,44 +118,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103V specific SSI device driver settings
|
||||
|
||||
@@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -116,44 +116,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103V specific SSI device driver settings
|
||||
|
||||
@@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -115,44 +115,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103V specific SSI device driver settings
|
||||
|
||||
@@ -128,10 +128,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
||||
@@ -134,10 +134,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6432=y
|
||||
CONFIG_ARCH_BOARD="lm3s6432-s2e"
|
||||
CONFIG_ARCH_BOARD_LM3S6432S2E=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00008000
|
||||
CONFIG_DRAM_SIZE=32768
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -98,9 +98,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6432 specific SSI device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6432=y
|
||||
CONFIG_ARCH_BOARD="lm3s6432-s2e"
|
||||
CONFIG_ARCH_BOARD_LM3S6432S2E=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00008000
|
||||
CONFIG_DRAM_SIZE=32768
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -98,9 +98,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6432 specific SSI device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6965=y
|
||||
CONFIG_ARCH_BOARD="lm3s6965-ek"
|
||||
CONFIG_ARCH_BOARD_LM3S6965EK=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -98,9 +98,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6965 specific SSI device driver settings
|
||||
|
||||
@@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6965=y
|
||||
CONFIG_ARCH_BOARD="lm3s6965-ek"
|
||||
CONFIG_ARCH_BOARD_LM3S6965EK=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@@ -98,9 +98,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6965 specific SSI device driver settings
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user