mirror of
https://github.com/apache/nuttx.git
synced 2026-06-07 09:18:00 +08:00
arch/arm/src/max326xx/max32660: Add GPIO driver and GPIO interrupt support.
This commit is contained in:
Gregory Nutt
@@ -104,7 +104,20 @@
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/* Number of external interrupts and total number of vectors */
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#define MAX326_IRQ_NEXTINT 50
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#define NR_IRQS (MAX326_IRQ_EXTINT + MAX326_IRQ_NEXTINT)
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#define MAX326_IRQ_NVECTORS (MAX326_IRQ_EXTINT + MAX326_IRQ_NEXTINT)
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/* If GPIO pin interrupts are used then there is a second level of interrupt decode */
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#ifdef CONFIG_MAX326_GPIOIRQ
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#warning Missing logic
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#else
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# define MAX326_IRQ_NPININT 0
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#endif
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/* Total number of interrupts handled by the OS */
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#define NR_IRQS (MAX326_IRQ_NVECTORS + MAX326_IRQ_NPININT)
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/************************************************************************************************
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* Public Types
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@@ -86,10 +86,41 @@
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/* 46-48 Reserved */
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#define MAX326_IRQ_SPIS (MAX326_IRQ_EXTINT + 49) /* 49 SPI Slave */
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/* Number of external interrupts and total number of vectors */
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/* Number of external interrupts and number of true interrupt vectors */
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#define MAX326_IRQ_NEXTINT 50
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#define NR_IRQS (MAX326_IRQ_EXTINT + MAX326_IRQ_NEXTINT)
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#define MAX326_IRQ_NVECTORS (MAX326_IRQ_EXTINT + MAX326_IRQ_NEXTINT)
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/* If GPIO pin interrupts are used then there is a second level of interrupt decode */
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#ifdef CONFIG_MAX326_GPIOIRQ
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/* Up to 14 pins are available as interrupt sources, depending on the MAX32660 package */
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# define MAX326_IRQ_P0_0 (MAX326_IRQ_NEXTINT + 0)
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# define MAX326_IRQ_P0_1 (MAX326_IRQ_NEXTINT + 1)
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# define MAX326_IRQ_P0_2 (MAX326_IRQ_NEXTINT + 2)
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# define MAX326_IRQ_P0_3 (MAX326_IRQ_NEXTINT + 3)
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# define MAX326_IRQ_P0_4 (MAX326_IRQ_NEXTINT + 4)
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# define MAX326_IRQ_P0_5 (MAX326_IRQ_NEXTINT + 5)
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# define MAX326_IRQ_P0_6 (MAX326_IRQ_NEXTINT + 6)
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# define MAX326_IRQ_P0_7 (MAX326_IRQ_NEXTINT + 7)
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# define MAX326_IRQ_P0_8 (MAX326_IRQ_NEXTINT + 8)
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# define MAX326_IRQ_P0_9 (MAX326_IRQ_NEXTINT + 9)
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# define MAX326_IRQ_P0_10 (MAX326_IRQ_NEXTINT + 10)
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# define MAX326_IRQ_P0_11 (MAX326_IRQ_NEXTINT + 11)
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# define MAX326_IRQ_P0_12 (MAX326_IRQ_NEXTINT + 12)
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# define MAX326_IRQ_P0_13 (MAX326_IRQ_NEXTINT + 13)
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# define MAX326_IRQ_GPIO1ST MAX326_IRQ_P0_0
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# define MAX326_IRQ_GPIOLAST MAX326_IRQ_P0_13
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# define MAX326_IRQ_NPININT 14
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#else
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# define MAX326_IRQ_NPININT 0
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#endif
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/* Total number of interrupts handled by the OS */
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#define NR_IRQS (MAX326_IRQ_NVECTORS + MAX326_IRQ_NPININT)
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/************************************************************************************************
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* Public Types
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@@ -439,6 +439,15 @@ void up_disable_irq(int irq)
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uint32_t regval;
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uint32_t bit;
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#ifdef CONFIG_MAX326_GPIOIRQ
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/* Handle "fake" GPIO irq */
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if (irq >= MAX326_IRQ_GPIO1ST && irq <= MAX326_IRQ_GPIOLAST)
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{
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max326_gpio_irqdisable(irq);
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}
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else
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#endif
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if (max326_irqinfo(irq, ®addr, &bit, NVIC_CLRENA_OFFSET) == 0)
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{
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/* Modify the appropriate bit in the register to disable the interrupt.
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@@ -476,6 +485,15 @@ void up_enable_irq(int irq)
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uint32_t regval;
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uint32_t bit;
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#ifdef CONFIG_MAX326_GPIOIRQ
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/* Handle "fake" GPIO irq */
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if (irq >= MAX326_IRQ_GPIO1ST && irq <= MAX326_IRQ_GPIOLAST)
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{
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max326_gpio_irqensable(irq);
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}
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else
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#endif
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if (max326_irqinfo(irq, ®addr, &bit, NVIC_ENA_OFFSET) == 0)
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{
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/* Modify the appropriate bit in the register to enable the interrupt.
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@@ -542,13 +560,20 @@ int up_prioritize_irq(int irq, int priority)
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regaddr = NVIC_SYSH_PRIORITY(irq);
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irq -= 4;
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}
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else
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else if (irq < MAX326_IRQ_NVECTORS)
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{
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/* NVIC_IRQ_PRIORITY() maps {0..} to one of many priority registers */
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irq -= MAX326_IRQ_EXTINT;
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regaddr = NVIC_IRQ_PRIORITY(irq);
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}
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else
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{
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#ifndef CONFIG_MAX326_GPIOIRQ
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DEBUGPANIC();
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#endif
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return;
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}
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regval = getreg32(regaddr);
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shift = ((irq & 3) << 3);
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File diff suppressed because it is too large
Load Diff
@@ -69,10 +69,9 @@
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#define GPIO_FUNC_MASK (15 << GPIO_FUNC_SHIFT)
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# define GPIO_INPUT (0 << GPIO_FUNC_SHIFT) /* 0000 GPIO input pin */
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# define GPIO_OUTPUT (1 << GPIO_FUNC_SHIFT) /* 0001 GPIO output pin */
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# define GPIO_ALT0 (4 << GPIO_FUNC_SHIFT) /* 0100 GPIO Alternate function 0 */
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# define GPIO_ALT1 (5 << GPIO_FUNC_SHIFT) /* 0101 GPIO Alternate function 1 */
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# define GPIO_ALT2 (6 << GPIO_FUNC_SHIFT) /* 0110 GPIO Alternate function 2 */
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# define GPIO_ALT3 (7 << GPIO_FUNC_SHIFT) /* 0111 GPIO Alternate function 3 */
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# define GPIO_ALT1 (5 << GPIO_FUNC_SHIFT) /* 0100 GPIO Alternate function 1 */
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# define GPIO_ALT2 (6 << GPIO_FUNC_SHIFT) /* 0101 GPIO Alternate function 2 */
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# define GPIO_ALT3 (7 << GPIO_FUNC_SHIFT) /* 0110 GPIO Alternate function 3 */
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# define GPIO_INTFE (9 << GPIO_FUNC_SHIFT) /* 1001 GPIO interrupt falling edge */
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# define GPIO_INTRE (10 << GPIO_FUNC_SHIFT) /* 1010 GPIO interrupt rising edge */
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# define GPIO_INTBOTH (11 << GPIO_FUNC_SHIFT) /* 1011 GPIO interrupt both edges */
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@@ -94,7 +93,7 @@
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#define GPIO_IS_GPIO(ps) (((uint16_t)(ps) & GPIO_GPIO_MASK) == GPIO_GPIO_CODE)
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#define GPIO_IS_ALT(ps) (((uint16_t)(ps) & GPIO_ALT_MASK) == GPIO_ALT_CODE)
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#define GPIO_IS_INTR(ps) (((uint16_t)(ps) & GPIO_ALT_MASK) == GPIO_ALT_CODE)
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#define GPIO_IS_INTR(ps) (((uint16_t)(ps) & GPIO_ALT_MASK) == GPIO_INTR_CODE)
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#define GPIO_IS_INTEDGE(ps) (((uint16_t)(ps) & GPIO_INTEDGE_MASK) == GPIO_INTEDGE_CODE)
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#define GPIO_IS_INTLVL(ps) (((uint16_t)(ps) & GPIO_INTLVL_MASK) == GPIO_INTLVL_CODE)
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@@ -180,6 +179,9 @@
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# define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
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# define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
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# define GPIO_PINMIN 0
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# define GPIO_PINMAX 13
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/************************************************************************************
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* Public Types
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************************************************************************************/
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@@ -0,0 +1,226 @@
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/****************************************************************************
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* arch/arm/src/max32660/max326_gpioirq.c
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include "up_arch.h"
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#include "max326_gpio.h"
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#ifdef CONFIG_MAX326_GPIOIRQ
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: max326_gpio_irqinitialize
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*
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* Description:
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* Initialize logic to support interrupting GPIO pins. This function is
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* called by the OS initialization logic and is not a user interface.
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*
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* Assumptions:
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* Called early in the boot-up sequence
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*
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****************************************************************************/
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void max326_gpio_irqinitialize(void);
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{
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/* Attach the GPIO0 interrupt handler and enable interrupts */
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DEBUGVERIFY(irq_attach, MAX326_IRQ_GPIO0, NULL);
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up_enable_irq(MAX326_IRQ_GPIO0);
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}
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/****************************************************************************
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* Name: max326_gpio_irqconfig
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*
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* Description:
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* Configure a pin for interrupt operation. This function should not be
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* called directory but, rather, indirectly through max326_gpio_config().
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*
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* Assumptions:
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* - The pin interrupt has been disabled and all interrupt related bits
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* have been set to zero by max436_gpio_config().
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* - We are called in a critical section.
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*
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****************************************************************************/
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void max326_gpio_irqconfig(max326_pinset_t cfgset)
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{
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unsigned int pin;
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uint32_t pinmask;
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uint32_t intmode;
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uint32_t intpol;
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uint32_t intdual;
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uint32_t regval;
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pin = (cfgset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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DEBUGASSERT(pin <= GPIO_PINMAX);
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pinmask = 1 << pin;
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intmode = 0;
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intpol = 0;
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intdual = 0;
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switch (cfgset & GPIO_FUNC_MASK)
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{
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default:
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case GPIO_INPUT:
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case GPIO_OUTPUT:
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case GPIO_ALT1:
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case GPIO_ALT2:
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case GPIO_ALT3:
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DEBUGPANIC();
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return;
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case GPIO_INTFE: /* Edge triggered, falling edge */
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intmode = pinmask; /* Edge triggered */
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break;
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case GPIO_INTRE: /* Edge triggered, rising edge */
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intmode = pinmask; /* Edge triggered */
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intpol = pinmask; /* Rising edge */
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break;
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case GPIO_INTBOTH: /* Edge triggered, both edges */
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intmode = pinmask; /* Edge triggered */
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intdual = pinmask; /* Both edges */
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break;
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case GPIO_INTLOW: /* Level triggered, low level */
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break;
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case GPIO_INTHIGH: /* Level triggered, high level */
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intpol = pinmask; /* High level */
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break;
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}
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/* Configure the interrupt */
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regval = getreg32(MAX326_GPIO0_INTMODE);
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regval &= ~pinmask;
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regval |= intmode;
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putreg32(regval, MAX326_GPIO0_INTMODE)
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regval = getreg32(MAX326_GPIO0_INTPOL);
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regval &= ~pinmask;
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regval |= intpol;
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putreg32(regval, MAX326_GPIO0_INTPOL)
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regval = getreg32(MAX326_GPIO0_INTDUALEDGE);
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regval &= ~pinmask;
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regval |= intdual;
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putreg32(regval, MAX326_GPIO0_INTDUALEDGE)
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}
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/************************************************************************************
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* Name: max326_gpio_irqdisable
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*
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* Description:
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* Disable a GPIO pin interrupt. This function should not be called directly but,
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* rather through up_disable_irq();
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*
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* Assumptions:
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* We are in a critical section.
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*
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************************************************************************************/
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void max326_gpio_irqdisable(int irq)
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{
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unsigned int pin;
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uint32_t pinmask;
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uint32_t regval;
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irqset_t flags;
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pin = (cfgset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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DEBUGASSERT(pin <= GPIO_PINMAX);
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pinmask = 1 << pin;
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/* Modification of registers must be atomic */
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flags = spin_lock_irqsave();
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regval = getreg32(MAX326_GPIO0_INTEN);
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regval &= ~pinmask;
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putreg32(regval, MAX326_GPIO0_INTEN)
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spin_unlock_restore(flags);
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}
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/************************************************************************************
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* Name: max326_gpio_irqenable
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*
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* Description:
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* Enable a GPIO pin interrupt. This function should not be called directly but,
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* rather through up_enable_irq();
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*
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* Assumptions:
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* We are in a critical section.
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*
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************************************************************************************/
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void max326_gpio_irqenable(int irq)
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{
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unsigned int pin;
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uint32_t pinmask;
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uint32_t regval;
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irqset_t flags;
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pin = (cfgset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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DEBUGASSERT(pin <= GPIO_PINMAX);
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pinmask = 1 << pin;
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/* Modification of registers must be atomic */
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flags = spin_lock_irqsave();
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regval = getreg32(MAX326_GPIO0_INTEN);
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regval |= pinmask;
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putreg32(regval, MAX326_GPIO0_INTEN)
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spin_unlock_restore(flags);
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}
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#endif /* CONFIG_MAX326_GPIOIRQ */
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@@ -86,12 +86,13 @@ extern "C"
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* Initialize logic to support interrupting GPIO pins. This function is called by
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* the OS initialization logic and is not a user interface.
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*
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* Assumptions:
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* Called early in the boot-up sequence
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*
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************************************************************************************/
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#ifdef CONFIG_MAX326_GPIOIRQ
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void max326_gpio_irqinitialize(void);
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#else
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# define max326_gpio_irqinitialize()
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#endif
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/************************************************************************************
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@@ -100,10 +101,28 @@ void max326_gpio_irqinitialize(void);
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* Description:
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* Configure a GPIO pin based on bit-encoded description of the pin.
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*
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* Assumptions:
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* - The pin interrupt has been disabled and all interrupt related bits
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* have been set to zero by max436_gpio_config().
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* - We are called in a critical section.
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*
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************************************************************************************/
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int max326_gpio_config(max326_pinset_t cfgset);
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/************************************************************************************
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* Name: max326_gpio_irqconfig
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*
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* Description:
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* Configure a pin for interrupt operation. This function should not be called
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* directory but, rather, indirectly through max326_gpio_config().
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*
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************************************************************************************/
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#ifdef CONFIG_MAX326_GPIOIRQ
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void max326_gpio_irqconfig(max326_pinset_t cfgset);
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#endif
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/************************************************************************************
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* Name: max326_gpio_write
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*
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@@ -124,11 +143,44 @@ void max326_gpio_write(max326_pinset_t pinset, bool value);
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bool max326_gpio_read(max326_pinset_t pinset);
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/************************************************************************************
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* Name: max326_gpio_irqdisable
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*
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* Description:
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* Disable a GPIO pin interrupt. This function should not be called directly but,
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* rather through up_disable_irq();
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*
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* Assumptions:
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* We are in a critical section.
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*
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************************************************************************************/
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#ifdef CONFIG_MAX326_GPIOIRQ
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void max326_gpio_irqdisable(int irq);
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#endif
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/************************************************************************************
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* Name: max326_gpio_irqenable
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*
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* Description:
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* Enable a GPIO pin interrupt. This function should not be called directly but,
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* rather through up_enable_irq();
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*
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* Assumptions:
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* We are in a critical section.
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*
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************************************************************************************/
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#ifdef CONFIG_MAX326_GPIOIRQ
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void max326_gpio_irqenable(int irq);
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#endif
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/************************************************************************************
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* Function: max326_gpio_dump
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*
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* Description:
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* Dump all GPIO registers associated with the base address of the provided pinset.
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* Decode and dump all GPIO registers associated with the port and pin
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* numbers in the provided pinset.
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*
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************************************************************************************/
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