cxd56xx improvements (#48) and various other fixes (#49)

Author: Alan Carvalho de Assis <acassis@gmail.com>

    Verify all .c and .h against nxstyle, fixed the Mixed cases

Author: Alin Jerpelea <alin.jerpelea@sony.com>

    cxd56xx improvements (#48)

    * arch: cxd56xx: Add size limitation for I2C SCU xfer

    This is a fw restriction, unroll loop because it can be transfer
    up to 16 bytes.

    * arch: cxd56xx: Fix lack of leave_critical_section

    add the missing leave_critical_section

    * arch: cxd56xx: Remove unnecessary file

    this header is duplicate and we can remove it

    * arch: cxd56xx: Cosmetic change

    remove space after function

    * arch: cxd56xx: update topreg registers

    the topreg registers are updated to match the cxd5602 HW

    * arch: cxd56xx: Add voltage setting for low battery notification

    Add voltage setting for low battery notification

    * arch: cxd56xx: Improve perfomance of SD card

    Improve a problem that the clock of SD Host Controller is lower than the
    expected value in SDR25 transfer mode.

    * arch: cxd56xx: Cosmetic changes

    cleanup to comply with coding standard

    * boards: cxd56xx: Cosmetic changes

    updates to comply with coding standard

    * boards: cxd56xx: Fix SD card cannot mount issue

    SD card cannot mount when connecting and disconnecting three times
    or more due to wrong state of parameter 'initialized'.

    This change enables to skip swtching initialized state when mount
    failed.
This commit is contained in:
Alin Jerpelea
2020-01-07 18:29:52 -03:00
committed by Alan Carvalho de Assis
parent 9d5d60fee1
commit 15eddd29c8
42 changed files with 843 additions and 661 deletions
+1 -1
View File
@@ -945,7 +945,7 @@ uint32_t cxd56_audio_get_micmap(void);
bool board_audio_tone_generator(bool en, int16_t vol, uint16_t freq);
#ifdef __cplusplus
} /* end of extern "C" */
}
#endif /* __cplusplus */
#endif /* __ARCH_ARM_INCLUDE_CXD56XX_AUDIO_H */
+2 -2
View File
@@ -38,7 +38,8 @@
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif
@@ -648,7 +649,6 @@ extern "C" {
struct cxd56_gnss_ope_mode_param_s
{
/* receiver operation mode
* 0: No Change Operation
* 1: Normal(default)
+2 -1
View File
@@ -46,7 +46,8 @@
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif
+2
View File
@@ -216,6 +216,7 @@ static uint64_t cisif_get_msec_time(void)
{
return 0;
}
return (((uint64_t)tp.tv_sec) * 1000 + tp.tv_nsec / 1000000);
}
@@ -318,6 +319,7 @@ static void cisif_callback_for_intlev(uint8_t code)
/****************************************************************************
* cisif_ycc_axi_trdn_int
****************************************************************************/
static void cisif_ycc_axi_trdn_int(uint8_t code)
{
uint32_t size;
+7 -1
View File
@@ -104,6 +104,7 @@ static int cpufifo_txhandler(int irq, FAR void *context, FAR void *arg)
cpufifo_trypush(pd->data);
sq_addlast(&pd->entry, &g_emptyqueue);
}
if (sq_empty(&g_pushqueue))
{
up_disable_irq(CXD56_IRQ_FIFO_TO);
@@ -114,7 +115,11 @@ static int cpufifo_txhandler(int irq, FAR void *context, FAR void *arg)
static int cpufifo_rxhandler(int irq, FAR void *context, FAR void *arg)
{
uint32_t word[2] = {0};
uint32_t word[2] =
{
0
};
int cpuid;
/* Drain from PULL FIFO. But not all data because this handler
@@ -226,6 +231,7 @@ int cxd56_cfregrxhandler(cpufifo_handler_t handler)
{
g_cfrxhandler = handler;
}
leave_critical_section(flags);
return ret;
}
+4 -4
View File
@@ -177,9 +177,9 @@ PM_LoadImage:
nop
nop
.global PM_PmicControl
.global pm_pmic_control
.thumb_func
PM_PmicControl:
pm_pmic_control:
mov r12, pc
b 1b
@@ -563,9 +563,9 @@ _modulelist_gnss_pwr:
.align 2
3:
.global AS_AcaControl
.global as_aca_control
.thumb_func
AS_AcaControl:
as_aca_control:
mov r12, pc
b 1b
+17 -15
View File
@@ -32,6 +32,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
@@ -93,7 +94,7 @@ struct cxd56_i2cdev_s
unsigned int base; /* Base address of registers */
uint16_t irqid; /* IRQ for this device */
int8_t port; /* Port number */
uint32_t baseFreq; /* branch frequency */
uint32_t base_freq; /* branch frequency */
sem_t mutex; /* Only one thread can access at a time */
sem_t wait; /* Place to wait for transfer completion */
@@ -266,37 +267,37 @@ static void cxd56_i2c_setfrequency(struct cxd56_i2cdev_s *priv,
uint64_t lcnt64;
uint64_t hcnt64;
uint64_t speed;
uint64_t tLow;
uint64_t tHigh;
uint64_t t_low;
uint64_t t_high;
uint32_t base = cxd56_get_i2c_baseclock(priv->port);
uint32_t spklen;
ASSERT(base);
if ((priv->frequency == frequency) && (priv->baseFreq == base))
if ((priv->frequency == frequency) && (priv->base_freq == base))
{
return;
}
priv->frequency = frequency;
priv->baseFreq = base;
priv->base_freq = base;
base /= 1000;
if (frequency <= 100000)
{
tLow = 4700000;
tHigh = 4000000;
t_low = 4700000;
t_high = 4000000;
}
else if (frequency <= 400000)
{
tLow = 1300000;
tHigh = 600000;
t_low = 1300000;
t_high = 600000;
}
else
{
tLow = 500000;
tHigh = 260000;
t_low = 500000;
t_high = 260000;
}
if (frequency > 100000)
@@ -319,11 +320,11 @@ static void cxd56_i2c_setfrequency(struct cxd56_i2cdev_s *priv,
spklen = 1;
}
lcnt64 = (tLow + 6500ull / 20000ull) * base;
lcnt64 = (t_low + 6500ull / 20000ull) * base;
lcnt = ((lcnt64 + 999999999ull) / 1000000000ull) - 1; /* ceil */
lcnt = lcnt < 8 ? 8 : lcnt;
hcnt64 = (tHigh - 6500ull) * base;
hcnt64 = (t_high - 6500ull) * base;
hcnt = ((hcnt64 + 999999999ull) / 1000000000ull) - 6 - spklen; /* ceil */
hcnt = hcnt < 6 ? 6 : hcnt;
@@ -541,7 +542,7 @@ static int cxd56_i2c_receive(struct cxd56_i2cdev_s *priv, int last)
{
break;
}
}
}
return 0;
}
@@ -738,6 +739,7 @@ static int cxd56_i2c_scurecv(int port, int addr, uint8_t *buf, ssize_t buflen)
{
return OK;
}
if (buflen > 16)
{
return -EINVAL;
@@ -997,7 +999,7 @@ struct i2c_master_s *cxd56_i2cbus_initialize(int port)
priv->frequency = 0;
cxd56_i2c_clock_enable(priv->port);
priv->baseFreq = cxd56_get_i2c_baseclock(priv->port);
priv->base_freq = cxd56_get_i2c_baseclock(priv->port);
cxd56_i2c_disable(priv);
+9 -7
View File
@@ -364,7 +364,9 @@ void up_irqinitialize(void)
/* Set the priority of the SVCall interrupt */
#ifdef CONFIG_ARCH_IRQPRIO
/* up_prioritize_irq(CXD56_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
/* up_prioritize_irq(CXD56_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN);
*/
#endif
#ifdef CONFIG_ARMV7M_USEBASEPRI
@@ -402,13 +404,13 @@ void up_irqinitialize(void)
*/
#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI)
{
uint32_t regval;
{
uint32_t regval;
regval = getreg32(NVIC_DEMCR);
regval &= ~NVIC_DEMCR_VCHARDERR;
putreg32(regval, NVIC_DEMCR);
}
regval = getreg32(NVIC_DEMCR);
regval &= ~NVIC_DEMCR_VCHARDERR;
putreg32(regval, NVIC_DEMCR);
}
#endif
/* And finally, enable interrupts */
+62 -52
View File
@@ -163,7 +163,7 @@ struct pmic_temp_mode_s
int high;
};
extern int PM_PmicControl(int cmd, void *arg);
extern int pm_pmic_control(int cmd, void *arg);
/****************************************************************************
* Private Data
@@ -198,6 +198,7 @@ static bool is_notify_registerd(void)
return true;
}
}
return false;
}
@@ -298,7 +299,7 @@ static int pmic_int_handler(int irq, void *context, void *arg)
int cxd56_pmic_get_interrupt_status(uint8_t *status)
{
return PM_PmicControl(PMIC_CMD_INTSTATUS, status);
return pm_pmic_control(PMIC_CMD_INTSTATUS, status);
}
/****************************************************************************
@@ -337,6 +338,7 @@ int cxd56_pmic_set_gpo_reg(uint8_t *setbit0, uint8_t *clrbit0,
uint8_t *setbit1;
uint8_t *clrbit1;
}
arg =
{
.setbit0 = setbit0,
@@ -345,7 +347,7 @@ int cxd56_pmic_set_gpo_reg(uint8_t *setbit0, uint8_t *clrbit0,
.clrbit1 = clrbit1,
};
return PM_PmicControl(PMIC_CMD_GPO, &arg);
return pm_pmic_control(PMIC_CMD_GPO, &arg);
}
/****************************************************************************
@@ -479,6 +481,7 @@ bool cxd56_pmic_get_gpo(uint8_t chset)
{
return true;
}
return false;
}
@@ -512,13 +515,14 @@ int cxd56_pmic_set_loadswitch_reg(uint8_t *setbit, uint8_t *clrbit)
uint8_t *setbit;
uint8_t *clrbit;
}
arg =
{
.setbit = setbit,
.clrbit = clrbit,
};
return PM_PmicControl(PMIC_CMD_LOADSW, &arg);
return pm_pmic_control(PMIC_CMD_LOADSW, &arg);
}
/****************************************************************************
@@ -549,6 +553,7 @@ int cxd56_pmic_set_loadswitch(uint8_t chset, bool value)
{
clrbit = chset;
}
return cxd56_pmic_set_loadswitch_reg(&setbit, &clrbit);
}
@@ -607,13 +612,14 @@ int cxd56_pmic_set_ddc_ldo_reg(uint8_t *setbit, uint8_t *clrbit)
uint8_t *setbit;
uint8_t *clrbit;
}
arg =
{
.setbit = setbit,
.clrbit = clrbit,
};
return PM_PmicControl(PMIC_CMD_DDCLDO, &arg);
return pm_pmic_control(PMIC_CMD_DDCLDO, &arg);
}
/****************************************************************************
@@ -644,6 +650,7 @@ int cxd56_pmic_set_ddc_ldo(uint8_t chset, bool value)
{
clrbit = chset;
}
return cxd56_pmic_set_ddc_ldo_reg(&setbit, &clrbit);
}
@@ -698,10 +705,10 @@ int cxd56_pmic_get_rtc(uint64_t *count)
if (ret) goto error;
do
{
ret = cxd56_pmic_read(PMIC_REG_RRQ_LRQ_STATUS, &data, sizeof(data));
if (ret) goto error;
}
{
ret = cxd56_pmic_read(PMIC_REG_RRQ_LRQ_STATUS, &data, sizeof(data));
if (ret) goto error;
}
while (!(RRQ_TIME_STATE & data));
ret = cxd56_pmic_read(PMIC_REG_RTC, rtc, sizeof(rtc));
@@ -731,7 +738,7 @@ error:
int cxd56_pmic_get_gauge(FAR struct pmic_gauge_s *gauge)
{
return PM_PmicControl(PMIC_CMD_AFE, gauge);
return pm_pmic_control(PMIC_CMD_AFE, gauge);
}
/****************************************************************************
@@ -741,7 +748,7 @@ int cxd56_pmic_get_gauge(FAR struct pmic_gauge_s *gauge)
* Get lower limit of voltage for system to be running.
*
* Input Parameter:
* voltage - Lower limit voltage (mV)
* voltage - Lower limit voltage (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
@@ -750,7 +757,7 @@ int cxd56_pmic_get_gauge(FAR struct pmic_gauge_s *gauge)
int cxd56_pmic_getlowervol(FAR int *voltage)
{
return PM_PmicControl(PMIC_CMD_GETVSYS, voltage);
return pm_pmic_control(PMIC_CMD_GETVSYS, voltage);
}
/****************************************************************************
@@ -760,7 +767,7 @@ int cxd56_pmic_getlowervol(FAR int *voltage)
* Set lower limit of voltage for system to be running.
*
* Input Parameter:
* voltage - Lower limit voltage (mV)
* voltage - Lower limit voltage (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
@@ -769,7 +776,7 @@ int cxd56_pmic_getlowervol(FAR int *voltage)
int cxd56_pmic_setlowervol(int voltage)
{
return PM_PmicControl(PMIC_CMD_SETVSYS, (void *)voltage);
return pm_pmic_control(PMIC_CMD_SETVSYS, (void *)voltage);
}
/****************************************************************************
@@ -779,7 +786,7 @@ int cxd56_pmic_setlowervol(int voltage)
* Get voltage for the low battery notification
*
* Input Parameter:
* voltage - Low battery voltage (mV)
* voltage - Low battery voltage (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
@@ -788,7 +795,7 @@ int cxd56_pmic_setlowervol(int voltage)
int cxd56_pmic_getnotifyvol(FAR int *voltage)
{
return PM_PmicControl(PMIC_CMD_GETPREVSYS, voltage);
return pm_pmic_control(PMIC_CMD_GETPREVSYS, voltage);
}
/****************************************************************************
@@ -798,7 +805,7 @@ int cxd56_pmic_getnotifyvol(FAR int *voltage)
* Set voltage for the low battery notification
*
* Input Parameter:
* voltage - Low battery voltage (mV)
* voltage - Low battery voltage (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
@@ -807,7 +814,7 @@ int cxd56_pmic_getnotifyvol(FAR int *voltage)
int cxd56_pmic_setnotifyvol(int voltage)
{
return PM_PmicControl(PMIC_CMD_SETPREVSYS, (void *)voltage);
return pm_pmic_control(PMIC_CMD_SETPREVSYS, (void *)voltage);
}
/****************************************************************************
@@ -817,7 +824,7 @@ int cxd56_pmic_setnotifyvol(int voltage)
* Get charge voltage
*
* Input Parameter:
* voltage - Possible values are every 50 between 4000 to 4400 (mV)
* voltage - Possible values are every 50 between 4000 to 4400 (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
@@ -829,7 +836,7 @@ int cxd56_pmic_getchargevol(FAR int *voltage)
int val;
int ret;
ret = PM_PmicControl(PMIC_CMD_GET_CHG_VOLTAGE, &val);
ret = pm_pmic_control(PMIC_CMD_GET_CHG_VOLTAGE, &val);
if (ret)
{
return -EIO;
@@ -837,7 +844,7 @@ int cxd56_pmic_getchargevol(FAR int *voltage)
val &= 0xf;
/* Convert register value to actual voltage (mV) */
/* Convert register value to actual voltage (mv) */
if (val <= 8)
{
@@ -858,7 +865,7 @@ int cxd56_pmic_getchargevol(FAR int *voltage)
* Set charge voltage
*
* Input Parameter:
* voltage - Avalable values are every 50 between 4000 to 4400 (mV)
* voltage - Avalable values are every 50 between 4000 to 4400 (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
@@ -875,16 +882,17 @@ int cxd56_pmic_setchargevol(int voltage)
{
return -EINVAL;
}
if (voltage % 50)
{
return -EINVAL;
}
/* Register setting values are every 50mV between 4.0V to 4.4V */
/* Register setting values are every 50mv between 4.0V to 4.4V */
val = (voltage - 4000) / 50;
return PM_PmicControl(PMIC_CMD_SET_CHG_VOLTAGE, (void *)val);
return pm_pmic_control(PMIC_CMD_SET_CHG_VOLTAGE, (void *)val);
}
/****************************************************************************
@@ -907,7 +915,7 @@ int cxd56_pmic_getchargecurrent(FAR int *current)
int val;
int ret;
ret = PM_PmicControl(PMIC_CMD_GET_CHG_CURRENT, &val);
ret = pm_pmic_control(PMIC_CMD_GET_CHG_CURRENT, &val);
if (ret)
{
return ret;
@@ -975,7 +983,7 @@ int cxd56_pmic_setchargecurrent(int current)
return -EFAULT;
}
return PM_PmicControl(PMIC_CMD_SET_CHG_CURRENT, (void *)val);
return pm_pmic_control(PMIC_CMD_SET_CHG_CURRENT, (void *)val);
}
/****************************************************************************
@@ -994,7 +1002,7 @@ int cxd56_pmic_setchargecurrent(int current)
int cxd56_pmic_getporttype(FAR int *porttype)
{
return PM_PmicControl(PMIC_CMD_GET_USB_PORT_TYPE, porttype);
return pm_pmic_control(PMIC_CMD_GET_USB_PORT_TYPE, porttype);
}
/****************************************************************************
@@ -1019,7 +1027,7 @@ int cxd56_pmic_getchargestate(uint8_t *state)
/* Update charge state */
ret = PM_PmicControl(PMIC_CMD_AFE, &arg);
ret = pm_pmic_control(PMIC_CMD_AFE, &arg);
if (ret)
{
return ret;
@@ -1027,7 +1035,7 @@ int cxd56_pmic_getchargestate(uint8_t *state)
/* Get actual charging state (CNT_USB1) */
ret = PM_PmicControl(PMIC_CMD_GET_CHG_STATE, &val);
ret = pm_pmic_control(PMIC_CMD_GET_CHG_STATE, &val);
*state = val & 0xff;
return ret;
@@ -1040,20 +1048,20 @@ int cxd56_pmic_getchargestate(uint8_t *state)
* Set threshold voltage against full charge for automatic restart charging.
*
* Input Parameter:
* mV - Available values are -400, -350, -300 and -250 (mV)
* mv - Available values are -400, -350, -300 and -250 (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
*
****************************************************************************/
int cxd56_pmic_setrechargevol(int mV)
int cxd56_pmic_setrechargevol(int mv)
{
int val;
/* Convert voltage to register value */
switch (mV)
switch (mv)
{
case -400:
val = PMIC_CHG_DET_MINUS400;
@@ -1075,7 +1083,7 @@ int cxd56_pmic_setrechargevol(int mV)
return -EINVAL;
}
return PM_PmicControl(PMIC_CMD_SET_RECHG_VOLTAGE, (void *)val);
return pm_pmic_control(PMIC_CMD_SET_RECHG_VOLTAGE, (void *)val);
}
/****************************************************************************
@@ -1085,19 +1093,19 @@ int cxd56_pmic_setrechargevol(int mV)
* Get threshold voltage against full charge for automatic restart charging.
*
* Input Parameter:
* mV - Possible values are -400, -350, -300 and -250 (mV)
* mv - Possible values are -400, -350, -300 and -250 (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
*
****************************************************************************/
int cxd56_pmic_getrechargevol(FAR int *mV)
int cxd56_pmic_getrechargevol(FAR int *mv)
{
int val;
int ret;
ret = PM_PmicControl(PMIC_CMD_GET_RECHG_VOLTAGE, &val);
ret = pm_pmic_control(PMIC_CMD_GET_RECHG_VOLTAGE, &val);
if (ret)
{
return ret;
@@ -1108,19 +1116,19 @@ int cxd56_pmic_getrechargevol(FAR int *mV)
switch (val)
{
case PMIC_CHG_DET_MINUS400:
*mV = -400;
*mv = -400;
break;
case PMIC_CHG_DET_MINUS350:
*mV = -350;
*mv = -350;
break;
case PMIC_CHG_DET_MINUS300:
*mV = -300;
*mv = -300;
break;
case PMIC_CHG_DET_MINUS250:
*mV = -250;
*mv = -250;
break;
default:
@@ -1177,7 +1185,7 @@ int cxd56_pmic_setchargecompcurrent(int current)
break;
}
return PM_PmicControl(PMIC_CMD_SET_CHG_IFIN, (void *)val);
return pm_pmic_control(PMIC_CMD_SET_CHG_IFIN, (void *)val);
}
/****************************************************************************
@@ -1199,7 +1207,7 @@ int cxd56_pmic_getchargecompcurrent(FAR int *current)
int val;
int ret;
ret = PM_PmicControl(PMIC_CMD_GET_CHG_IFIN, &val);
ret = pm_pmic_control(PMIC_CMD_GET_CHG_IFIN, &val);
if (ret)
{
return ret;
@@ -1257,7 +1265,7 @@ int cxd56_pmic_gettemptable(FAR struct pmic_temp_table_s *table)
{
/* SET_T60 (70h) - SET_T0_2 (78h) */
return PM_PmicControl(PMIC_CMD_GET_CHG_TEMPERATURE_TABLE, table);
return pm_pmic_control(PMIC_CMD_GET_CHG_TEMPERATURE_TABLE, table);
}
/****************************************************************************
@@ -1277,7 +1285,7 @@ int cxd56_pmic_gettemptable(FAR struct pmic_temp_table_s *table)
int cxd56_pmic_settemptable(FAR struct pmic_temp_table_s *table)
{
return PM_PmicControl(PMIC_CMD_SET_CHG_TEMPERATURE_TABLE, table);
return pm_pmic_control(PMIC_CMD_SET_CHG_TEMPERATURE_TABLE, table);
}
/****************************************************************************
@@ -1330,7 +1338,7 @@ int cxd56_pmic_setchargemode(int low, int high)
return -EINVAL;
}
return PM_PmicControl(PMIC_CMD_SET_CHG_TEMPERATURE_MODE, &arg);
return pm_pmic_control(PMIC_CMD_SET_CHG_TEMPERATURE_MODE, &arg);
}
/****************************************************************************
@@ -1357,7 +1365,7 @@ int cxd56_pmic_getchargemode(FAR int *low, FAR int *high)
struct pmic_temp_mode_s arg;
int ret;
ret = PM_PmicControl(PMIC_CMD_GET_CHG_TEMPERATURE_MODE, &arg);
ret = pm_pmic_control(PMIC_CMD_GET_CHG_TEMPERATURE_MODE, &arg);
if (ret)
{
return ret;
@@ -1376,22 +1384,22 @@ int cxd56_pmic_getchargemode(FAR int *low, FAR int *high)
int cxd56_pmic_monitor_enable(FAR struct pmic_mon_s *ptr)
{
return PM_PmicControl(PMIC_CMD_POWER_MONITOR_ENABLE, ptr);
return pm_pmic_control(PMIC_CMD_POWER_MONITOR_ENABLE, ptr);
}
int cxd56_pmic_monitor_status(FAR struct pmic_mon_status_s *ptr)
{
return PM_PmicControl(PMIC_CMD_POWER_MONITOR_STATUS, ptr);
return pm_pmic_control(PMIC_CMD_POWER_MONITOR_STATUS, ptr);
}
int cxd56_pmic_monitor_set(FAR struct pmic_mon_set_s *ptr)
{
return PM_PmicControl(PMIC_CMD_POWER_MONITOR_SET, ptr);
return pm_pmic_control(PMIC_CMD_POWER_MONITOR_SET, ptr);
}
int cxd56_pmic_monitor_get(FAR struct pmic_mon_log_s *ptr)
{
return PM_PmicControl(PMIC_CMD_POWER_MONITOR_GET, ptr);
return pm_pmic_control(PMIC_CMD_POWER_MONITOR_GET, ptr);
}
#endif
@@ -1485,6 +1493,7 @@ int cxd56_pmic_read(uint8_t addr, void *buf, uint32_t size)
void *buf;
uint32_t size;
}
arg =
{
.addr = addr,
@@ -1492,7 +1501,7 @@ int cxd56_pmic_read(uint8_t addr, void *buf, uint32_t size)
.size = size,
};
return PM_PmicControl(PMIC_CMD_READ, &arg);
return pm_pmic_control(PMIC_CMD_READ, &arg);
}
/****************************************************************************
@@ -1519,6 +1528,7 @@ int cxd56_pmic_write(uint8_t addr, void *buf, uint32_t size)
void *buf;
uint32_t size;
}
arg =
{
.addr = addr,
@@ -1526,7 +1536,7 @@ int cxd56_pmic_write(uint8_t addr, void *buf, uint32_t size)
.size = size,
};
return PM_PmicControl(PMIC_CMD_WRITE, &arg);
return pm_pmic_control(PMIC_CMD_WRITE, &arg);
}
#endif /* CONFIG_CXD56_PMIC */
File diff suppressed because it is too large Load Diff
@@ -39,22 +39,23 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_BACKUPMEM_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_BACKUPMEM_H
/********************************************************************************************
/***************************************************************************
* Included Files
********************************************************************************************/
***************************************************************************/
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
#define CXD56_BKUP_SRAM_BASE (0x04400000)
#define BKUP ((backup_info_t*)CXD56_BKUP_SRAM_BASE)
/********************************************************************************************
/****************************************************************************
* Public Types
********************************************************************************************/
****************************************************************************/
typedef struct {
typedef struct
{
uint32_t rcosc_clock; /* 0x04400000 ~ 0x04400003 */
uint32_t chip_revision; /* 0x04400004 ~ 0x04400007 */
uint32_t sbl_version; /* 0x04400008 ~ 0x0440000b */
@@ -71,17 +72,17 @@ typedef struct {
uint8_t power_monitor_data[0x420]; /* 0x04400100 ~ 0x0440051f */
uint8_t reserved1[2 * 1024 - 0x520]; /* 0x04400520 ~ 0x044007ff (2KB-0x520)*/
uint8_t gnss_backup_data[24 * 1024]; /* 0x04400800 ~ 0x044067ff (24KB) */
uint8_t gnss_pvtlog_data[ 4 * 1024]; /* 0x04406800 ~ 0x044077ff (4KB) */
uint8_t reserved_romcode[ 2 * 1024]; /* 0x04407800 ~ 0x04407fff (2KB) */
uint8_t gnss_pvtlog_data[4 * 1024]; /* 0x04406800 ~ 0x044077ff (4KB) */
uint8_t reserved_romcode[2 * 1024]; /* 0x04407800 ~ 0x04407fff (2KB) */
uint8_t log[32 * 1024]; /* 0x04408000 ~ 0x0440ffff (32KB) */
} backup_info_t;
/********************************************************************************************
/****************************************************************************
* Public Data
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
/****************************************************************************
* Public Functions
********************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_BACKUPMEM_H */
@@ -39,15 +39,15 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_PINCONFIG_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_PINCONFIG_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
/* Set the standard pinconf macro Definitions
* - If it's used as input pin, then set 1. Otherwise set 0 (default).
@@ -201,6 +201,7 @@
* i d Z m l
* n e I A l
*/
#define PINCONF_I2C4_BCK_GPIO PINCONF(PIN_I2C4_BCK, 0, 0, 0, 0)
#define PINCONF_I2C4_BCK PINCONF(PIN_I2C4_BCK, 1, 1, 0, 0)
#define PINCONF_I2C4_BDT_GPIO PINCONF(PIN_I2C4_BDT, 0, 0, 0, 0)
@@ -491,6 +492,7 @@
/* Reference set of multiple pinconfigs
*
*/
#define PINCONFS_I2C4_GPIO { PINCONF_I2C4_BCK_GPIO, PINCONF_I2C4_BDT_GPIO }
#define PINCONFS_I2C4 { PINCONF_I2C4_BCK, PINCONF_I2C4_BDT }
#define PINCONFS_PMIC_INT_GPIO { PINCONF_PMIC_INT_GPIO }
@@ -39,15 +39,15 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_TOPREG_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_TOPREG_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
#define CXD56_TOPREG_PWD_CTL (CXD56_TOPREG_BASE + 0x0000)
#define CXD56_TOPREG_ANA_PW_CTL (CXD56_TOPREG_BASE + 0x0004)
@@ -377,6 +377,7 @@
#define CXD56_TOPREG_GP_USB_VBUSINT (CXD56_TOPREG_BASE + 0x2188)
/* Topreg sub */
#define CXD56_TOPREG_PSW_CHECK (CXD56_TOPREG_SUB_BASE + 0x0000)
#define CXD56_TOPREG_UNEXP_PSW_DIG (CXD56_TOPREG_SUB_BASE + 0x0004)
#define CXD56_TOPREG_UNEXP_PSW_ANA (CXD56_TOPREG_SUB_BASE + 0x0008)
+4 -4
View File
@@ -39,16 +39,16 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_CRG_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_CRG_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
#define CXD56_CRG_GEAR_AHB (CXD56_CRG_BASE + 0x0000)
#define CXD56_CRG_GEAR_IMG_UART (CXD56_CRG_BASE + 0x0004)
+5 -6
View File
@@ -36,17 +36,17 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_RTC_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_RTC_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
#include "hardware/cxd5602_memorymap.h"
/****************************************************************************************
/****************************************************************************
* Pre-processor Definitions
****************************************************************************************/
****************************************************************************/
/* Register offsets *********************************************************************/
/* Register offsets *********************************************************/
#define RTC_WRREGPOSTCNT (0x0)
#define RTC_WRREGPRECNT (0x4)
@@ -136,5 +136,4 @@
#define RTCREG_ALM_ERREN_MASK (1u << 16)
#define RTCREG_ALM_ERRDBG_MASK (1u << 31)
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_RTC_H */
+12 -12
View File
@@ -36,20 +36,20 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_TIMER_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_TIMER_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/cxd56xx/chip.h>
#include "hardware/cxd5602_memorymap.h"
/****************************************************************************************
/****************************************************************************
* Pre-processor Definitions
****************************************************************************************/
****************************************************************************/
/* Register addresses *******************************************************************/
/* Register addresses *******************************************************/
#define CXD56_TIMER0_BASE (CXD56_TIMER_BASE)
#define CXD56_TIMER1_BASE (CXD56_TIMER_BASE + 0x0020)
@@ -71,7 +71,7 @@
#define CXD56_TIMER_PCELLID2 (0x0FF8) /* PrimeCell ID2 register [RO] */
#define CXD56_TIMER_PCELLID3 (0x0FFC) /* PrimeCell ID3 register [RO] */
/* Register bit definitions *************************************************************/
/* Register bit definitions *************************************************/
/* Control Register */
@@ -102,16 +102,16 @@
#define TIMERITOP_TIMINT1 (0x1u << 0)
#define TIMERITOP_TIMINT2 (0x1u << 1)
/****************************************************************************************
/****************************************************************************
* Public Types
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Data
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Functions
****************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_TIMER_H */
+2 -1
View File
@@ -148,7 +148,8 @@
* Public Types
****************************************************************************/
struct dma_descriptor_s {
struct dma_descriptor_s
{
volatile void * volatile srcend;
volatile void * volatile dstend;
volatile uint32_t ctrl;
+12 -12
View File
@@ -36,19 +36,19 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_WDT_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_WDT_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
#include <arch/cxd56xx/chip.h>
#include "hardware/cxd5602_memorymap.h"
/****************************************************************************************
/****************************************************************************
* Pre-processor Definitions
****************************************************************************************/
****************************************************************************/
/* WDT register addresses ***************************************************************/
/* WDT register addresses ***************************************************/
#define CXD56_WDT_WDOGLOAD (CXD56_WDOG_BASE + 0x0000) /* Load register */
#define CXD56_WDT_WDOGVALUE (CXD56_WDOG_BASE + 0x0004) /* Value register [RO] */
@@ -68,7 +68,7 @@
#define CXD56_WDT_WDOGPCELLID2 (CXD56_WDOG_BASE + 0x0FF8) /* PrimeCell ID2 register [RO] */
#define CXD56_WDT_WDOGPCELLID3 (CXD56_WDOG_BASE + 0x0FFC) /* PrimeCell ID3 register [RO] */
/* WDT register bit definitions *********************************************************/
/* WDT register bit definitions *********************************************/
/* Control Register */
@@ -93,16 +93,16 @@
#define WDOGITOP_WDOGINT (0x1 << 1) /* output interrupt */
#define WDOGITOP_WDOGRES (0x1 << 0) /* output reset */
/****************************************************************************************
/****************************************************************************
* Public Types
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Data
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Functions
****************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_WDT_H */
@@ -49,6 +49,14 @@
#include "cxd56_i2c.h"
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
#if defined(CONFIG_I2C) && defined(CONFIG_SENSORS_AK09912)
int board_ak09912_initialize(FAR const char *devpath, int bus)
@@ -56,6 +56,14 @@
# define MAG_NR_SEQS 1
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
#ifdef CONFIG_SENSORS_AK09912_SCU
int board_ak09912_initialize(FAR const char *devpath, int bus)
@@ -505,6 +505,7 @@ CXD56_AUDIO_ECODE cxd56_audio_en_deq(FAR cxd56_audio_deq_coef_t *coef)
{
g_pwon_param.deq.coef = coef;
}
if (g_status == CXD56_AUDIO_POWER_STATE_OFF)
{
return ret;
@@ -673,6 +674,7 @@ CXD56_AUDIO_ECODE cxd56_audio_dis_output(void)
return ret;
}
}
#endif
return ret;
}
@@ -989,6 +991,7 @@ CXD56_AUDIO_ECODE cxd56_audio_set_datapath(cxd56_audio_signal_t sig,
return ret;
}
}
return ret;
}
@@ -891,6 +891,7 @@ CXD56_AUDIO_ECODE cxd56_audio_ac_reg_checkid(void)
{
return CXD56_AUDIO_ECODE_REG_AC_REVID;
}
if (read_ac_reg(RI_DEVICEID) != AC_DEVICEID)
{
return CXD56_AUDIO_ECODE_REG_AC_DEVID;
@@ -944,7 +945,7 @@ void cxd56_audio_ac_reg_poweron_sdes(void)
CXD56_AUDIO_ECODE cxd56_audio_ac_reg_set_micmode(uint8_t mic_mode)
{
switch(mic_mode)
switch (mic_mode)
{
case CXD56_AUDIO_CFG_MIC_MODE_128FS:
write_ac_reg(RI_FS_FS, 0);
@@ -1066,6 +1067,7 @@ CXD56_AUDIO_ECODE cxd56_audio_ac_reg_set_alcspc(void)
{
return ret;
}
write_ac_reg(RI_ALC_EN, 1);
}
else if (CXD56_AUDIO_CFG_ALCSPC == CXD56_AUDIO_CFG_ALCSPC_SPC)
@@ -1077,6 +1079,7 @@ CXD56_AUDIO_ECODE cxd56_audio_ac_reg_set_alcspc(void)
{
return ret;
}
write_ac_reg(RI_SPC_EN, 1);
}
@@ -1196,15 +1199,18 @@ CXD56_AUDIO_ECODE cxd56_audio_ac_reg_poweron_cic(uint8_t mic_in,
write_ac_reg(RI_CIC4IN_SEL, 0);
write_ac_reg(RI_HPF4_MODE, 1);
}
if (cic_num > 2)
{
if (read_ac_reg(RI_PDN_AMICEXT) == 1)
{
write_ac_reg(RI_PDN_AMICEXT, 0);
}
write_ac_reg(RI_CIC3IN_SEL, 0);
write_ac_reg(RI_HPF3_MODE, 1);
}
if (cic_num > 1)
{
write_ac_reg(RI_PDN_AMIC2, 0);
@@ -1212,6 +1218,7 @@ CXD56_AUDIO_ECODE cxd56_audio_ac_reg_poweron_cic(uint8_t mic_in,
write_ac_reg(RI_HPF2_MODE, 1);
write_ac_reg(RI_CIC2_GAIN_MODE, 1);
}
if (cic_num > 0)
{
write_ac_reg(RI_PDN_AMIC1, 0);
@@ -1232,17 +1239,20 @@ CXD56_AUDIO_ECODE cxd56_audio_ac_reg_poweron_cic(uint8_t mic_in,
write_ac_reg(RI_CIC4IN_SEL, 1);
write_ac_reg(RI_HPF4_MODE, 1);
}
if (cic_num > 2)
{
write_ac_reg(RI_CIC3IN_SEL, 1);
write_ac_reg(RI_HPF3_MODE, 1);
}
if (cic_num > 1)
{
write_ac_reg(RI_CIC2IN_SEL, 1);
write_ac_reg(RI_HPF2_MODE, 1);
write_ac_reg(RI_CIC2_GAIN_MODE, 1);
}
if (cic_num > 0)
{
write_ac_reg(RI_CIC1IN_SEL, 1);
File diff suppressed because it is too large Load Diff
@@ -105,6 +105,7 @@ static void wait_mic_boot_finish(void)
{
return;
}
uint64_t time = (uint64_t)end.tv_sec * 1000 +
(uint64_t)end.tv_nsec / 1000000 -
g_mic_boot_start_time;
@@ -231,6 +232,7 @@ CXD56_AUDIO_ECODE cxd56_audio_analog_poweroff_input(void)
{
return ret;
}
clear_mic_boot_time();
#endif
File diff suppressed because it is too large Load Diff
@@ -48,164 +48,164 @@
typedef enum
{
BCA_Mic_In_start_adr,
BCA_Mic_In_sample_no,
BCA_Mic_In_rtd_trg,
BCA_Mic_In_nointr,
BCA_Mic_In_bitwt,
BCA_Mic_In_ch8_sel,
BCA_Mic_In_ch7_sel,
BCA_Mic_In_ch6_sel,
BCA_Mic_In_ch5_sel,
BCA_Mic_In_ch4_sel,
BCA_Mic_In_ch3_sel,
BCA_Mic_In_ch2_sel,
BCA_Mic_In_ch1_sel,
BCA_Mic_In_start,
BCA_Mic_In_error_setting,
BCA_Mic_In_monbuf,
BCA_I2s1_In_start_adr,
BCA_I2s1_In_sample_no,
BCA_I2s1_In_rtd_trg,
BCA_I2s1_In_nointr,
BCA_I2s1_In_bitwt,
BCA_I2s1_In_ch2_sel,
BCA_I2s1_In_ch1_sel,
BCA_I2s1_In_Mon_start,
BCA_I2s1_In_Mon_error_setting,
BCA_I2s1_In_Mon_monbuf,
BCA_I2s2_In_start_adr,
BCA_I2s2_In_sample_no,
BCA_I2s2_In_rtd_trg,
BCA_I2s2_In_nointr,
BCA_I2s2_In_bitwt,
BCA_I2s2_In_ch2_sel,
BCA_I2s2_In_ch1_sel,
BCA_I2s2_In_Mon_start,
BCA_I2s2_In_Mon_error_setting,
BCA_I2s2_In_Mon_monbuf,
BCA_I2s1_Out_start_adr,
BCA_I2s1_Out_sample_no,
BCA_I2s1_Out_rtd_trg,
BCA_I2s1_Out_nointr,
BCA_I2s1_Out_bitwt,
BCA_I2s1_Out_sd1_r_sel,
BCA_I2s1_Out_sd1_l_sel,
BCA_I2s1_Out_Mon_start,
BCA_I2s1_Out_Mon_error_setting,
BCA_I2s1_Out_Mon_monbuf,
BCA_I2s2_Out_start_adr,
BCA_I2s2_Out_sample_no,
BCA_I2s2_Out_rtd_trg,
BCA_I2s2_Out_nointr,
BCA_I2s2_Out_bitwt,
BCA_I2s2_Out_sd1_r_sel,
BCA_I2s2_Out_sd1_l_sel,
BCA_I2s2_Out_Mon_start,
BCA_I2s2_Out_Mon_error_setting,
BCA_I2s2_Out_Mon_monbuf,
BCA_I2s_ensel,
BCA_Mic_In_prdat_u,
BCA_I2s1_In_prdat_u,
BCA_I2s2_In_prdat_u,
BCA_I2s1_Out_prdat_d,
BCA_I2s2_Out_prdat_d,
BCA_Mic_Int_Ctrl_done_mic,
BCA_Mic_Int_Ctrl_err_mic,
BCA_Mic_Int_Ctrl_smp_mic,
BCA_Mic_Int_Ctrl_cmb_mic,
BCA_I2s1_Int_Ctrl_done_i2so,
BCA_I2s1_Int_Ctrl_err_i2so,
BCA_I2s1_Int_Ctrl_done_i2si,
BCA_I2s1_Int_Ctrl_err_i2si,
BCA_I2s1_Int_Ctrl_smp_i2s,
BCA_I2s1_Int_Ctrl_cmb_i2s,
BCA_I2s2_Int_Ctrl_done_i2so,
BCA_I2s2_Int_Ctrl_err_i2so,
BCA_I2s2_Int_Ctrl_done_i2si,
BCA_I2s2_Int_Ctrl_err_i2si,
BCA_I2s2_Int_Ctrl_smp_i2s,
BCA_I2s2_Int_Ctrl_cmb_i2s,
BCA_Mic_Int_Mask_done_mic,
BCA_Mic_Int_Mask_err_mic,
BCA_Mic_Int_Mask_smp_mic,
BCA_Mic_Int_Mask_cmb_mic,
BCA_Mic_Int_Mask_nostpmsk,
BCA_Mic_Int_Mask_srst_mic,
BCA_I2s1_Int_Mask_done_i2so,
BCA_I2s1_Int_Mask_err_i2so,
BCA_I2s1_Int_Mask_done_i2si,
BCA_I2s1_Int_Mask_err_i2si,
BCA_I2s1_Int_Mask_smp_i2s,
BCA_I2s1_Int_Mask_cmb_i2s,
BCA_I2s1_Int_Mask_nostpmsk,
BCA_I2s1_Int_Mask_srst_i2s,
BCA_I2s2_Int_Mask_done_i2so,
BCA_I2s2_Int_Mask_err_i2so,
BCA_I2s2_Int_Mask_done_i2si,
BCA_I2s2_Int_Mask_err_i2si,
BCA_I2s2_Int_Mask_smp_i2s,
BCA_I2s2_Int_Mask_cmb_i2s,
BCA_I2s2_Int_Mask_nostpmsk,
BCA_I2s2_Int_Mask_srst_i2s,
BCA_Int_m_hresp_err,
BCA_Int_m_i2s1_bck_err1,
BCA_Int_m_i2s1_bck_err2,
BCA_Int_m_anc_faint,
BCA_Int_m_ovf_smasl,
BCA_Int_m_ovf_smasr,
BCA_Int_m_ovf_dnc1l,
BCA_Int_m_ovf_dnc1r,
BCA_Int_m_ovf_dnc2l,
BCA_Int_m_ovf_dnc2r,
BCA_Int_clr_hresp_err,
BCA_Int_clr_i2s1_bck_err1,
BCA_Int_clr_i2S1_bck_err2,
BCA_Int_clr_anc_faint,
BCA_Int_clr_ovf_smasl,
BCA_Int_clr_ovf_smasr,
BCA_Int_clr_ovf_dnc1l,
BCA_Int_clr_ovf_dnc1r,
BCA_Int_clr_ovf_dnc2l,
BCA_Int_clr_ovf_dnc2r,
BCA_Int_hresp_err,
BCA_Int_i2s_bck_err1,
BCA_Int_i2s_bck_err2,
BCA_Int_anc_faint,
BCA_Int_ovf_smasl,
BCA_Int_ovf_smasr,
BCA_Int_ovf_dnc1l,
BCA_Int_ovf_dnc1r,
BCA_Int_ovf_dnc2l,
BCA_Int_ovf_dnc2r,
BCA_Dbg_Mic_ch1_data,
BCA_Dbg_Mic_ch2_data,
BCA_Dbg_Mic_ch3_data,
BCA_Dbg_Mic_ch4_data,
BCA_Dbg_Mic_ch5_data,
BCA_Dbg_Mic_ch6_data,
BCA_Dbg_Mic_ch7_data,
BCA_Dbg_Mic_ch8_data,
BCA_Dbg_I2s1_u_ch1_data,
BCA_Dbg_I2s1_u_ch2_data,
BCA_Dbg_I2s1_d_ch1_data,
BCA_Dbg_I2s1_d_ch2_data,
BCA_Dbg_I2s2_u_ch1_data,
BCA_Dbg_I2s2_u_ch2_data,
BCA_Dbg_I2s2_d_ch1_data,
BCA_Dbg_I2s2_d_ch2_data,
BCA_Dbg_Ctrl_mic_dbg_en,
BCA_Dbg_Ctrl_I2s1_dbg_u_en,
BCA_Dbg_Ctrl_I2s1_dbg_d_en,
BCA_Dbg_Ctrl_I2s2_dbg_u_en,
BCA_Dbg_Ctrl_I2s2_dbg_d_en,
BCA_Clk_En_ahbmstr_mic_en,
BCA_Clk_En_ahbmstr_I2s1_en,
BCA_Clk_En_ahbmstr_I2s2_en,
BCA_Mclk_Mon_thresh,
AHB_Master_Mic_Mask,
AHB_Master_I2s1_Mask,
AHB_Master_I2s2_Mask,
BCA_MIC_IN_START_ADR,
BCA_MIC_IN_SAMPLE_NO,
BCA_MIC_IN_RTD_TRG,
BCA_MIC_IN_NOINTR,
BCA_MIC_IN_BITWT,
BCA_MIC_IN_CH8_SEL,
BCA_MIC_IN_CH7_SEL,
BCA_MIC_IN_CH6_SEL,
BCA_MIC_IN_CH5_SEL,
BCA_MIC_IN_CH4_SEL,
BCA_MIC_IN_CH3_SEL,
BCA_MIC_IN_CH2_SEL,
BCA_MIC_IN_CH1_SEL,
BCA_MIC_IN_START,
BCA_MIC_IN_ERROR_SETTING,
BCA_MIC_IN_MONBUF,
BCA_I2S1_IN_START_ADR,
BCA_I2S1_IN_SAMPLE_NO,
BCA_I2S1_IN_RTD_TRG,
BCA_I2S1_IN_NOINTR,
BCA_I2S1_IN_BITWT,
BCA_I2S1_IN_CH2_SEL,
BCA_I2S1_IN_CH1_SEL,
BCA_I2S1_IN_MON_START,
BCA_I2S1_IN_MON_ERROR_SETTING,
BCA_I2S1_IN_MON_MONBUF,
BCA_I2S2_IN_START_ADR,
BCA_I2S2_IN_SAMPLE_NO,
BCA_I2S2_IN_RTD_TRG,
BCA_I2S2_IN_NOINTR,
BCA_I2S2_IN_BITWT,
BCA_I2S2_IN_CH2_SEL,
BCA_I2S2_IN_CH1_SEL,
BCA_I2S2_IN_MON_START,
BCA_I2S2_IN_MON_ERROR_SETTING,
BCA_I2S2_IN_MON_MONBUF,
BCA_I2S1_OUT_START_ADR,
BCA_I2S1_OUT_SAMPLE_NO,
BCA_I2S1_OUT_RTF_TRG,
BCA_I2S1_OUT_NOINTR,
BCA_I2S1_OUT_BITWT,
BCA_I2S1_OUT_SD1_R_SEL,
BCA_I2S1_OUT_SD1_L_SEL,
BCA_I2S1_OUT_MON_START,
BCA_I2S1_OUT_MON_ERROR_SETTING,
BCA_I2S1_OUT_MON_MONBUF,
BCA_I2S2_OUT_START_ADR,
BCA_I2S2_OUT_SAMPLE_NO,
BCA_I2S2_OUT_RTF_TRG,
BCA_I2S2_OUT_NOINTR,
BCA_I2S2_OUT_BITWT,
BCA_I2S2_OUT_SD1_R_SEL,
BCA_I2S2_OUT_SD1_L_SEL,
BCA_I2S2_OUT_MON_START,
BCA_I2S2_OUT_MON_ERROR_SETTING,
BCA_I2S2_OUT_MON_MONBUF,
BCA_I2S_ENSEL,
BCA_MIC_IN_PRDAT_U,
BCA_I2S1_IN_PRDAT_U,
BCA_I2S2_IN_PRDAT_U,
BCA_I2S1_OUT_PRDAT_D,
BCA_I2S2_OUT_PRDAT_D,
BCA_MIC_INT_CTRL_DONE_MIC,
BCA_MIC_INT_CTRL_ERR_MIC,
BCA_MIC_INT_CTRL_SMP_MIC,
BCA_MIC_INT_CTRL_CMB_MIC,
BCA_I2S1_INT_CTRL_DONE_I2SO,
BCA_I2S1_INT_CTRL_ERR_I2SO,
BCA_I2S1_INT_CTRL_DONE_I2SI,
BCA_I2S1_INT_CTRL_ERR_I2SI,
BCA_I2S1_INT_CTRL_SMP_I2S
BCA_I2S1_INT_CTRL_CMB_I2S,
BCA_I2S2_INT_CTRL_DONE_I2SO,
BCA_I2S2_INT_CTRL_ERR_I2SO,
BCA_I2S2_INT_CTRL_DONE_I2SI,
BCA_I2S2_INT_CTRL_ERR_I2SI,
BCA_I2S2_INT_CTRL_SMP_I2S
BCA_I2S2_INT_CTRL_CMB_I2S,
BCA_MIC_INT_MASK_DONE_MIC,
BCA_MIC_INT_MASK_ERR_MIC,
BCA_MIC_INT_MASK_SMP_MIC,
BCA_MIC_INT_MASK_CMB_MIC,
BCA_MIC_INT_MASK_NOSTPMSK,
BCA_MIC_INT_MASK_SRST_MIC,
BCA_I2S1_INT_MASK_DONE_I2SO,
BCA_I2S1_INT_MASK_ERR_I2SO,
BCA_I2S1_INT_MASK_DONE_I2SI,
BCA_I2S1_INT_MASK_ERR_I2SI,
BCA_I2S1_INT_MASK_SMP_I2S
BCA_I2S1_INT_MASK_CMB_I2S,
BCA_I2S1_INT_MASK_NOSTPMSK,
BCA_I2S1_INT_MASK_SRST_I2S,
BCA_I2S2_INT_MASK_DONE_I2SO,
BCA_I2S2_INT_MASK_ERR_I2SO,
BCA_I2S2_INT_MASK_DONE_I2SI,
BCA_I2S2_INT_MASK_ERR_I2SI,
BCA_I2S2_INT_MASK_SMP_I2S
BCA_I2S2_INT_MASK_CMB_I2S,
BCA_I2S2_INT_MASK_NOSTPMSK,
BCA_I2S2_INT_MASK_SRST_I2S,
BCA_INT_M_HRESP_ERR,
BCA_INT_M_I2S1_BCL_ERR1,
BCA_INT_M_I2S1_BCL_ERR2,
BCA_INT_M_ANC_FAINT,
BCA_INT_M_OVF_SMASL,
BCA_INT_M_OVF_SMASR,
BCA_INT_M_OVF_DNC1L,
BCA_INT_M_OVF_DNC1R,
BCA_INT_M_OVF_DNC2L,
BCA_INT_M_OVF_DNC2R,
BCA_INT_CLR_HRESP_ERR,
BCA_INT_CLR_I2S1_BCK_ERR1,
BCA_INT_CLR_I2S1_BCK_ERR2,
BCA_INT_CLR_ANC_FAINT,
BCA_INT_CLR_OVF_SMASL,
BCA_INT_CLR_OVF_SMASR,
BCA_INT_CLR_OVF_DNC1L,
BCA_INT_CLR_OVF_DNC1R,
BCA_INT_CLR_OVF_DNC2L,
BCA_INT_CLR_OVF_DNC2R,
BCA_INT_HRESP_ERR,
BCA_INT_I2S_BCK_ERR1,
BCA_INT_I2S_BCK_ERR2,
BCA_INT_ANC_FAINT,
BCA_INT_OVF_SMASL,
BCA_INT_OVF_SMASR,
BCA_INT_OVF_DNC1L,
BCA_INT_OVF_DNC1R,
BCA_INT_OVF_DNC2L,
BCA_INT_OVF_DNC2R,
BCA_DBG_MIC_CH1_DATA,
BCA_DBG_MIC_CH2_DATA,
BCA_DBG_MIC_CH3_DATA,
BCA_DBG_MIC_CH4_DATA,
BCA_DBG_MIC_CH5_DATA,
BCA_DBG_MIC_CH6_DATA,
BCA_DBG_MIC_CH7_DATA,
BCA_DBG_MIC_CH8_DATA,
BCA_DBG_I2S1_U_CH1_DATA,
BCA_DBG_I2S1_U_CH2_DATA,
BCA_DBG_I2S1_D_CH1_DATA,
BCA_DBG_I2S1_D_CH2_DATA,
BCA_DBG_I2S2_U_CH1_DATA,
BCA_DBG_I2S2_U_CH2_DATA,
BCA_DBG_I2S2_D_CH1_DATA,
BCA_DBG_I2S2_D_CH2_DATA,
BCA_DBG_CTRL_MIC_DBG_EN,
BCA_DBG_CTRL_I2S1_DBG_U_EN,
BCA_DBG_CTRL_I2S1_DBG_D_EN,
BCA_DBG_CTRL_I2S2_DBG_U_EN,
BCA_DBG_CTRL_I2S2_DBG_D_EN,
BCA_CLK_EN_AHBMASTER_MIC_EN,
BCA_CLK_EN_AHBMASTER_I2S1_EN,
BCA_CLK_EN_AHBMASTER_I2S2_EN,
BCA_MCLK_MON_THRESH,
AHB_MASTER_MIC_MASK,
AHB_MASTER_I2S1_MASK,
AHB_MASTER_I2S2_MASK,
BCA_REG_MAX_ENTRY
} BCA_REG_ID;
@@ -114,7 +114,7 @@ static void set_miccfg(void)
if (is_amic)
{
if(is_dmic)
if (is_dmic)
{
g_audio_cfg.mic_dev = CXD56_AUDIO_CFG_MIC_DEV_ANADIG;
g_audio_cfg.mic_mode = CXD56_AUDIO_CFG_MIC_MODE_64FS;
@@ -127,7 +127,7 @@ static void set_miccfg(void)
}
else
{
if(is_dmic)
if (is_dmic)
{
g_audio_cfg.mic_dev = CXD56_AUDIO_CFG_MIC_DEV_DIGITAL;
g_audio_cfg.mic_mode = CXD56_AUDIO_CFG_MIC_MODE_64FS;
@@ -61,6 +61,7 @@ enum audio_irq_reg_type_e
};
/* INT_EN1 */
#define CXD56_INTC_BASE 0xe0045000
#define INT_EN1_REG_ADDR (CXD56_INTC_BASE + 0x10 + 3 * 4)
#define INT_EN1_BIT_AU0 6
@@ -181,6 +182,7 @@ static CXD56_AUDIO_ECODE get_dma_handle(cxd56_audio_dma_path_t path,
default:
return CXD56_AUDIO_ECODE_DMA_PATH_INV;
}
return CXD56_AUDIO_ECODE_OK;
}
@@ -204,6 +206,7 @@ static CXD56_AUDIO_ECODE get_dma_path(cxd56_audio_dma_t handle,
default:
return CXD56_AUDIO_ECODE_DMA_HANDLE_INV;
}
return CXD56_AUDIO_ECODE_OK;
}
@@ -256,6 +259,7 @@ static CXD56_AUDIO_ECODE exec_dma_ch_sync_workaround(
break;
}
}
if (timeout_cnt == DMA_TIMEOUT_CNT)
{
return CXD56_AUDIO_ECODE_DMA_SMP_TIMEOUT;
@@ -507,7 +511,6 @@ CXD56_AUDIO_ECODE cxd56_audio_dma_en_dmaint(void)
cxd56_audio_bca_reg_en_bus_err_int();
return CXD56_AUDIO_ECODE_OK;
}
CXD56_AUDIO_ECODE cxd56_audio_dma_dis_dmaint(void)
@@ -565,7 +568,7 @@ CXD56_AUDIO_ECODE cxd56_audio_dma_stop(cxd56_audio_dma_t handle)
return CXD56_AUDIO_ECODE_OK;
}
void CXD56_audio_dma_int_handler(void)
void cxd56_audio_dma_int_handler(void)
{
uint32_t int_irq = read_int_reg(INT_IRQ1_REG);
uint32_t int_ac = cxd56_audio_bca_reg_get_dma_done_state_mic();
@@ -51,7 +51,7 @@
* Public Function Prototypes
****************************************************************************/
extern void CXD56_audio_dma_int_handler(void);
extern void cxd56_audio_dma_int_handler(void);
/***************************************************************************
* Private Data
@@ -71,10 +71,10 @@ extern void CXD56_audio_dma_int_handler(void);
void cxd56_audio_irq_attach(void)
{
irq_attach(CXD56_IRQ_AUDIO_0, (xcpt_t)CXD56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_1, (xcpt_t)CXD56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_2, (xcpt_t)CXD56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_3, (xcpt_t)CXD56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_0, (xcpt_t)cxd56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_1, (xcpt_t)cxd56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_2, (xcpt_t)cxd56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_3, (xcpt_t)cxd56_audio_dma_int_handler, NULL);
}
void cxd56_audio_irq_detach(void)
@@ -228,6 +228,7 @@ CXD56_AUDIO_ECODE cxd56_audio_volume_set(cxd56_audio_volid_t id,
return CXD56_AUDIO_ECODE_VOL_MIN;
}
}
if (VOLUME_MAX < vol)
{
return CXD56_AUDIO_ECODE_VOL_MAX;
@@ -146,6 +146,7 @@
/****************************************************************************
* Private Type Definitions
****************************************************************************/
/**
* @brief Structure for ak09912 device
*/
@@ -271,7 +272,7 @@ static void ak09912_putreg8(FAR struct ak09912_dev_s *priv, uint8_t regaddr,
****************************************************************************/
static int ak09912_getreg(FAR struct ak09912_dev_s *priv, uint8_t regaddr,
uint8_t* buffer, uint32_t cnt)
uint8_t *buffer, uint32_t cnt)
{
uint16_t inst[2];
@@ -325,6 +326,7 @@ static int ak09912_seqinit(FAR struct ak09912_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq;
seq_setaddress(priv->seq, priv->addr);
@@ -489,7 +491,8 @@ static int ak09912_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
int ak09912_init(FAR struct i2c_master_s *i2c, int port)
{
FAR struct ak09912_dev_s tmp, *priv = &tmp;
struct ak09912_dev_s tmp;
struct ak09912_dev_s *priv = &tmp;
uint8_t val;
int ret;
@@ -149,6 +149,7 @@
/****************************************************************************
* Private Type Definitions
****************************************************************************/
/**
* @brief Structure for apds9930 device
*/
@@ -471,6 +472,7 @@ static void apds9930_setenable(FAR struct apds9930_dev_s *priv,
val = APDS9930_ENABLE_STANDBY;
}
}
apds9930_putreg8(priv, APDS9930_ENABLE, val);
leave_critical_section(flags);
@@ -495,6 +497,7 @@ static int apds9930als_seqinit(FAR struct apds9930_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_als_seq;
seq_setaddress(priv->seq, priv->addr);
@@ -528,6 +531,7 @@ static int apds9930ps_seqinit(FAR struct apds9930_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_ps_seq;
seq_setaddress(priv->seq, priv->addr);
@@ -602,6 +606,7 @@ static int apds9930_open_ps(FAR struct file *filep)
{
return ret;
}
apds9930_setenable(priv, SETENABLE_TYPE_PS, true);
}
else
@@ -925,6 +930,7 @@ int apds9930_init(FAR struct i2c_master_s *i2c, int port)
apds9930_putreg8(priv, APDS9930_PPULSE, val);
/* Control */
val = APDS9930_CONTROL_PDRIVE_100MA | APDS9930_CONTROL_PDIODE_CH1 |
APDS9930_CONTROL_PGAIN_X1 | APDS9930_CONTROL_AGAIN_X1;
apds9930_putreg8(priv, APDS9930_CONTROL, val);
@@ -76,6 +76,7 @@
/****************************************************************************
* Private Type Definitions
****************************************************************************/
/**
* @brief Structure for bh1721fvc device
*/
@@ -177,6 +178,7 @@ static int bh1721fvc_seqinit(FAR struct bh1721fvc_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq;
seq_setaddress(priv->seq, priv->addr);
@@ -216,6 +218,7 @@ static int bh1721fvc_open(FAR struct file *filep)
bh1721fvc_writeopecode(priv, BH1721FVC_POWERON);
bh1721fvc_writeopecode(priv, BH1721FVC_AUTORESOLUTION);
}
g_refcnt++;
return OK;
@@ -270,6 +270,7 @@ static int bh1745nuc_seqinit(FAR struct bh1745nuc_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq;
seq_setaddress(priv->seq, priv->addr);
@@ -280,6 +280,7 @@ static int bm1383glv_seqinit(FAR struct bm1383glv_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq;
seq_setaddress(priv->seq, priv->addr);
@@ -351,6 +352,7 @@ static int bm1383glv_open(FAR struct file *filep)
BM1383AGLV_MODE_CONTROL_RESERVED |
BM1383AGLV_MODE_CONTROL_CONTINUOUS;
}
bm1383glv_putreg8(priv, BM1383GLV_MODE_CONTROL, val);
}
else
@@ -294,6 +294,7 @@ static int bm1422gmv_seqinit(FAR struct bm1422gmv_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq;
seq_setaddress(priv->seq, priv->addr);
@@ -377,7 +378,6 @@ static int bm1422gmv_close(FAR struct file *filep)
if (g_refcnt == 0)
{
/* goto power-down mode */
bm1422gmv_putreg8(priv, BM1422GMV_CNTL1, BM1422GMV_CNTL1_RST_LV);
@@ -279,16 +279,22 @@ static int bmi160_close_gyro(FAR struct file *filep);
static int bmi160_close_accel(FAR struct file *filep);
static ssize_t bmi160_read(FAR struct file *filep, FAR char *buffer,
size_t len);
static int bmi160_ioctl(FAR struct file *filep,int cmd,unsigned long arg);
static int bmi160_ioctl(FAR struct file *filep, int cmd,
unsigned long arg);
static int bmi160_checkid(FAR struct bmi160_dev_s *priv);
#ifdef CONFIG_SENSORS_BMI160_I2C
static int bmi160_devregister(FAR const char *devpath, FAR struct i2c_master_s *dev,
int minor, const struct file_operations *fops, int port);
static int bmi160_devregister(FAR const char *devpath,
FAR struct i2c_master_s *dev,
int minor,
const struct file_operations *fops,
int port);
#else /* CONFIG_SENSORS_BMI160_SPI */
static int bmi160_devregister(FAR const char *devpath, FAR struct spi_dev_s *dev,
int minor, const struct file_operations *fops);
static int bmi160_devregister(FAR const char *devpath,
FAR struct spi_dev_s *dev,
int minor,
const struct file_operations *fops);
#endif
static int bmi160_set_accel_pm(FAR struct bmi160_dev_s *priv, int pm);
@@ -474,6 +480,7 @@ static int bmi160_seqinit_gyro(FAR struct bmi160_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq_gyro;
#ifdef CONFIG_SENSORS_BMI160_I2C
@@ -506,6 +513,7 @@ static int bmi160_seqinit_accel(FAR struct bmi160_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq_accel;
#ifdef CONFIG_SENSORS_BMI160_I2C
@@ -800,6 +808,7 @@ static int bmi160_devregister(FAR const char *devpath, FAR struct spi_dev_s *dev
snerr("Failed to allocate instance\n");
return -ENOMEM;
}
#ifdef CONFIG_SENSORS_BMI160_I2C
priv->i2c = dev;
priv->seq = NULL;
@@ -978,7 +987,8 @@ int bmi160_init(FAR struct i2c_master_s *dev, int port)
int bmi160_init(FAR struct spi_dev_s *dev)
#endif
{
FAR struct bmi160_dev_s tmp, *priv = &tmp;
struct bmi160_dev_s tmp;
struct bmi160_dev_s *priv = &tmp;
int ret;
#ifdef CONFIG_SENSORS_BMI160_I2C
+31 -26
View File
@@ -322,31 +322,31 @@ static int bmp280_get_calib_param_press(FAR struct bmp280_dev_s *priv)
{
/* Read calibration values */
g_press_adj.dig_P1 =
g_press_adj.dig_p1 =
((uint16_t)bmp280_getreg8(priv, BMP280_DIG_P1_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P1_LSB);
g_press_adj.dig_P2 =
g_press_adj.dig_p2 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P2_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P2_LSB);
g_press_adj.dig_P3 =
g_press_adj.dig_p3 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P3_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P3_LSB);
g_press_adj.dig_P4 =
g_press_adj.dig_p4 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P4_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P4_LSB);
g_press_adj.dig_P5 =
g_press_adj.dig_p5 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P5_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P5_LSB);
g_press_adj.dig_P6 =
g_press_adj.dig_p6 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P6_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P6_LSB);
g_press_adj.dig_P7 =
g_press_adj.dig_p7 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P7_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P7_LSB);
g_press_adj.dig_P8 =
g_press_adj.dig_p8 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P8_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P8_LSB);
g_press_adj.dig_P9 =
g_press_adj.dig_p9 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P9_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P9_LSB);
@@ -365,18 +365,19 @@ static int bmp280_get_calib_param_temp(FAR struct bmp280_dev_s *priv)
{
/* Read calibration values */
g_temp_adj.dig_T1 =
g_temp_adj.dig_t1 =
((uint16_t)bmp280_getreg8(priv, BMP280_DIG_T1_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_T1_LSB);
g_temp_adj.dig_T2 =
g_temp_adj.dig_t2 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_T2_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_T2_LSB);
g_temp_adj.dig_T3 =
g_temp_adj.dig_t3 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_T3_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_T3_LSB);
return OK;
}
/****************************************************************************
* Name: bmp280_set_power_mode
*
@@ -496,6 +497,7 @@ static int bmp280_seqinit_press(FAR struct bmp280_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq_press;
seq_setaddress(priv->seq, priv->addr);
@@ -521,6 +523,7 @@ static int bmp280_seqinit_temp(FAR struct bmp280_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq_temp;
seq_setaddress(priv->seq, priv->addr);
@@ -764,17 +767,18 @@ static int bmp280_ioctl_press(FAR struct file *filep, int cmd,
case SNIOC_GETADJ:
{
struct bmp280_press_adj_s *user = (struct bmp280_press_adj_s *)(uintptr_t)arg;
struct bmp280_press_adj_s *user = (struct bmp280_press_adj_s *)
(uintptr_t)arg;
user->dig_P1 = g_press_adj.dig_P1;
user->dig_P2 = g_press_adj.dig_P2;
user->dig_P3 = g_press_adj.dig_P3;
user->dig_P4 = g_press_adj.dig_P4;
user->dig_P5 = g_press_adj.dig_P5;
user->dig_P6 = g_press_adj.dig_P6;
user->dig_P7 = g_press_adj.dig_P7;
user->dig_P8 = g_press_adj.dig_P8;
user->dig_P9 = g_press_adj.dig_P9;
user->dig_p1 = g_press_adj.dig_p1;
user->dig_p2 = g_press_adj.dig_p2;
user->dig_p3 = g_press_adj.dig_p3;
user->dig_p4 = g_press_adj.dig_p4;
user->dig_p5 = g_press_adj.dig_p5;
user->dig_p6 = g_press_adj.dig_p6;
user->dig_p7 = g_press_adj.dig_p7;
user->dig_p8 = g_press_adj.dig_p8;
user->dig_p9 = g_press_adj.dig_p9;
}
break;
@@ -825,9 +829,9 @@ static int bmp280_ioctl_temp(FAR struct file *filep, int cmd,
{
struct bmp280_temp_adj_s *user = (struct bmp280_temp_adj_s *)(uintptr_t)arg;
user->dig_T1 = g_temp_adj.dig_T1;
user->dig_T2 = g_temp_adj.dig_T2;
user->dig_T3 = g_temp_adj.dig_T3;
user->dig_t1 = g_temp_adj.dig_t1;
user->dig_t2 = g_temp_adj.dig_t2;
user->dig_t3 = g_temp_adj.dig_t3;
}
break;
@@ -873,7 +877,8 @@ static int bmp280_ioctl_temp(FAR struct file *filep, int cmd,
int bmp280_init(FAR struct i2c_master_s *i2c, int port)
{
FAR struct bmp280_dev_s tmp, *priv = &tmp;
struct bmp280_dev_s tmp;
struct *priv = &tmp;
int ret;
/* Setup temporary device structure for initialization */
@@ -278,6 +278,7 @@ static int kx022_seqinit(FAR struct kx022_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq;
seq_setaddress(priv->seq, priv->addr);
@@ -144,6 +144,7 @@
/****************************************************************************
* Private Type Definitions
****************************************************************************/
/**
* @brief Structure for lt1pa01 device
*/
@@ -349,6 +350,7 @@ static int lt1pa01als_seqinit(FAR struct lt1pa01_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_als_seq;
seq_setaddress(priv->seq, priv->addr);
@@ -382,6 +384,7 @@ static int lt1pa01prox_seqinit(FAR struct lt1pa01_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_prox_seq;
seq_setaddress(priv->seq, priv->addr);
@@ -127,6 +127,7 @@
/****************************************************************************
* Private Type Definitions
****************************************************************************/
/**
* @brief Structure for rpr0521rs device
*/
@@ -237,6 +238,7 @@ static uint8_t g_ps_persistence = RPR0521RS_PS_CONTROL_PS_PERSISTENCE_2;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: rpr0521rs_getreg8
*
@@ -358,7 +360,7 @@ static int rpr0521rs_checkid(FAR struct rpr0521rs_dev_s *priv)
id = rpr0521rs_getreg8(priv, RPR0521RS_SYSTEM_CONTROL);
if ((id & 0x3F) != RPR0521RS_PARTID)
if ((id & 0x3f) != RPR0521RS_PARTID)
{
/* Part ID is not Correct */
@@ -422,6 +424,7 @@ static void rpr0521rs_setmodecontrol(FAR struct rpr0521rs_dev_s *priv,
val = RPR0521RS_MODE_CONTROL_MEASTIME_STANDBY;
}
}
rpr0521rs_putreg8(priv, RPR0521RS_MODE_CONTROL, val);
leave_critical_section(flags);
@@ -446,6 +449,7 @@ static int rpr0521rsals_seqinit(FAR struct rpr0521rs_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_als_seq;
seq_setaddress(priv->seq, priv->addr);
@@ -479,6 +483,7 @@ static int rpr0521rsps_seqinit(FAR struct rpr0521rs_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_ps_seq;
seq_setaddress(priv->seq, priv->addr);
@@ -553,6 +558,7 @@ static int rpr0521rs_open_ps(FAR struct file *filep)
{
return ret;
}
rpr0521rs_setmodecontrol(priv, SETMODECONTROL_TYPE_PS, true);
}
else
@@ -317,7 +317,7 @@ static int board_sdcard_detect_int(int irq, FAR void *context, FAR void *arg)
NULL);
}
return OK;
return OK;
}
#endif