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SAMA5 PCK: Add Main clock as an option for the PCK clock source

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This commit is contained in:
Gregory Nutt
2014-08-03 10:17:50 -06:00
parent eafa4aeaa1
commit 159bcc255d
14 changed files with 49 additions and 26 deletions
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arch/arm/src/sama5/sam_pck.c
+36 -26
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@@ -107,39 +107,49 @@ uint32_t sam_pck_configure(enum pckid_e pckid, enum pckid_clksrc_e clksrc,
uint32_t clkin;
uint32_t actual;
/* Pick a clock source. Several are possible but only MCK, PLLA, of SCK is
* chosen here.
/* Pick a clock source. Several are possible but only MCK, PLLA, the
* MAINCK,or SCK are supported here.
*/
if (clksrc == PCKSRC_SCK)
switch (clksrc)
{
/* Pick the slow clock */
case PCKSRC_MCK: /* Source clock = MCK or PLLACK */
{
/* Pick either the MCK or the PLLACK, whichever will best realize
* the target frequency.
*/
DEBUGASSERT(BOARD_MCK_FREQUENCY < BOARD_PLLA_FREQUENCY);
/* Pick the PLLACK if it seems like a better choice */
if (frequency <= BOARD_MCK_FREQUENCY ||
frequency < BOARD_PLLA_FREQUENCY / 64)
{
regval = PMC_PCK_CSS_MCK;
clkin = BOARD_MCK_FREQUENCY;
}
else
{
regval = PMC_PCK_CSS_PLLA;
clkin = BOARD_PLLA_FREQUENCY;
}
}
break;
case PCKSRC_MAINCK: /* Source clock = MAIN clock */
regval = PMC_PCK_CSS_MAIN;
clkin = BOARD_MAINCK_FREQUENCY;
break;
case PCKSRC_SCK: /* Source clock = SCK */
regval = PMC_PCK_CSS_SLOW;
clkin = BOARD_SLOWCLK_FREQUENCY;
}
break;
/* If the source is not the slow clock, then pick either the MCK or the
* PLLACK, whichever will best realize the target frequency.
*/
else
{
DEBUGASSERT(BOARD_MCK_FREQUENCY < BOARD_PLLA_FREQUENCY);
/* Pick the PLLACK if it seems like a better choice */
if (frequency <= BOARD_MCK_FREQUENCY ||
frequency < BOARD_PLLA_FREQUENCY / 64)
{
regval = PMC_PCK_CSS_MCK;
clkin = BOARD_MCK_FREQUENCY;
}
else
{
regval = PMC_PCK_CSS_PLLA;
clkin = BOARD_PLLA_FREQUENCY;
}
default:
dbg("ERROR: Unknown clock source\n");
return 0;
}
/* The the larger smallest divisor that does not exceed the requested
arch/arm/src/sama5/sam_pck.h
+1
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@@ -64,6 +64,7 @@ enum pckid_e
enum pckid_clksrc_e
{
PCKSRC_MCK = 0, /* Source clock is the master clock (MCK) or PLLA output (PLLACK) */
PCKSRC_MAINCK, /* Source clock is the main clock (probably the XTAL) */
PCKSRC_SCK /* Source clock is the slow clock (SCK) */
};
configs/sama5d3-xplained/include/board_384mhz.h
+1
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@@ -161,6 +161,7 @@
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
configs/sama5d3-xplained/include/board_396mhz.h
+1
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@@ -119,6 +119,7 @@
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
configs/sama5d3-xplained/include/board_528mhz.h
+1
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@@ -118,6 +118,7 @@
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
configs/sama5d3-xplained/include/board_sdram.h
+1
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@@ -57,6 +57,7 @@
* the Main clock source in the on-board 12MHz crystal.
*/
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
configs/sama5d3x-ek/include/board_384mhz.h
+1
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@@ -161,6 +161,7 @@
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
configs/sama5d3x-ek/include/board_396mhz.h
+1
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@@ -119,6 +119,7 @@
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
configs/sama5d3x-ek/include/board_528mhz.h
+1
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@@ -118,6 +118,7 @@
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
configs/sama5d3x-ek/include/board_sdram.h
+1
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@@ -57,6 +57,7 @@
* the Main clock source in the on-board 12MHz crystal.
*/
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
configs/sama5d4-ek/include/board_384mhz.h
+1
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@@ -159,6 +159,7 @@
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
configs/sama5d4-ek/include/board_396mhz.h
+1
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@@ -117,6 +117,7 @@
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
configs/sama5d4-ek/include/board_528mhz.h
+1
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@@ -116,6 +116,7 @@
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
configs/sama5d4-ek/include/board_sdram.h
+1
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@@ -57,6 +57,7 @@
* the Main clock source in the on-board 12MHz crystal.
*/
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))