mirror of
https://github.com/apache/nuttx.git
synced 2026-06-07 09:18:00 +08:00
TM4C129X: Framework for new Tiva clocking logic (details not yet implemented)
This commit is contained in:
@@ -74,9 +74,15 @@ CMN_CSRCS += up_elf.c
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endif
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CHIP_ASRCS =
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CHIP_CSRCS = tiva_allocateheap.c tiva_start.c tiva_syscontrol.c tiva_irq.c
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CHIP_CSRCS += tiva_gpio.c tiva_gpioirq.c tiva_lowputc.c tiva_serial.c
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CHIP_CSRCS += tiva_ssi.c tiva_dumpgpio.c
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CHIP_CSRCS = tiva_allocateheap.c tiva_start.c tiva_irq.c tiva_gpio.c
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CHIP_CSRCS += tiva_gpioirq.c tiva_lowputc.c tiva_serial.c tiva_ssi.c
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CHIP_CSRCS += tiva_dumpgpio.c
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ifeq ($(CONFIG_ARCH_CHIP_TM4C129),y)
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CHIP_CSRCS += tm4c129_syscontrol.c
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else
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CHIP_CSRCS += tiva_syscontrol.c
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endif
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += tiva_timerisr.c
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@@ -1,5 +1,5 @@
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/********************************************************************************************
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* arch/arm/src/tiva/chip/tm4c129x_syscontrol.h
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* arch/arm/src/tiva/chip/tm4c129_syscontrol.h
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@@ -33,8 +33,8 @@
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*
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********************************************************************************************/
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#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TM4C129X_SYSCONTROL_H
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#define __ARCH_ARM_SRC_TIVA_CHIP_TM4C129X_SYSCONTROL_H
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#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TM4C129_SYSCONTROL_H
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#define __ARCH_ARM_SRC_TIVA_CHIP_TM4C129_SYSCONTROL_H
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/********************************************************************************************
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* Included Files
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@@ -1190,8 +1190,8 @@
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# define SYSCON_SRTIMER_R3 (1 << 3) /* Bit 3: 16/32-Bit Timer 3 Software Reset */
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# define SYSCON_SRTIMER_R4 (1 << 4) /* Bit 4: 16/32-Bit Timer 4 Software Reset */
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# define SYSCON_SRTIMER_R5 (1 << 5) /* Bit 5: 16/32-Bit Timer 5 Software Reset */
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# define SYSCON_SRTIMER_R5 (1 << 6) /* Bit 6: 16/32-Bit Timer 6 Software Reset */
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# define SYSCON_SRTIMER_R5 (1 << 7) /* Bit 7: 16/32-Bit Timer 7 Software Reset */
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# define SYSCON_SRTIMER_R6 (1 << 6) /* Bit 6: 16/32-Bit Timer 6 Software Reset */
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# define SYSCON_SRTIMER_R7 (1 << 7) /* Bit 7: 16/32-Bit Timer 7 Software Reset */
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/* GPIO Software Reset */
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@@ -1646,8 +1646,8 @@
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# define SYSCON_DCGCTIMER_D3 (1 << 3) /* Bit 3: 16/32-Bit Timer 3 Deep-Sleep Mode Clock Gating Control */
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# define SYSCON_DCGCTIMER_D4 (1 << 4) /* Bit 4: 16/32-Bit Timer 4 Deep-Sleep Mode Clock Gating Control */
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# define SYSCON_DCGCTIMER_D5 (1 << 5) /* Bit 5: 16/32-Bit Timer 5 Deep-Sleep Mode Clock Gating Control */
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# define SYSCON_DCGCTIMER_D5 (1 << 6) /* Bit 6: 16/32-Bit Timer 6 Deep-Sleep Mode Clock Gating Control */
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# define SYSCON_DCGCTIMER_D5 (1 << 7) /* Bit 7: 16/32-Bit Timer 7 Deep-Sleep Mode Clock Gating Control */
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# define SYSCON_DCGCTIMER_D6 (1 << 6) /* Bit 6: 16/32-Bit Timer 6 Deep-Sleep Mode Clock Gating Control */
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# define SYSCON_DCGCTIMER_D7 (1 << 7) /* Bit 7: 16/32-Bit Timer 7 Deep-Sleep Mode Clock Gating Control */
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/* GPIO Deep-Sleep Mode Clock */
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@@ -1803,7 +1803,7 @@
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/* GPIO Power Control */
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#define SYSCON_PCGPIO(n) (1 << (n)) /* Bit n: GPIO Port N Power Control */
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#define SYSCON_PCGPIO(n) (1 << (n)) /* Bit n: GPIO Port n Power Control */
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# define SYSCON_PCGPIO_P0 (1 << 0) /* Bit 0: GPIO Port A Power Control */
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# define SYSCON_PCGPIO_P1 (1 << 1) /* Bit 1: GPIO Port B Power Control */
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# define SYSCON_PCGPIO_P2 (1 << 2) /* Bit 2: GPIO Port C Power Control */
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@@ -1941,7 +1941,7 @@
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/* GPIO Peripheral Ready */
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#define SYSCON_PRGPIO(n) (1 << (n)) /* Bit n: GPIO Port F Peripheral Ready */
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#define SYSCON_PRGPIO(n) (1 << (n)) /* Bit n: GPIO Port n Peripheral Ready */
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# define SYSCON_PRGPIO_R0 (1 << 0) /* Bit 0: GPIO Port A Peripheral Ready */
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# define SYSCON_PRGPIO_R1 (1 << 1) /* Bit 1: GPIO Port B Peripheral Ready */
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# define SYSCON_PRGPIO_R2 (1 << 2) /* Bit 2: GPIO Port C Peripheral Ready */
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@@ -2095,4 +2095,4 @@
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* Public Functions
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********************************************************************************************/
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#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TM4C129X_SYSCONTROL_H */
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#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TM4C129_SYSCONTROL_H */
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@@ -0,0 +1,102 @@
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/************************************************************************************
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* arch/arm/src/tiva/tiva_enableclks.h
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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||||
* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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||||
* notice, this list of conditions and the following disclaimer.
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||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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||||
*
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||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_TIVA_TIVA_ENABLECLKS_H
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#define __ARCH_ARM_SRC_TIVA_TIVA_ENABLECLKS_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include "up_arch.h"
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#include "chip.h"
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#include "chip/tiva_syscontrol.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Clocks are enabled or disabled by setting or clearing a bit (b) in a system
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* control register (a))
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*/
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#define tiva_enableclk(a,b) modifyreg32((a),0,(b))
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#define tiva_disableclk(a,b) modifyreg32((a),(b),0)
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/* GPIO clocking */
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#ifdef TIVA_SYSCON_RCGCGPIO
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# define tiva_gpio_enableclk(p) tiva_enableclk(TIVA_SYSCON_RCGCGPIO,SYSCON_RCGCGPIO(p))
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# define tiva_gpio_disableclk(p) tiva_disableclk(TIVA_SYSCON_RCGCGPIO,SYSCON_RCGCGPIO(p))
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#else
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# define tiva_gpio_enableclk(p) tiva_enableclk(TIVA_SYSCON_RCGC2,SYSCON_RCGC2_GPIO(p))
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# define tiva_gpio_disableclk(p) tiva_disableclk(TIVA_SYSCON_RCGC2,SYSCON_RCGC2_GPIO(p))
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#endif
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/* UART clocking */
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#ifdef TIVA_SYSCON_RCGCUART
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# define tiva_uart_enableclk(p) tiva_enableclk(TIVA_SYSCON_RCGCUART,SYSCON_RCGCUART(p))
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# define tiva_uart_disableclk(p) tiva_disableclk(TIVA_SYSCON_RCGCUART,SYSCON_RCGCUART(p))
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# define tiva_uart0_enableclk() tiva_uart_enableclk(0)
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# define tiva_uart1_enableclk() tiva_uart_enableclk(1)
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# define tiva_uart2_enableclk() tiva_uart_enableclk(2)
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# define tiva_uart3_enableclk() tiva_uart_enableclk(3)
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# define tiva_uart4_enableclk() tiva_uart_enableclk(4)
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# define tiva_uart5_enableclk() tiva_uart_enableclk(5)
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# define tiva_uart6_enableclk() tiva_uart_enableclk(6)
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# define tiva_uart7_enableclk() tiva_uart_enableclk(7)
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# define tiva_uart0_disableclk() tiva_uart_disableclk(0)
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# define tiva_uart1_disableclk() tiva_uart_disableclk(1)
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# define tiva_uart2_disableclk() tiva_uart_disableclk(2)
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# define tiva_uart3_disableclk() tiva_uart_disableclk(3)
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# define tiva_uart4_disableclk() tiva_uart_disableclk(4)
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# define tiva_uart5_disableclk() tiva_uart_disableclk(5)
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# define tiva_uart6_disableclk() tiva_uart_disableclk(6)
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# define tiva_uart7_disableclk() tiva_uart_disableclk(7)
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#else
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# define tiva_uart0_enableclk() tiva_enableclk(TIVA_SYSCON_RCGC1,SYSCON_RCGC1_UART0)
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# define tiva_uart1_enableclk() tiva_enableclk(TIVA_SYSCON_RCGC1,SYSCON_RCGC1_UART1)
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# define tiva_uart2_enableclk() tiva_enableclk(TIVA_SYSCON_RCGC1,SYSCON_RCGC1_UART2)
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# define tiva_uart0_disableclk() tiva_disableclk(TIVA_SYSCON_RCGC1,SYSCON_RCGC1_UART0)
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# define tiva_uart1_disableclk() tiva_disableclk(TIVA_SYSCON_RCGC1,SYSCON_RCGC1_UART1)
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# define tiva_uart2_disableclk() tiva_disableclk(TIVA_SYSCON_RCGC1,SYSCON_RCGC1_UART2)
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#endif
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#endif /* __ARCH_ARM_SRC_TIVA_TIVA_ENABLECLKS_H */
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@@ -48,6 +48,7 @@
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#include <arch/irq.h>
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#include "up_arch.h"
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#include "tiva_enableclks.h"
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#include "tiva_gpio.h"
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/****************************************************************************
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@@ -814,7 +815,6 @@ int tiva_configgpio(uint32_t cfgset)
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unsigned int pinno;
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uintptr_t base;
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uint32_t pin;
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uint32_t regval;
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/* Decode the basics */
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@@ -839,9 +839,7 @@ int tiva_configgpio(uint32_t cfgset)
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* in the RCGC2 register."
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*/
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regval = getreg32(TIVA_SYSCON_RCGC2);
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regval |= SYSCON_RCGC2_GPIO(port);
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putreg32(regval, TIVA_SYSCON_RCGC2);
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tiva_gpio_enableclk(port);
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/* First, set the port to digital input. This is the safest state in which
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* to perform reconfiguration.
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@@ -46,6 +46,7 @@
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#include "up_arch.h"
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#include "up_internal.h"
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#include "tiva_enableclks.h"
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#include "tiva_gpio.h"
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#include "chip/tiva_pinmap.h"
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@@ -246,7 +247,6 @@ void up_lowputc(char ch)
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void up_lowsetup(void)
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{
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uint32_t regval;
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#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
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uint32_t ctl;
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#endif
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@@ -257,72 +257,56 @@ void up_lowsetup(void)
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*/
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#ifdef CONFIG_TIVA_UART0
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regval = getreg32(TIVA_SYSCON_RCGC1);
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regval |= SYSCON_RCGC1_UART0;
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putreg32(regval, TIVA_SYSCON_RCGC1);
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tiva_uart0_enableclk();
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tiva_configgpio(GPIO_UART0_RX);
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tiva_configgpio(GPIO_UART0_TX);
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#endif
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#ifdef CONFIG_TIVA_UART1
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regval = getreg32(TIVA_SYSCON_RCGC1);
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regval |= SYSCON_RCGC1_UART1;
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putreg32(regval, TIVA_SYSCON_RCGC1);
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tiva_uart1_enableclk();
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tiva_configgpio(GPIO_UART1_RX);
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tiva_configgpio(GPIO_UART1_TX);
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#endif
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#ifdef CONFIG_TIVA_UART2
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regval = getreg32(TIVA_SYSCON_RCGC1);
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regval |= SYSCON_RCGC1_UART2;
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putreg32(regval, TIVA_SYSCON_RCGC1);
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tiva_uart2_enableclk();
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tiva_configgpio(GPIO_UART2_RX);
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tiva_configgpio(GPIO_UART2_TX);
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#endif
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#ifdef CONFIG_TIVA_UART3
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regval = getreg32(TIVA_SYSCON_RCGCUART);
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regval |= SYSCON_RCGCUART_R3;
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putreg32(regval, TIVA_SYSCON_RCGCUART);
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tiva_uart3_enableclk();
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tiva_configgpio(GPIO_UART3_RX);
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tiva_configgpio(GPIO_UART3_TX);
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#endif
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#ifdef CONFIG_TIVA_UART4
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regval = getreg32(TIVA_SYSCON_RCGCUART);
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regval |= SYSCON_RCGCUART_R4;
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putreg32(regval, TIVA_SYSCON_RCGCUART);
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tiva_uart4_enableclk();
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tiva_configgpio(GPIO_UART4_RX);
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tiva_configgpio(GPIO_UART4_TX);
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#endif
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#ifdef CONFIG_TIVA_UART5
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regval = getreg32(TIVA_SYSCON_RCGCUART);
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regval |= SYSCON_RCGCUART_R5;
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putreg32(regval, TIVA_SYSCON_RCGCUART);
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tiva_uart5_enableclk();
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tiva_configgpio(GPIO_UART5_RX);
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tiva_configgpio(GPIO_UART5_TX);
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#endif
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#ifdef CONFIG_TIVA_UART6
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regval = getreg32(TIVA_SYSCON_RCGCUART);
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regval |= SYSCON_RCGCUART_R6;
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putreg32(regval, TIVA_SYSCON_RCGCUART);
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tiva_uart6_enableclk();
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tiva_configgpio(GPIO_UART6_RX);
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tiva_configgpio(GPIO_UART6_TX);
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#endif
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#ifdef CONFIG_TIVA_UART7
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regval = getreg32(TIVA_SYSCON_RCGCUART);
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regval |= SYSCON_RCGCUART_R7;
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putreg32(regval, TIVA_SYSCON_RCGCUART);
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tiva_uart7_enableclk();
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tiva_configgpio(GPIO_UART7_RX);
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tiva_configgpio(GPIO_UART7_TX);
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@@ -0,0 +1,179 @@
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/****************************************************************************
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* arch/arm/src/tiva/tm4c129_syscontrol.c
|
||||
*
|
||||
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <assert.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/init.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "up_arch.h"
|
||||
#include "up_internal.h"
|
||||
#include "chip.h"
|
||||
#include "tiva_syscontrol.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define FAST_OSCDELAY (512*1024)
|
||||
#define SLOW_OSCDELAY (4*1024)
|
||||
#define PLLLOCK_DELAY (32*1024)
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_delay
|
||||
*
|
||||
* Description:
|
||||
* Wait for the newly selected oscillator(s) to settle. This is tricky
|
||||
* because the time that we wait can be significant and is determined by
|
||||
* the previous clock setting, not the one that we are configuring.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void tiva_delay(uint32_t delay)
|
||||
{
|
||||
__asm__ __volatile__("1:\n"
|
||||
"\tsubs %0, #1\n"
|
||||
"\tbne 1b\n"
|
||||
: "=r"(delay) : "r"(delay));
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_oscdelay
|
||||
*
|
||||
* Description:
|
||||
* Wait for the newly selected oscillator(s) to settle. This is tricky because
|
||||
* the time that we wait can be significant and is determined by the previous
|
||||
* clock setting, not the one that we are configuring.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void tiva_oscdelay(uint32_t rcc, uint32_t rcc2)
|
||||
{
|
||||
/* Wait for the oscillator to stabilize. A smaller delay is used if the
|
||||
* current clock rate is very slow.
|
||||
*/
|
||||
|
||||
uint32_t delay = FAST_OSCDELAY;
|
||||
#warning Missing logic
|
||||
|
||||
/* Then delay that number of loops */
|
||||
|
||||
tiva_delay(delay);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_pll_lock
|
||||
*
|
||||
* Description:
|
||||
* The new RCC values have been selected... wait for the PLL to lock on
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void tiva_pll_lock(void)
|
||||
{
|
||||
volatile uint32_t delay;
|
||||
|
||||
/* Loop until the lock is achieved or until a timeout occurs */
|
||||
|
||||
for (delay = PLLLOCK_DELAY; delay > 0; delay--)
|
||||
{
|
||||
/* Check if the PLL is locked on */
|
||||
|
||||
if ((getreg32(TIVA_SYSCON_RIS) & SYSCON_RIS_PLLLRIS) != 0)
|
||||
{
|
||||
/* Yes.. return now */
|
||||
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/* If we get here, then PLL lock was not achieved */
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_clockconfig
|
||||
*
|
||||
* Description:
|
||||
* Called to change to new clock based on desired rcc and rcc2 settings.
|
||||
* This is use to set up the initial clocking but can be used later to
|
||||
* support slow clocked, low power consumption modes.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void tiva_clockconfig(uint32_t newrcc, uint32_t newrcc2)
|
||||
{
|
||||
#warning Missing logic
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_clockconfig
|
||||
*
|
||||
* Description:
|
||||
* Called early in the boot sequence (before .data and .bss are available)
|
||||
* in order to configure initial clocking.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_clockconfig(void)
|
||||
{
|
||||
/* Set the clocking to run with the default settings provided in the board.h
|
||||
* header file
|
||||
*/
|
||||
#warning Missing logic
|
||||
}
|
||||
Reference in New Issue
Block a user