mirror of
https://github.com/apache/nuttx.git
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arm/ht32f491x3: rework PWM lower-half like nrf53
Use static lower-half instances per timer and select the channel through Kconfig and board data instead of passing runtime PWM routing into the driver. This keeps the HT32 PWM support aligned with the existing NuttX pattern and documents the esk32 single-device TMR3 routing. Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
This commit is contained in:
Felipe Moura
simbit18
@@ -7,7 +7,7 @@ ESK32 (HT32F49163)
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The ESK32 is a development board based on the Holtek HT32F49163 MCU.
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The current NuttX port targets the HT32F49163 device used on the
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HT32F49163 development kit and focuses on a working serial-console NSH
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configuration with basic board bring-up.
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configuration with basic board bring-up plus timer-based PWM validation.
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For additional hardware details, refer to Holtek's
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`HT32F491x3 Starter Kit User Guide <https://www.holtek.com/webapi/106680/HT32F491x3_StarterKitUserManualv100.pdf>`_.
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@@ -28,6 +28,7 @@ The current port provides:
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* Boot and clock initialization for the ESK32 8 MHz external crystal
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* System clock configured to 150 MHz
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* USART1 serial console at 115200 8N1
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* TMR3 PWM outputs exposed through ``/dev/pwm0`` .. ``/dev/pwm3``
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* ``/bin`` mounted through ``binfs``
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* ``/proc`` mounted through ``procfs``
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* User LED registration through ``/dev/userleds``
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@@ -41,6 +42,10 @@ applications:
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* ``dumpstack``
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* ``leds``
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The ``esk32:pwm`` configuration keeps the same board bring-up and adds the
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``pwm`` example application together with a board-level PWM device at
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``/dev/pwm0`` .. ``/dev/pwm3``.
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Buttons and LEDs
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================
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@@ -75,8 +80,12 @@ The current port uses the following MCU pins:
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===== ========== ==========
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Pin Signal Notes
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===== ========== ==========
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PA6 TMR3_CH1 ``/dev/pwm0`` output in ``esk32:pwm``
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PA7 TMR3_CH2 ``/dev/pwm1`` output in ``esk32:pwm``
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PA9 USART1_TX Default serial console TX
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PA10 USART1_RX Default serial console RX
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PB0 TMR3_CH3 ``/dev/pwm2`` output in ``esk32:pwm``
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PB1 TMR3_CH4 ``/dev/pwm3`` output in ``esk32:pwm``
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PD13 LED2 User LED, active-low
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PD14 LED3 User LED, active-low
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PD15 LED4 User LED, active-low
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@@ -124,16 +133,72 @@ The following commands are useful for validating the current port:
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When ``leds`` is executed, the example opens ``/dev/userleds`` and cycles
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through the LED bitmasks supported by the board.
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Current Limitations
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===================
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The ``esk32:pwm`` configuration also exposes ``/dev/pwm0`` through TMR3. The
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default defconfig selects ``CONFIG_HT32F491X3_TMR3_CHANNEL=1``, so the PWM
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signal is routed to ``PA6``. Probe ``PA6`` against board ``GND`` and run:
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The current port is still intentionally small. In particular:
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.. code-block:: console
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* only the ``nsh`` board configuration is maintained
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* only USART1 routing is described by the board port
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* LEDs are supported, but board buttons are not yet implemented
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* internal GPIO helpers exist, but there is not yet a board-level ``/dev/gpio``
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test interface in this port
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nsh> pwm -f 1000 -d 50 -t 5
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This command starts a 1 kHz PWM waveform with a 50% duty cycle for 5 seconds.
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On the default channel that corresponds to a 1 ms period with a 500 us high
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pulse on ``PA6``. A typical console log is:
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.. code-block:: console
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nsh> pwm -f 1000 -d 50 -t 5
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pwm_main: starting output with frequency: 1000 duty: 00007fff
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pwm_main: stopping output
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Peripheral Support
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==================
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+---------------------+---------+-------------------------------------+
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| Peripheral | Support | Notes |
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+=====================+=========+=====================================+
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| Boot / Clock / IRQ | Yes | Board start-up, clock tree and tick |
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+---------------------+---------+-------------------------------------+
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| UART | Yes | USART1 console |
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+---------------------+---------+-------------------------------------+
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| GPIO | Partial | Internal helpers only |
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+---------------------+---------+-------------------------------------+
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| LEDs | Yes | ``USERLED`` and ``/dev/userleds`` |
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+---------------------+---------+-------------------------------------+
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| Buttons | No | |
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+---------------------+---------+-------------------------------------+
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| PWM | Yes | TMR3 exposed as ``/dev/pwm0`` |
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+---------------------+---------+-------------------------------------+
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| Pulse Counter | No | |
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+---------------------+---------+-------------------------------------+
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| Timers | Partial | OS tick and TMR3 PWM |
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+---------------------+---------+-------------------------------------+
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| SPI | No | |
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+---------------------+---------+-------------------------------------+
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| I2C | No | |
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+---------------------+---------+-------------------------------------+
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| ADC | No | |
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+---------------------+---------+-------------------------------------+
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| DAC | No | |
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+---------------------+---------+-------------------------------------+
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| CAN | No | |
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+---------------------+---------+-------------------------------------+
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| DMA | No | |
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+---------------------+---------+-------------------------------------+
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| RTC / ERTC | No | |
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+---------------------+---------+-------------------------------------+
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| I2S | No | |
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+---------------------+---------+-------------------------------------+
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| Watchdog | No | |
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+---------------------+---------+-------------------------------------+
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| USB Device | No | |
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+---------------------+---------+-------------------------------------+
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| USB Host | No | |
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+---------------------+---------+-------------------------------------+
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| External Interrupts | No | |
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+---------------------+---------+-------------------------------------+
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| Power Control | No | |
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+---------------------+---------+-------------------------------------+
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Configurations
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==============
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@@ -175,3 +240,46 @@ And the built-in applications can be listed with:
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nsh
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ostest
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sh
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pwm
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---
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This configuration enables the generic PWM framework, registers the TMR3
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lower-half driver as ``/dev/pwm0`` .. ``/dev/pwm3``, and includes the ``pwm`` example
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application for board-level validation.
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Configure and build it from the ``nuttx`` directory:
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.. code-block:: console
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$ ./tools/configure.sh -l esk32:pwm
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$ make olddefconfig
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$ make -j
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After flashing the image, the following command can be used from NSH to
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validate PWM generation on ``/dev/pwm0``:
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.. code-block:: console
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nsh> pwm -f 1000 -d 50 -t 5
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The expected result is a 1 kHz, 50% duty-cycle waveform on ``PA6`` for 5
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seconds, followed by the application stopping the output. A typical console
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log is:
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.. code-block:: console
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nsh> pwm -f 1000 -d 50 -t 5
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pwm_main: starting output with frequency: 1000 duty: 00007fff
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pwm_main: stopping output
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The additional TMR3 outputs are also registered:
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* ``/dev/pwm0``: ``PA6`` / TMR3_CH1
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* ``/dev/pwm1``: ``PA7`` / TMR3_CH2
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* ``/dev/pwm2``: ``PB0`` / TMR3_CH3
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* ``/dev/pwm3``: ``PB1`` / TMR3_CH4
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All four device nodes share the same underlying TMR3 instance, so they must
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run at the same PWM frequency. Starting one channel at a different frequency
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while another channel is active returns ``-EBUSY``.
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@@ -30,6 +30,10 @@ list(
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ht32f491x3_lowputc.c
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ht32f491x3_serial.c)
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if(CONFIG_PWM)
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list(APPEND SRCS ht32f491x3_pwm.c)
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endif()
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if(CONFIG_ARCH_HAVE_CUSTOM_VECTORS)
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list(APPEND SRCS arm_vectors.c)
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endif()
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@@ -54,6 +54,236 @@ config HT32F491X3_PCLK2_FREQUENCY
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menu "Peripheral Support"
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config HT32F491X3_TMR1
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bool "TMR1"
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default n
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---help---
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Enable support for the TMR1 peripheral.
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config HT32F491X3_TMR1_PWM
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bool "TMR1 PWM output"
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default n
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depends on HT32F491X3_TMR1 && PWM && !PWM_MULTICHAN
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---help---
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Enable lower-half PWM support on TMR1.
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config HT32F491X3_TMR1_CHANNEL
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int "TMR1 PWM channel"
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default 1
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range 1 4
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depends on HT32F491X3_TMR1_PWM
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---help---
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Select which TMR1 channel is exposed through the lower-half PWM
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driver.
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config HT32F491X3_TMR2
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bool "TMR2"
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default n
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---help---
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Enable support for the TMR2 peripheral.
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config HT32F491X3_TMR2_PWM
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bool "TMR2 PWM output"
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default n
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depends on HT32F491X3_TMR2 && PWM && !PWM_MULTICHAN
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---help---
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Enable lower-half PWM support on TMR2.
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config HT32F491X3_TMR2_CHANNEL
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int "TMR2 PWM channel"
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default 1
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range 1 4
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depends on HT32F491X3_TMR2_PWM
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---help---
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Select which TMR2 channel is exposed through the lower-half PWM
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driver.
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config HT32F491X3_TMR3
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bool "TMR3"
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default n
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---help---
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Enable support for the TMR3 peripheral.
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config HT32F491X3_TMR3_PWM
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bool "TMR3 PWM output"
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default n
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depends on HT32F491X3_TMR3 && PWM && !PWM_MULTICHAN
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---help---
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Enable lower-half PWM support on TMR3.
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config HT32F491X3_TMR3_CHANNEL
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int "TMR3 PWM channel"
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default 1
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range 1 4
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depends on HT32F491X3_TMR3_PWM
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---help---
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Select which TMR3 channel is exposed through the lower-half PWM
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driver.
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config HT32F491X3_TMR4
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bool "TMR4"
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default n
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---help---
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Enable support for the TMR4 peripheral.
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config HT32F491X3_TMR4_PWM
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bool "TMR4 PWM output"
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default n
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depends on HT32F491X3_TMR4 && PWM && !PWM_MULTICHAN
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---help---
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Enable lower-half PWM support on TMR4.
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config HT32F491X3_TMR4_CHANNEL
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int "TMR4 PWM channel"
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default 1
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range 1 4
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depends on HT32F491X3_TMR4_PWM
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---help---
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Select which TMR4 channel is exposed through the lower-half PWM
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driver.
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config HT32F491X3_TMR6
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bool "TMR6"
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default n
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---help---
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Enable support for the TMR6 peripheral. TMR6 is a basic timer and
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does not provide PWM output channels.
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config HT32F491X3_TMR7
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bool "TMR7"
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default n
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---help---
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Enable support for the TMR7 peripheral. TMR7 is a basic timer and
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does not provide PWM output channels.
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config HT32F491X3_TMR9
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bool "TMR9"
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default n
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---help---
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Enable support for the TMR9 peripheral.
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config HT32F491X3_TMR9_PWM
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bool "TMR9 PWM output"
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default n
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depends on HT32F491X3_TMR9 && PWM && !PWM_MULTICHAN
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---help---
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Enable lower-half PWM support on TMR9.
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config HT32F491X3_TMR9_CHANNEL
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int "TMR9 PWM channel"
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default 1
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range 1 2
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depends on HT32F491X3_TMR9_PWM
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---help---
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Select which TMR9 channel is exposed through the lower-half PWM
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driver.
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config HT32F491X3_TMR10
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bool "TMR10"
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default n
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---help---
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Enable support for the TMR10 peripheral.
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config HT32F491X3_TMR10_PWM
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bool "TMR10 PWM output"
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default n
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depends on HT32F491X3_TMR10 && PWM && !PWM_MULTICHAN
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---help---
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Enable lower-half PWM support on TMR10.
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config HT32F491X3_TMR10_CHANNEL
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int "TMR10 PWM channel"
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default 1
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range 1 1
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depends on HT32F491X3_TMR10_PWM
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---help---
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TMR10 exposes a single PWM channel.
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config HT32F491X3_TMR11
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bool "TMR11"
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default n
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---help---
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Enable support for the TMR11 peripheral.
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config HT32F491X3_TMR11_PWM
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bool "TMR11 PWM output"
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default n
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depends on HT32F491X3_TMR11 && PWM && !PWM_MULTICHAN
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---help---
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Enable lower-half PWM support on TMR11.
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config HT32F491X3_TMR11_CHANNEL
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int "TMR11 PWM channel"
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default 1
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range 1 1
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depends on HT32F491X3_TMR11_PWM
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---help---
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TMR11 exposes a single PWM channel.
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config HT32F491X3_TMR12
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bool "TMR12"
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default n
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---help---
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Enable support for the TMR12 peripheral.
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config HT32F491X3_TMR12_PWM
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bool "TMR12 PWM output"
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default n
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depends on HT32F491X3_TMR12 && PWM && !PWM_MULTICHAN
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---help---
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Enable lower-half PWM support on TMR12.
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config HT32F491X3_TMR12_CHANNEL
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int "TMR12 PWM channel"
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default 1
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range 1 2
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depends on HT32F491X3_TMR12_PWM
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---help---
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Select which TMR12 channel is exposed through the lower-half PWM
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driver.
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config HT32F491X3_TMR13
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bool "TMR13"
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default n
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---help---
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Enable support for the TMR13 peripheral.
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config HT32F491X3_TMR13_PWM
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bool "TMR13 PWM output"
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default n
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depends on HT32F491X3_TMR13 && PWM && !PWM_MULTICHAN
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---help---
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Enable lower-half PWM support on TMR13.
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config HT32F491X3_TMR13_CHANNEL
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int "TMR13 PWM channel"
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default 1
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range 1 1
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depends on HT32F491X3_TMR13_PWM
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---help---
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TMR13 exposes a single PWM channel.
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config HT32F491X3_TMR14
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bool "TMR14"
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default n
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---help---
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Enable support for the TMR14 peripheral.
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config HT32F491X3_TMR14_PWM
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bool "TMR14 PWM output"
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default n
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depends on HT32F491X3_TMR14 && PWM && !PWM_MULTICHAN
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---help---
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Enable lower-half PWM support on TMR14.
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config HT32F491X3_TMR14_CHANNEL
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int "TMR14 PWM channel"
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default 1
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range 1 1
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depends on HT32F491X3_TMR14_PWM
|
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---help---
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TMR14 exposes a single PWM channel.
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config HT32F491X3_USART1_SERIALDRIVER
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bool "USART1"
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default y
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@@ -62,6 +292,10 @@ config HT32F491X3_USART1_SERIALDRIVER
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---help---
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Enable the standard lower-half driver for USART1.
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comment "In this current version, only USART1 is exposed by the esk32 board support."
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comment "In this current version, USART1 is the only serial peripheral exposed by the esk32 board support."
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comment "HT32F491x3 PWM-capable timers are TMR1-4 and TMR9-14; TMR6-7 are basic timers."
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comment "esk32 routes TMR3 channels PA6/PA7/PB0/PB1 to /dev/pwm0."
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endmenu # "Peripheral Support"
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@@ -29,6 +29,10 @@ CHIP_CSRCS += ht32f491x3_timerisr.c ht32f491x3_gpio.c
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CHIP_CSRCS += ht32f491x3_lowputc.c
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CHIP_CSRCS += ht32f491x3_serial.c
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ifeq ($(CONFIG_PWM),y)
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CHIP_CSRCS += ht32f491x3_pwm.c
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endif
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ifeq ($(CONFIG_ARCH_HAVE_CUSTOM_VECTORS),y)
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CHIP_CSRCS += arm_vectors.c
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endif
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@@ -189,10 +189,22 @@
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/* Peripheral reset registers ***********************************************/
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#define HT32_CRM_APB1RST_USART2RST (1 << 17)
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#define HT32_CRM_APB1RST_USART3RST (1 << 18)
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#define HT32_CRM_APB1RST_TMR2RST (1 << 0)
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#define HT32_CRM_APB1RST_TMR3RST (1 << 1)
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#define HT32_CRM_APB1RST_TMR4RST (1 << 2)
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#define HT32_CRM_APB1RST_TMR6RST (1 << 4)
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#define HT32_CRM_APB1RST_TMR7RST (1 << 5)
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#define HT32_CRM_APB1RST_TMR12RST (1 << 6)
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#define HT32_CRM_APB1RST_TMR13RST (1 << 7)
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#define HT32_CRM_APB1RST_TMR14RST (1 << 8)
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#define HT32_CRM_APB1RST_USART2RST (1 << 17)
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#define HT32_CRM_APB1RST_USART3RST (1 << 18)
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|
||||
#define HT32_CRM_APB2RST_USART1RST (1 << 4)
|
||||
#define HT32_CRM_APB2RST_TMR1RST (1 << 0)
|
||||
#define HT32_CRM_APB2RST_USART1RST (1 << 4)
|
||||
#define HT32_CRM_APB2RST_TMR9RST (1 << 16)
|
||||
#define HT32_CRM_APB2RST_TMR10RST (1 << 17)
|
||||
#define HT32_CRM_APB2RST_TMR11RST (1 << 18)
|
||||
|
||||
/* Clock enable registers ***************************************************/
|
||||
|
||||
|
||||
@@ -0,0 +1,99 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/ht32f491x3/hardware/ht32f491x3_tmr.h
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with this
|
||||
* work for additional information regarding copyright ownership. The ASF
|
||||
* licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_HT32F491X3_HARDWARE_HT32F491X3_TMR_H
|
||||
#define __ARCH_ARM_SRC_HT32F491X3_HARDWARE_HT32F491X3_TMR_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Register offsets *********************************************************/
|
||||
|
||||
#define HT32_TMR_CTRL1_OFFSET 0x0000
|
||||
#define HT32_TMR_CTRL2_OFFSET 0x0004
|
||||
#define HT32_TMR_SWEVT_OFFSET 0x0014
|
||||
#define HT32_TMR_CM1_OFFSET 0x0018
|
||||
#define HT32_TMR_CM2_OFFSET 0x001c
|
||||
#define HT32_TMR_CCTRL_OFFSET 0x0020
|
||||
#define HT32_TMR_CVAL_OFFSET 0x0024
|
||||
#define HT32_TMR_DIV_OFFSET 0x0028
|
||||
#define HT32_TMR_PR_OFFSET 0x002c
|
||||
#define HT32_TMR_RPR_OFFSET 0x0030
|
||||
#define HT32_TMR_C1DT_OFFSET 0x0034
|
||||
#define HT32_TMR_C2DT_OFFSET 0x0038
|
||||
#define HT32_TMR_C3DT_OFFSET 0x003c
|
||||
#define HT32_TMR_C4DT_OFFSET 0x0040
|
||||
#define HT32_TMR_BRK_OFFSET 0x0044
|
||||
|
||||
/* Control register 1 *******************************************************/
|
||||
|
||||
#define HT32_TMR_CTRL1_TMREN (1u << 0)
|
||||
#define HT32_TMR_CTRL1_CNTDIR_SHIFT 4
|
||||
#define HT32_TMR_CTRL1_CNTDIR_MASK (7u << HT32_TMR_CTRL1_CNTDIR_SHIFT)
|
||||
#define HT32_TMR_CTRL1_COUNTUP (0u << HT32_TMR_CTRL1_CNTDIR_SHIFT)
|
||||
#define HT32_TMR_CTRL1_PRBEN (1u << 7)
|
||||
|
||||
/* Event generation register ************************************************/
|
||||
|
||||
#define HT32_TMR_SWEVT_OVFSWTR (1u << 0)
|
||||
|
||||
/* Compare mode register helpers ********************************************/
|
||||
|
||||
#define HT32_TMR_CM_CAPTURE_SEL_SHIFT(slot) ((slot) * 8)
|
||||
#define HT32_TMR_CM_CAPTURE_SEL_MASK(slot) (3u << \
|
||||
HT32_TMR_CM_CAPTURE_SEL_SHIFT(slot))
|
||||
#define HT32_TMR_CM_OUTPUT_BUFFER_SHIFT(slot) ((slot) * 8 + 3)
|
||||
#define HT32_TMR_CM_OUTPUT_BUFFER(slot) (1u << \
|
||||
HT32_TMR_CM_OUTPUT_BUFFER_SHIFT(slot))
|
||||
#define HT32_TMR_CM_OUTPUT_MODE_SHIFT(slot) ((slot) * 8 + 4)
|
||||
#define HT32_TMR_CM_OUTPUT_MODE_MASK(slot) (7u << \
|
||||
HT32_TMR_CM_OUTPUT_MODE_SHIFT(slot))
|
||||
#define HT32_TMR_CM_OUTPUT_MODE(slot, mode) ((uint32_t)(mode) << \
|
||||
HT32_TMR_CM_OUTPUT_MODE_SHIFT(slot))
|
||||
|
||||
/* Capture compare control register helpers *********************************/
|
||||
|
||||
#define HT32_TMR_CCTRL_EN_SHIFT(ch) (((ch) - 1u) * 4u)
|
||||
#define HT32_TMR_CCTRL_EN(ch) (1u << HT32_TMR_CCTRL_EN_SHIFT(ch))
|
||||
#define HT32_TMR_CCTRL_POL_SHIFT(ch) (HT32_TMR_CCTRL_EN_SHIFT(ch) + 1u)
|
||||
#define HT32_TMR_CCTRL_POL(ch) (1u << HT32_TMR_CCTRL_POL_SHIFT(ch))
|
||||
|
||||
/* Brake register ***********************************************************/
|
||||
|
||||
#define HT32_TMR_BRK_OEN (1u << 15)
|
||||
|
||||
/* Output compare mode values ***********************************************/
|
||||
|
||||
#define HT32_TMR_OUTPUT_CONTROL_PWM_A 6u
|
||||
|
||||
/* Helper macros ************************************************************/
|
||||
|
||||
#define HT32_TMR_CCR_OFFSET(ch) (HT32_TMR_C1DT_OFFSET + (((ch) - 1u) * 4u))
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_HT32F491X3_HARDWARE_HT32F491X3_TMR_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,55 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/ht32f491x3/ht32f491x3_pwm.h
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with this
|
||||
* work for additional information regarding copyright ownership. The ASF
|
||||
* licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_HT32F491X3_HT32F491X3_PWM_H
|
||||
#define __ARCH_ARM_SRC_HT32F491X3_HT32F491X3_PWM_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <nuttx/timers/pwm.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ht32f491x3_pwminitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize one timer for use with the upper-half PWM driver.
|
||||
*
|
||||
* Input Parameters:
|
||||
* timer - A number identifying the timer instance.
|
||||
*
|
||||
* Returned Value:
|
||||
* On success, a pointer to the HT32 lower-half PWM driver is returned.
|
||||
* NULL is returned on any failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
struct pwm_lowerhalf_s *ht32f491x3_pwminitialize(int timer);
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_HT32F491X3_HT32F491X3_PWM_H */
|
||||
@@ -5,6 +5,6 @@
|
||||
|
||||
if ARCH_BOARD_ESK32
|
||||
|
||||
comment "ESK32 note: only USART1 pin routing is available in the current board port."
|
||||
comment "ESK32 note: USART1 is routed on the board, and PWM is exposed as /dev/pwm0 through TMR3."
|
||||
|
||||
endif # ARCH_BOARD_ESK32
|
||||
|
||||
@@ -0,0 +1,58 @@
|
||||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
# CONFIG_ARCH_FPU is not set
|
||||
# CONFIG_ARCH_LEDS is not set
|
||||
# CONFIG_NSH_ARGCAT is not set
|
||||
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="esk32"
|
||||
CONFIG_ARCH_BOARD_ESK32=y
|
||||
CONFIG_ARCH_CHIP="ht32f491x3"
|
||||
CONFIG_ARCH_CHIP_HT32F49163=y
|
||||
CONFIG_ARCH_CHIP_HT32F491X3=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=2048
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=8499
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_EXAMPLES_PWM=y
|
||||
CONFIG_EXAMPLES_PWM_FREQUENCY=1000
|
||||
CONFIG_FS_BINFS=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_HT32F491X3_PCLK1_FREQUENCY=75000000
|
||||
CONFIG_HT32F491X3_SYSCLK_FREQUENCY=150000000
|
||||
CONFIG_HT32F491X3_TMR3=y
|
||||
CONFIG_HT32F491X3_TMR3_PWM=y
|
||||
CONFIG_INIT_ENTRYPOINT="nsh_main"
|
||||
CONFIG_LINE_MAX=64
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_PREALLOC_TIMERS=4
|
||||
CONFIG_PWM=y
|
||||
CONFIG_RAM_SIZE=49152
|
||||
CONFIG_RAM_START=0x20000000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_RR_INTERVAL=200
|
||||
CONFIG_SCHED_BACKTRACE=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_START_DAY=29
|
||||
CONFIG_START_MONTH=3
|
||||
CONFIG_START_YEAR=2026
|
||||
CONFIG_SYSTEM_DUMPSTACK=y
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_TASK_NAME_SIZE=0
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3
|
||||
CONFIG_TESTING_OSTEST_STACKSIZE=2048
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USERLED=y
|
||||
CONFIG_USERLED_LOWER=y
|
||||
@@ -48,6 +48,44 @@
|
||||
#define BOARD_USART1_TX_AF 7u
|
||||
#define BOARD_USART1_RX_AF 7u
|
||||
|
||||
/****************************************************************************
|
||||
* Board PWM Pin Mapping
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_HT32F491X3_TMR1_PWM) || defined(CONFIG_HT32F491X3_TMR2_PWM) || \
|
||||
defined(CONFIG_HT32F491X3_TMR4_PWM) || defined(CONFIG_HT32F491X3_TMR9_PWM) || \
|
||||
defined(CONFIG_HT32F491X3_TMR10_PWM) || defined(CONFIG_HT32F491X3_TMR11_PWM) || \
|
||||
defined(CONFIG_HT32F491X3_TMR12_PWM) || defined(CONFIG_HT32F491X3_TMR13_PWM) || \
|
||||
defined(CONFIG_HT32F491X3_TMR14_PWM)
|
||||
# error "esk32 currently exposes PWM only through TMR3"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_HT32F491X3_TMR3_PWM)
|
||||
# if CONFIG_HT32F491X3_TMR3_CHANNEL == 1
|
||||
# define BOARD_TMR3_PWM_GPIO_CLKEN (1u << 0)
|
||||
# define BOARD_TMR3_PWM_GPIO_BASE 0x40020000u
|
||||
# define BOARD_TMR3_PWM_GPIO_PIN 6u
|
||||
# define BOARD_TMR3_PWM_GPIO_AF 2u
|
||||
# elif CONFIG_HT32F491X3_TMR3_CHANNEL == 2
|
||||
# define BOARD_TMR3_PWM_GPIO_CLKEN (1u << 0)
|
||||
# define BOARD_TMR3_PWM_GPIO_BASE 0x40020000u
|
||||
# define BOARD_TMR3_PWM_GPIO_PIN 7u
|
||||
# define BOARD_TMR3_PWM_GPIO_AF 2u
|
||||
# elif CONFIG_HT32F491X3_TMR3_CHANNEL == 3
|
||||
# define BOARD_TMR3_PWM_GPIO_CLKEN (1u << 1)
|
||||
# define BOARD_TMR3_PWM_GPIO_BASE 0x40020400u
|
||||
# define BOARD_TMR3_PWM_GPIO_PIN 0u
|
||||
# define BOARD_TMR3_PWM_GPIO_AF 2u
|
||||
# elif CONFIG_HT32F491X3_TMR3_CHANNEL == 4
|
||||
# define BOARD_TMR3_PWM_GPIO_CLKEN (1u << 1)
|
||||
# define BOARD_TMR3_PWM_GPIO_BASE 0x40020400u
|
||||
# define BOARD_TMR3_PWM_GPIO_PIN 1u
|
||||
# define BOARD_TMR3_PWM_GPIO_AF 2u
|
||||
# else
|
||||
# error "Unsupported CONFIG_HT32F491X3_TMR3_CHANNEL value"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Board LED Pin Mapping
|
||||
****************************************************************************/
|
||||
@@ -82,6 +120,10 @@ void ht32f491x3_boardinitialize(void);
|
||||
|
||||
int board_app_initialize(uintptr_t arg);
|
||||
|
||||
#ifdef CONFIG_PWM
|
||||
int ht32_pwm_setup(void);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_USERLED) && !defined(CONFIG_ARCH_LEDS)
|
||||
uint32_t board_userled_initialize(void);
|
||||
void board_userled(int led, bool ledon);
|
||||
|
||||
@@ -30,6 +30,10 @@ if(CONFIG_USERLED)
|
||||
list(APPEND SRCS ht32_userleds.c)
|
||||
endif()
|
||||
|
||||
if(CONFIG_PWM)
|
||||
list(APPEND SRCS ht32_pwm.c)
|
||||
endif()
|
||||
|
||||
target_sources(board PRIVATE ${SRCS})
|
||||
|
||||
set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/ld.script")
|
||||
|
||||
@@ -34,4 +34,8 @@ ifeq ($(CONFIG_USERLED),y)
|
||||
CSRCS += ht32_userleds.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_PWM),y)
|
||||
CSRCS += ht32_pwm.c
|
||||
endif
|
||||
|
||||
include $(TOPDIR)/boards/Board.mk
|
||||
|
||||
@@ -57,6 +57,15 @@ static int ht32_bringup(void)
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PWM
|
||||
tmp = ht32_pwm_setup();
|
||||
if (tmp < 0 && tmp != -EEXIST)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: Failed to register /dev/pwm0: %d\n", tmp);
|
||||
ret = tmp;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FS_BINFS
|
||||
tmp = nx_mount(NULL, "/bin", "binfs", 0, NULL);
|
||||
if (tmp < 0 && tmp != -EBUSY)
|
||||
|
||||
@@ -0,0 +1,84 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/ht32f491x3/esk32/src/ht32_pwm.c
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with this
|
||||
* work for additional information regarding copyright ownership. The ASF
|
||||
* licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <errno.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
#include <nuttx/board.h>
|
||||
#include <nuttx/timers/pwm.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "arm_internal.h"
|
||||
#include "ht32f491x3_pwm.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ht32_pwm_setup
|
||||
*
|
||||
* Description:
|
||||
* Initialize PWM and register the PWM device.
|
||||
*
|
||||
* Return Value:
|
||||
* OK on success; a negated errno value on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int ht32_pwm_setup(void)
|
||||
{
|
||||
#ifdef CONFIG_PWM
|
||||
struct pwm_lowerhalf_s *pwm;
|
||||
int ret;
|
||||
|
||||
#if defined(CONFIG_HT32F491X3_TMR3_PWM)
|
||||
pwm = ht32f491x3_pwminitialize(3);
|
||||
if (!pwm)
|
||||
{
|
||||
pwmerr("ERROR: Failed to get the HT32 PWM lower half\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ret = pwm_register("/dev/pwm0", pwm);
|
||||
if (ret < 0)
|
||||
{
|
||||
pwmerr("ERROR: pwm_register failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return OK;
|
||||
#else
|
||||
return -ENODEV;
|
||||
#endif
|
||||
#else
|
||||
return -ENODEV;
|
||||
#endif
|
||||
}
|
||||
Reference in New Issue
Block a user