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docs/sdio: clarify 136-bit R2 format
This update adds comprehensive documentation regarding the 136-bit response format for SDIO, including the structure of the response, CRC handling, and necessary byte-shifting for alignment. This information is crucial for developers implementing or maintaining SDIO drivers. Signed-off-by: Arjav Patel <arjav1528@gmail.com>
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committed by
Alan C. Assis
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55e752ada8
commit
10c75d2722
@@ -693,6 +693,20 @@
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* status. The driver implementation should verify the correctness of
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* the remaining, non-returned bits (CRCs, CMD index, etc.).
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*
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* SDIO_RECVR2 (136-bit response): The 136-bit response has format: start
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* bit (1), transmission bit (0), 6 reserved bits (all 1), 128 bits of
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* CID/CSD data, 7-bit CRC, and end bit (1). The upper-half expects the
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* buffer to contain exactly 128 bits of payload in the standard layout
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* (e.g., r2[0] contains bits 127-96, r2[1] bits 95-64, etc.).
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*
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* The upper-half does not verify the CRC; that is the responsibility of
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* the lower-half. If the SDMMC controller hardware removes the trailing
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* CRC byte before storing the response, the resulting 128 bits will be
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* misaligned (often shifted right by 8 bits with leading zeros). In this
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* case, the lower-half implementation MUST shift the four 32-bit words
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* left by one byte to restore the expected 128-bit payload alignment.
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* See bcm2711_sdio.c or imx9_usdhc.c for examples of this byte-shifting.
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*
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* Input Parameters:
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* dev - An instance of the SDIO device interface
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* Rx - Buffer in which to receive the response
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