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arch/imx9: Add bidirectional dshot driver using i.MX9 FlexIO
Create a bidirectional dshot lower-half driver, using the flexio block. This driver enables use of DShot protocol for Electronic Speed Controllers (ESCs) typically used in drone motor control. Eight channels of DShot per flexio block are supported in: - Normal mode in all DShot speeds, with telemetry request (uart response needs to be handled outside of this driver) - Bidirectional mode in all DShot speeds, with telemetry request & response - Configurable to use either independent TX timers for each channel, or to use a common TX timer for all channels to synchronize the output - For bidirectional RX, each channel always uses an own timer. In normal mode, the driver operates without any interrupts. In bidirectional mode, the driver reconfigures the FlexIO timers (as needed) and shifters from TX to RX in the interrupt handler, and reads out the raw response packet. Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
This commit is contained in:
Jukka Laitinen
committed by
Xiang Xiao
Xiang Xiao
parent
b810cbe4d3
commit
101ff2c2bb
@@ -45,6 +45,10 @@ if(CONFIG_IMX9_FLEXIO_PWM)
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list(APPEND SRCS imx9_flexio_pwm.c)
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endif()
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if(CONFIG_IMX9_FLEXIO_DSHOT)
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list(APPEND SRCS imx9_flexio_dshot.c)
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endif()
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if(CONFIG_IMX9_TPM_PWM)
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list(APPEND SRCS imx9_tpm_pwm.c)
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endif()
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@@ -356,6 +356,93 @@ config IMX9_FLEXIO2_PWM_CHANNEL_PINS
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hex "FlexIO outputs used for FLEXIO2 timers"
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default 0x0000000000000000
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config IMX9_FLEXIO_DSHOT
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bool
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default n
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select DSHOT
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choice
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prompt "DShot timestamp source"
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default IMX9_FLEXIO_DSHOT_TS_SYSTIME
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depends on IMX9_FLEXIO_DSHOT
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config IMX9_FLEXIO_DSHOT_TS_SYSTIME
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bool "Use clock_systime"
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---help---
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Use clock_systime for dshot response timestamping
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config IMX9_FLEXIO_DSHOT_TS_BOARDTIME
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bool "Use board provided timestamping function"
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---help---
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Board-specific sources provide "board_systime_timespec"
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function, which is called to get timestamp. This can be used
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e.g. if some special time base is required for the timestamping.
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config IMX9_FLEXIO_DSHOT_TS_NONE
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bool "Timestamping disabled"
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---help---
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No timestamping, timestamps stay at 0
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endchoice # DShot timestamp source
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config IMX9_FLEXIO1_DSHOT
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bool "Enable FLEXIO1 based DShot"
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default n
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select IMX9_FLEXIO_DSHOT
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config IMX9_FLEXIO1_DSHOT_NCHANNELS
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int "Number of channels for FLEXIO1 DShot"
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depends on IMX9_FLEXIO1_DSHOT
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default 4
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range 1 8
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config IMX9_FLEXIO1_DSHOT_TX_TIMER
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int "FlexIO timer to use for TX on all channels"
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depends on IMX9_FLEXIO1_DSHOT
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default 6
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range -1 7
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---help---
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If set to -1, each DSHOT channel uses it's own individual timer.
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When set to timer 0-7, all the DSHOT TX channels use this common
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timer to clock out the TX messages. This reduces interrupt load
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and synchronizes all the channels to send out messages simultaneously.
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config IMX9_FLEXIO1_DSHOT_CHANNEL_PINS
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hex "FlexIO outputs used for FLEXIO1 DShot channels"
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depends on IMX9_FLEXIO1_DSHOT
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default 0x0000000007060504
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---help---
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Packed pin-index array: one byte per channel, byte 0 is channel 0.
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config IMX9_FLEXIO2_DSHOT
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bool "Enable FLEXIO2 based DShot"
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default n
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select IMX9_FLEXIO_DSHOT
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config IMX9_FLEXIO2_DSHOT_NCHANNELS
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int "Number of channels for FLEXIO2 DShot"
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depends on IMX9_FLEXIO2_DSHOT
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default 8
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range 1 8
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config IMX9_FLEXIO2_DSHOT_CHANNEL_PINS
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hex "FlexIO outputs used for FLEXIO2 DShot channels"
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depends on IMX9_FLEXIO2_DSHOT
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default 0x0000000007060504
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---help---
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Packed pin-index array: one byte per channel, byte 0 is channel 0.
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config IMX9_FLEXIO2_DSHOT_TX_TIMER
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int "FlexIO timer to use for TX on all channels"
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depends on IMX9_FLEXIO2_DSHOT
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default 6
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range -1 7
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---help---
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If set to -1, each DSHOT channel uses it's own individual timer.
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When set to timer 0-7, all the DSHOT TX channels use this common
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timer to clock out the TX messages. This reduces interrupt load
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and synchronizes all the channels to send out messages simultaneously.
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config IMX9_TPM_PWM
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bool
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select PWM_MULTICHAN
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@@ -56,6 +56,10 @@ ifeq ($(CONFIG_IMX9_FLEXIO_PWM),y)
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CHIP_CSRCS += imx9_flexio_pwm.c
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endif
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ifeq ($(CONFIG_IMX9_FLEXIO_DSHOT),y)
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CHIP_CSRCS += imx9_flexio_dshot.c
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endif
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ifeq ($(CONFIG_IMX9_TPM_PWM),y)
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CHIP_CSRCS += imx9_tpm_pwm.c
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endif
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@@ -66,6 +66,7 @@
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#define IMX9_FLEXIO_SHIFTCTL5_OFFSET 0x0094
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#define IMX9_FLEXIO_SHIFTCTL6_OFFSET 0x0098
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#define IMX9_FLEXIO_SHIFTCTL7_OFFSET 0x009c
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#define IMX9_FLEXIO_SHIFTCTL_OFFSET(x) (IMX9_FLEXIO_SHIFTCTL0_OFFSET + (x) * 4)
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#define IMX9_FLEXIO_SHIFTCFG0_OFFSET 0x0100 /* Shifter Configuration N Register, array offset: 0x100, array step: 0x4 */
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#define IMX9_FLEXIO_SHIFTCFG1_OFFSET 0x0104
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#define IMX9_FLEXIO_SHIFTCFG2_OFFSET 0x0108
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@@ -74,6 +75,7 @@
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#define IMX9_FLEXIO_SHIFTCFG5_OFFSET 0x0114
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#define IMX9_FLEXIO_SHIFTCFG6_OFFSET 0x0118
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#define IMX9_FLEXIO_SHIFTCFG7_OFFSET 0x011c
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#define IMX9_FLEXIO_SHIFTCFG_OFFSET(x) (IMX9_FLEXIO_SHIFTCFG0_OFFSET + (x) * 4)
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#define IMX9_FLEXIO_SHIFTBUF0_OFFSET 0x0200 /* Shifter Buffer N Register, array offset: 0x200, array step: 0x4 */
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#define IMX9_FLEXIO_SHIFTBUF1_OFFSET 0x0204
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#define IMX9_FLEXIO_SHIFTBUF2_OFFSET 0x0208
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@@ -82,6 +84,7 @@
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#define IMX9_FLEXIO_SHIFTBUF5_OFFSET 0x0214
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#define IMX9_FLEXIO_SHIFTBUF6_OFFSET 0x0218
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#define IMX9_FLEXIO_SHIFTBUF7_OFFSET 0x021c
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#define IMX9_FLEXIO_SHIFTBUF_OFFSET(x) (IMX9_FLEXIO_SHIFTBUF0_OFFSET + (x) * 4)
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#define IMX9_FLEXIO_SHIFTBUFBIS0_OFFSET 0x0280 /* Shifter Buffer N Bit Swapped Register, array offset: 0x280, array step: 0x4 */
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#define IMX9_FLEXIO_SHIFTBUFBIS1_OFFSET 0x0284
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#define IMX9_FLEXIO_SHIFTBUFBIS2_OFFSET 0x0288
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@@ -90,6 +93,7 @@
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#define IMX9_FLEXIO_SHIFTBUFBIS5_OFFSET 0x0294
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#define IMX9_FLEXIO_SHIFTBUFBIS6_OFFSET 0x0298
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#define IMX9_FLEXIO_SHIFTBUFBIS7_OFFSET 0x029c
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#define IMX9_FLEXIO_SHIFTBUFBIS_OFFSET(x) (IMX9_FLEXIO_SHIFTBUFBIS0_OFFSET + (x) * 4)
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#define IMX9_FLEXIO_SHIFTBUFBYS0_OFFSET 0x0300 /* Shifter Buffer N Byte Swapped Register, array offset: 0x300, array step: 0x4 */
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#define IMX9_FLEXIO_SHIFTBUFBYS1_OFFSET 0x0304
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#define IMX9_FLEXIO_SHIFTBUFBYS2_OFFSET 0x0308
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@@ -98,6 +102,7 @@
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#define IMX9_FLEXIO_SHIFTBUFBYS5_OFFSET 0x0314
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#define IMX9_FLEXIO_SHIFTBUFBYS6_OFFSET 0x0318
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#define IMX9_FLEXIO_SHIFTBUFBYS7_OFFSET 0x031c
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#define IMX9_FLEXIO_SHIFTBUFBYS_OFFSET(x) (IMX9_FLEXIO_SHIFTBUFBYS0_OFFSET + (x) * 4)
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#define IMX9_FLEXIO_SHIFTBUFBBS0_OFFSET 0x0380 /* Shifter Buffer N Bit Byte Swapped Register, array offset: 0x380, array step: 0x4 */
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#define IMX9_FLEXIO_SHIFTBUFBBS1_OFFSET 0x0384
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#define IMX9_FLEXIO_SHIFTBUFBBS2_OFFSET 0x0388
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@@ -106,6 +111,7 @@
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#define IMX9_FLEXIO_SHIFTBUFBBS5_OFFSET 0x0394
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#define IMX9_FLEXIO_SHIFTBUFBBS6_OFFSET 0x0398
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#define IMX9_FLEXIO_SHIFTBUFBBS7_OFFSET 0x039c
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#define IMX9_FLEXIO_SHIFTBUFBBS_OFFSET(x) (IMX9_FLEXIO_SHIFTBUFBBS0_OFFSET + (x) * 4)
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#define IMX9_FLEXIO_TIMCTL0_OFFSET 0x0400 /* Timer Control N Register, array offset: 0x400, array step: 0x4 */
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#define IMX9_FLEXIO_TIMCTL1_OFFSET 0x0404
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#define IMX9_FLEXIO_TIMCTL2_OFFSET 0x0408
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@@ -603,6 +609,16 @@
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#define FLEXIO_TIMCTL_TIMOD(x) ((((uint32_t)(x)) << FLEXIO_TIMCTL_TIMOD_SHIFT) & FLEXIO_TIMCTL_TIMOD_MASK)
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#define FLEXIO_TIMCTL_ONETIM_MASK (0x20u)
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#define FLEXIO_TIMCTL_ONETIM_SHIFT (5u)
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/* ONETIM - Timer One Time Operation
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* 0b0..Event is generated as normal
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* 0b1..Event is blocked unless timer status flag is clear
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*/
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#define FLEXIO_TIMCTL_ONETIM(x) ((((uint32_t)(x)) << FLEXIO_TIMCTL_ONETIM_SHIFT) & FLEXIO_TIMCTL_ONETIM_MASK)
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#define FLEXIO_TIMCTL_PINPOL_MASK (0x80u)
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#define FLEXIO_TIMCTL_PINPOL_SHIFT (7u)
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,107 @@
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/****************************************************************************
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* arch/arm64/src/imx9/imx9_flexio_dshot.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM64_SRC_IMX9_IMX9_FLEXIO_DSHOT_H
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#define __ARCH_ARM64_SRC_IMX9_IMX9_FLEXIO_DSHOT_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <nuttx/timers/dshot.h>
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#ifdef CONFIG_IMX9_FLEXIO_DSHOT
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* There are 8 shifters and timers per one FlexIO IP */
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#if CONFIG_DSHOT_NCHANNELS > 8
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# error Driver supports max 8 channels per flexio (CONFIG_DSHOT_NCHANNELS)
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#endif
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#define DSHOT_MAX_CHANNELS CONFIG_DSHOT_NCHANNELS
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* Which FlexIO instance backs this DShot device */
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typedef enum
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{
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DSHOT_FLEXIO1 = 0,
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DSHOT_FLEXIO2 = 1,
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} flexio_dshot_id_t;
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Name: imx9_flexio_dshot_init
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*
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* Description:
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* Initialise a FlexIO-backed DShot lower-half instance.
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*
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* Channel count and pin mapping are taken from Kconfig
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* (CONFIG_IMX9_FLEXIOx_DSHOT_NCHANNELS,
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* CONFIG_IMX9_FLEXIOx_DSHOT_CHANNEL_PINS). These use the same FlexIO
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* output numbers as the FlexIO PWM driver. The corresponding board
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* IOMUXC macros must be provided, and the driver applies the required
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* pinmux configuration during setup.
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*
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* Input Parameters:
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* id - Which FlexIO instance to use (DSHOT_FLEXIO1 / DSHOT_FLEXIO2)
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*
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* Returned Value:
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* A valid pointer to struct dshot_lowerhalf_s on success; NULL on failure.
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*
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****************************************************************************/
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struct dshot_lowerhalf_s *imx9_flexio_dshot_init(flexio_dshot_id_t id);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_IMX9_FLEXIO_DSHOT */
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#endif /* __ARCH_ARM64_SRC_IMX9_IMX9_FLEXIO_DSHOT_H */
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