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boards/stm32g4: migrate to new pinmap

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migrate stm32g4 to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl
2026-04-23 12:51:05 +02:00
committed by simbit18
parent 801bf3e9a4
commit 0efe8c4f42
24 changed files with 57 additions and 32 deletions
Download Patch File Download Diff File Expand all files Collapse all files
boards/arm/stm32/b-g474e-dpow1/configs/buckboost/defconfig
+1
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@@ -6,6 +6,7 @@
# modifications. # modifications.
# #
# CONFIG_ARCH_LEDS is not set # CONFIG_ARCH_LEDS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y CONFIG_ADC=y
CONFIG_ANALOG=y CONFIG_ANALOG=y
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
boards/arm/stm32/b-g474e-dpow1/configs/nsh/defconfig
+1
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@@ -7,6 +7,7 @@
# #
# CONFIG_ARCH_LEDS is not set # CONFIG_ARCH_LEDS is not set
# CONFIG_DISABLE_OS_API is not set # CONFIG_DISABLE_OS_API is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g474e-dpow1" CONFIG_ARCH_BOARD="b-g474e-dpow1"
CONFIG_ARCH_BOARD_B_G474E_DPOW1=y CONFIG_ARCH_BOARD_B_G474E_DPOW1=y
boards/arm/stm32/b-g474e-dpow1/configs/ostest/defconfig
+1
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@@ -7,6 +7,7 @@
# #
# CONFIG_ARCH_LEDS is not set # CONFIG_ARCH_LEDS is not set
# CONFIG_DISABLE_OS_API is not set # CONFIG_DISABLE_OS_API is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g474e-dpow1" CONFIG_ARCH_BOARD="b-g474e-dpow1"
CONFIG_ARCH_BOARD_B_G474E_DPOW1=y CONFIG_ARCH_BOARD_B_G474E_DPOW1=y
boards/arm/stm32/b-g474e-dpow1/include/board.h
+7
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@@ -246,4 +246,11 @@
#endif /* CONFIG_EXAMPLES_SMPS */ #endif /* CONFIG_EXAMPLES_SMPS */
/* HRTIM */
#define GPIO_HRTIM1_CHC1 GPIO_HRTIM1_CHC1_0
#define GPIO_HRTIM1_CHC2 GPIO_HRTIM1_CHC2_0
#define GPIO_HRTIM1_CHD1 GPIO_HRTIM1_CHD1_0
#define GPIO_HRTIM1_CHD2 GPIO_HRTIM1_CHD2_0
#endif /* __BOARDS_ARM_STM32_B_G474E_DPOW1_INCLUDE_BOARD_H */ #endif /* __BOARDS_ARM_STM32_B_G474E_DPOW1_INCLUDE_BOARD_H */
boards/arm/stm32/b-g474e-dpow1/src/stm32_smps.c
+2 -2
View File
@@ -308,8 +308,8 @@ static const uint8_t g_adc1chan[ADC1_NCHANNELS] =
static const uint32_t g_adc1pins[ADC1_NCHANNELS] = static const uint32_t g_adc1pins[ADC1_NCHANNELS] =
{ {
GPIO_ADC1_IN2, /* PA1 - V_IN */ GPIO_ADC1_IN2_0, /* PA1 - V_IN */
GPIO_ADC1_IN4, /* PA3 - V_OUT */ GPIO_ADC1_IN4_0, /* PA3 - V_OUT */
}; };
/**************************************************************************** /****************************************************************************
boards/arm/stm32/nucleo-g431kb/configs/comp/defconfig
+1
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@@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your # You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications. # modifications.
# #
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ANALOG=y CONFIG_ANALOG=y
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431kb" CONFIG_ARCH_BOARD="nucleo-g431kb"
boards/arm/stm32/nucleo-g431kb/configs/nsh/defconfig
+1
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@@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set # CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431kb" CONFIG_ARCH_BOARD="nucleo-g431kb"
CONFIG_ARCH_BOARD_NUCLEO_G431KB=y CONFIG_ARCH_BOARD_NUCLEO_G431KB=y
boards/arm/stm32/nucleo-g431kb/configs/pwm/defconfig
+1
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@@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your # You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications. # modifications.
# #
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431kb" CONFIG_ARCH_BOARD="nucleo-g431kb"
CONFIG_ARCH_BOARD_NUCLEO_G431KB=y CONFIG_ARCH_BOARD_NUCLEO_G431KB=y
boards/arm/stm32/nucleo-g431kb/include/board.h
+1 -1
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@@ -240,7 +240,7 @@
/* TIM1 PWM */ /* TIM1 PWM */
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 /* PA8 */ #define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz) /* PA8 */
/* Comparators configuration ************************************************/ /* Comparators configuration ************************************************/
boards/arm/stm32/nucleo-g431rb/configs/adc/defconfig
+1
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@@ -7,6 +7,7 @@
# #
# CONFIG_ARCH_FPU is not set # CONFIG_ARCH_FPU is not set
# CONFIG_LIBC_LONG_LONG is not set # CONFIG_LIBC_LONG_LONG is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
# CONFIG_SYSTEM_DD is not set # CONFIG_SYSTEM_DD is not set
CONFIG_ADC=y CONFIG_ADC=y
CONFIG_ANALOG=y CONFIG_ANALOG=y
boards/arm/stm32/nucleo-g431rb/configs/can/defconfig
+1
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@@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set # CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb" CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
boards/arm/stm32/nucleo-g431rb/configs/cansock/defconfig
+1
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@@ -7,6 +7,7 @@
# #
# CONFIG_NET_ETHERNET is not set # CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set # CONFIG_NET_IPv4 is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ALLOW_BSD_COMPONENTS=y
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb" CONFIG_ARCH_BOARD="nucleo-g431rb"
boards/arm/stm32/nucleo-g431rb/configs/cordic/defconfig
+1
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@@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set # CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb" CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
boards/arm/stm32/nucleo-g431rb/configs/ihm16m1_b16/defconfig
+1
View File
@@ -7,6 +7,7 @@
# #
# CONFIG_DISABLE_MQUEUE is not set # CONFIG_DISABLE_MQUEUE is not set
# CONFIG_DISABLE_PTHREAD is not set # CONFIG_DISABLE_PTHREAD is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y CONFIG_ADC=y
CONFIG_ADC_FIFOSIZE=3 CONFIG_ADC_FIFOSIZE=3
CONFIG_ANALOG=y CONFIG_ANALOG=y
boards/arm/stm32/nucleo-g431rb/configs/ihm16m1_f32/defconfig
+1
View File
@@ -7,6 +7,7 @@
# #
# CONFIG_DISABLE_MQUEUE is not set # CONFIG_DISABLE_MQUEUE is not set
# CONFIG_DISABLE_PTHREAD is not set # CONFIG_DISABLE_PTHREAD is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y CONFIG_ADC=y
CONFIG_ADC_FIFOSIZE=3 CONFIG_ADC_FIFOSIZE=3
CONFIG_ANALOG=y CONFIG_ANALOG=y
boards/arm/stm32/nucleo-g431rb/configs/nsh/defconfig
+1
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@@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set # CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb" CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
boards/arm/stm32/nucleo-g431rb/configs/pwm/defconfig
+1
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@@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your # You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications. # modifications.
# #
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb" CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
boards/arm/stm32/nucleo-g431rb/configs/qenco/defconfig
+1
View File
@@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set # CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb" CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_COMMON=y CONFIG_ARCH_BOARD_COMMON=y
boards/arm/stm32/nucleo-g431rb/include/board.h
+15 -15
View File
@@ -320,8 +320,8 @@
/* TIM2 input ***************************************************************/ /* TIM2 input ***************************************************************/
#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_3 | GPIO_PULLUP) /* PA15 */ #define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_3 | GPIO_PULLUP | GPIO_SPEED_50MHz) /* PA15 */
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_2 | GPIO_PULLUP) /* PB3 */ #define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_2 | GPIO_PULLUP | GPIO_SPEED_50MHz) /* PB3 */
/* USART2 (STLINK Virtual COM Port) */ /* USART2 (STLINK Virtual COM Port) */
@@ -332,18 +332,18 @@
/* TIM1 PWM */ /* TIM1 PWM */
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 /* PA8 */ #define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz) /* PA8 */
#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1NOUT_2 /* PA11 */ #define GPIO_TIM1_CH1NOUT (GPIO_TIM1_CH1NOUT_2|GPIO_SPEED_50MHz) /* PA11 */
#define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_1 /* PA9 */ #define GPIO_TIM1_CH2OUT (GPIO_TIM1_CH2OUT_1|GPIO_SPEED_50MHz) /* PA9 */
#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2NOUT_1 /* PA12 */ #define GPIO_TIM1_CH2NOUT (GPIO_TIM1_CH2NOUT_1|GPIO_SPEED_50MHz) /* PA12 */
#define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 /* PA10 */ #define GPIO_TIM1_CH3OUT (GPIO_TIM1_CH3OUT_1|GPIO_SPEED_50MHz) /* PA10 */
#define GPIO_TIM1_CH3NOUT GPIO_TIM1_CH3NOUT_1 /* PB1 */ #define GPIO_TIM1_CH3NOUT (GPIO_TIM1_CH3NOUT_1|GPIO_SPEED_50MHz) /* PB1 */
#define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_2 /* PC3 */ #define GPIO_TIM1_CH4OUT (GPIO_TIM1_CH4OUT_2|GPIO_SPEED_50MHz) /* PC3 */
/* CAN configuration ********************************************************/ /* CAN configuration ********************************************************/
#define GPIO_FDCAN1_RX GPIO_FDCAN1_RX_2 /* PB8 */ #define GPIO_FDCAN1_RX (GPIO_FDCAN1_RX_2|GPIO_SPEED_50MHz) /* PB8 */
#define GPIO_FDCAN1_TX GPIO_FDCAN1_TX_2 /* PB9 */ #define GPIO_FDCAN1_TX (GPIO_FDCAN1_TX_2|GPIO_SPEED_50MHz) /* PB9 */
/* DMA channels *************************************************************/ /* DMA channels *************************************************************/
@@ -364,10 +364,10 @@
/* TIM1 configuration *******************************************************/ /* TIM1 configuration *******************************************************/
# define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 /* TIM1 CH1 - PA8 - U high */ # define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz) /* TIM1 CH1 - PA8 - U high */
# define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_1 /* TIM1 CH2 - PA9 - V high */ # define GPIO_TIM1_CH2OUT (GPIO_TIM1_CH2OUT_1|GPIO_SPEED_50MHz) /* TIM1 CH2 - PA9 - V high */
# define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 /* TIM1 CH3 - PA10 - W high */ # define GPIO_TIM1_CH3OUT (GPIO_TIM1_CH3OUT_1|GPIO_SPEED_50MHz) /* TIM1 CH3 - PA10 - W high */
# define GPIO_TIM1_CH4OUT 0 /* not used as output */ # define GPIO_TIM1_CH4OUT 0 /* not used as output */
/* UVW ENABLE */ /* UVW ENABLE */
boards/arm/stm32/nucleo-g431rb/src/stm32_adc.c
+9 -9
View File
@@ -89,9 +89,9 @@ static const uint8_t g_chanlist1[3] =
static const uint32_t g_pinlist1[3] = static const uint32_t g_pinlist1[3] =
{ {
GPIO_ADC1_IN1, /* PA0/A0 */ GPIO_ADC1_IN1_0, /* PA0/A0 */
GPIO_ADC1_IN2, /* PA1/A1 */ GPIO_ADC1_IN2_0, /* PA1/A1 */
GPIO_ADC1_IN15, /* PB0/A3 */ GPIO_ADC1_IN15_0, /* PB0/A3 */
}; };
#elif DEV1_PORT == 2 #elif DEV1_PORT == 2
@@ -111,9 +111,9 @@ static const uint8_t g_chanlist1[3] =
static const uint32_t g_pinlist1[3] = static const uint32_t g_pinlist1[3] =
{ {
GPIO_ADC2_IN17, /* PA4/A2 */ GPIO_ADC2_IN17_0, /* PA4/A2 */
GPIO_ADC2_IN7, /* PC1/A4 */ GPIO_ADC2_IN7_0, /* PC1/A4 */
GPIO_ADC2_IN6, /* PC0/A5 */ GPIO_ADC2_IN6_0, /* PC0/A5 */
}; };
#endif /* DEV1_PORT == 1 */ #endif /* DEV1_PORT == 1 */
@@ -139,9 +139,9 @@ static const uint8_t g_chanlist2[3] =
static const uint32_t g_pinlist2[3] = static const uint32_t g_pinlist2[3] =
{ {
GPIO_ADC2_IN17, /* PA4/A2 */ GPIO_ADC2_IN17_0, /* PA4/A2 */
GPIO_ADC2_IN7, /* PC1/A4 */ GPIO_ADC2_IN7_0, /* PC1/A4 */
GPIO_ADC2_IN6, /* PC0/A5 */ GPIO_ADC2_IN6_0, /* PC0/A5 */
}; };
#endif /* DEV2_PORT == 2 */ #endif /* DEV2_PORT == 2 */
boards/arm/stm32/nucleo-g431rb/src/stm32_foc_ihm16m1.c
+5 -5
View File
@@ -102,17 +102,17 @@ static uint8_t g_adc1_chan[] =
static uint32_t g_adc1_pins[] = static uint32_t g_adc1_pins[] =
{ {
#ifdef CONFIG_BOARD_STM32_IHM16M1_VBUS #ifdef CONFIG_BOARD_STM32_IHM16M1_VBUS
GPIO_ADC1_IN1, GPIO_ADC1_IN1_0,
#endif #endif
#ifdef CONFIG_BOARD_STM32_IHM16M1_POT #ifdef CONFIG_BOARD_STM32_IHM16M1_POT
GPIO_ADC1_IN8, GPIO_ADC1_IN8_0,
#endif #endif
GPIO_ADC1_IN2, GPIO_ADC1_IN2_0,
#if CONFIG_MOTOR_FOC_SHUNTS > 1 #if CONFIG_MOTOR_FOC_SHUNTS > 1
GPIO_ADC1_IN12, GPIO_ADC1_IN12_0,
#endif #endif
#if CONFIG_MOTOR_FOC_SHUNTS > 2 #if CONFIG_MOTOR_FOC_SHUNTS > 2
GPIO_ADC1_IN15, GPIO_ADC1_IN15_0,
#endif #endif
}; };
boards/arm/stm32/nucleo-g474re/configs/lpuartnsh/defconfig
+1
View File
@@ -7,6 +7,7 @@
# #
# CONFIG_ARCH_LEDS is not set # CONFIG_ARCH_LEDS is not set
# CONFIG_DISABLE_OS_API is not set # CONFIG_DISABLE_OS_API is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g474re" CONFIG_ARCH_BOARD="nucleo-g474re"
CONFIG_ARCH_BOARD_NUCLEO_G474RE=y CONFIG_ARCH_BOARD_NUCLEO_G474RE=y
boards/arm/stm32/nucleo-g474re/configs/nsh/defconfig
+1
View File
@@ -7,6 +7,7 @@
# #
# CONFIG_ARCH_LEDS is not set # CONFIG_ARCH_LEDS is not set
# CONFIG_DISABLE_OS_API is not set # CONFIG_DISABLE_OS_API is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g474re" CONFIG_ARCH_BOARD="nucleo-g474re"
CONFIG_ARCH_BOARD_NUCLEO_G474RE=y CONFIG_ARCH_BOARD_NUCLEO_G474RE=y
boards/arm/stm32/nucleo-g474re/configs/usbserial/defconfig
+1
View File
@@ -7,6 +7,7 @@
# #
# CONFIG_ARCH_LEDS is not set # CONFIG_ARCH_LEDS is not set
# CONFIG_DISABLE_OS_API is not set # CONFIG_DISABLE_OS_API is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g474re" CONFIG_ARCH_BOARD="nucleo-g474re"
CONFIG_ARCH_BOARD_NUCLEO_G474RE=y CONFIG_ARCH_BOARD_NUCLEO_G474RE=y