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docs/platforms/arm/imx9: add imx93-qsb documentation.
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Add a writeup of currently supported features with a picture and block diagram. Signed-off-by: Maarten Zanders <maarten@zanders.be>
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Maarten Zanders
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Xiang Xiao
Xiang Xiao
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============
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IMX93QSB-M33
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============
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.. tags:: arch:arm, arch:armv8m, arch:cm33, chip:imx93, vendor:nxp
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The IMX93-QSB board is a platform made by NXP, designed to show the most commonly
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used features of the `i.MX 93 applications processor <https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-9-processors/i-mx-93-applications-processor-family-arm-cortex-a55-ml-acceleration-power-efficient-mpu:i.MX93>`_.
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Be sure to visit the `IMX93QSB product page <https://www.nxp.com/design/design-center/development-boards-and-designs/IMX93QSB>`_.
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.. figure:: imx93-qsb.jpg
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:alt: i.MX93-QSB board Layout
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:align: center
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i.MX93-QSB board Layout
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.. figure:: imx93-qsb-blockdiagram.svg
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:alt: i.MX93-QSB simplified block diagram
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:align: center
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i.MX93-QSB simplified block diagram
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Features
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========
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- Multicore Processing [1]_
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- 2x Arm Cortex-A55
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- 1x Arm Cortex-M33
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- Memory
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- On-Chip Memory
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- 256kB TCM (ITCM + DTCM)
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- 640kB OCRAM
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- External Memory
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- 2GB LPDDR4X
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- Storage
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- 16GB eMMC
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- 1x Octal SPI, including support for SPI NOR and SPI NAND memories
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- µSDcard
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- Connectivity
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- CAN FD
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- UART/USART
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- I²C
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- SPI
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- SAI
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- Ethernet
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- WiFi/BT (Through M2 module)
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- On board peripherals
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- IMU (ST LSM6DSOXTR)
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- Audio CODEC (Cirrus WM8962B)
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Note that by default the interfaces and peripherals are configured for use by the A55
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core in Linux.
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.. warning::
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Other than LPUART2 as console, as of today no other interfaces have been tested
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from the M33 core in NuttX.
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.. [1] NuttX is supported on both cores. This port is for the M33. Look in
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ARM64 for the A55 port (targets a slightly different board, IMX93-EVK).
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USB-to-UART bridge
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==================
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The "DBG" USB-C connector connects to an FTDI 4232 chip. It has four channels:
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1. SWD/JTAG interface (OpenOCD)
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2. I2C master
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3. Debug UART for A55 core
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4. Debug UART for M33 core (typically /dev/ttyUSB3)
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Default settings for the debug UARTs are 115200 8N1.
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Firmware Location
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=================
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Instruction Tightly Coupled Memory (ITCM)
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-----------------------------------------
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The Tightly-Coupled Memory (TCM) provides low-latency, deterministic access
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without cache unpredictability. By default, firmware is located in ITCM
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(128kB). This is the preferred location for real-time and latency-sensitive
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workloads but gets full quite fast.
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DDR
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---
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DDR memory can be used when the code or data footprint exceeds TCM capacity.
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When running from DDR, the XCache (external cache) should be enabled to
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achieve acceptable performance. The following adaptations are required on the
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other core:
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- imx-atf (Arm Trusted Firmware) - https://github.com/nxp-imx/imx-atf.git must
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grant the application M33 core access to the DDR region for code execution.
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The required change is in ``plat/imx/imx93/trdc_config.h``: for the ``MRC0`` DRAM entry
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belonging to the M33 (DID2), change the ``GLBAC`` index from 0 to 1 and the lock
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flag from true to false. This grants the M33 read/write access to the full DDR
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region using the permissive ``GLBAC1`` policy, matching the access configuration
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used by the A55 and other bus masters.
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- Linux on A55 must reserve the DDR region in the device tree:
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.. code:: devicetree
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/ {
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reserved-memory {
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m33_reserved: m33@89000000 {
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no-map;
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reg = <0 0x89000000 0 0x1000000>;
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};
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};
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};
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&cm33 {
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memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
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<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>, <&m33_reserved>;
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};
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XCache
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------
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The i.MX93 Cortex-M33 can make use of the external cache (XCACHE) to improve
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performance when executing from or accessing DDR memory. The ``nsh-ddr``
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configuration enables XCACHE. Cache coherency with the A55 must be managed
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carefully.
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Installation
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============
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Except for the modifications documented here, the configurations should run from
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the default Linux image as provided with the development kit.
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It is highly advised to configure a yocto environment for development on the
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Linux side of the i.MX93. More information on the NXP application notes and
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manuals which you can find through the NXP iMX93 processor link above.
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Building NuttX
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==============
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To configure and build NuttX you follow the standard NuttX flow:
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.. code:: console
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$ cd nuttx
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$ tools/configure.sh imx93-qsb:rpmsg
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$ make
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Board specific feature:
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* ``CONFIG_IMX93_START_NSH_ON_RPMSG``: Start an extra NSH instance on a RPMSG UART
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Launching
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=========
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The supported boot configuration is to boot the A55 first and from here
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boot the auxiliary CPU (M33).
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There are two supported options to start the NuttX image:
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1. Use remoteproc in Linux
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--------------------------
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Copy the **ELF file** of the nuttx build (filename ``nuttx``) to
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``/lib/firmware/rproc-imx-rproc-fw``, on the A55 core (Linux). This is
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the default firmware name for this remoteproc. If using an alternative
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name, be sure to enter this in ``/sys/class/remoteproc/remoteproc0/firmware``.
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Then start the M33:
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.. code:: console
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$ echo start > /sys/class/remoteproc/remoteproc0/state
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2. From the bootloader
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----------------------
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Copy the **binary** file (``nuttx.bin``) to the boot partition in Linux,
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typically this is ``/dev/mmcblk0p1``, but depends on the partitioning scheme.
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In the bootloader, load the file and start the auxiliary CPU:
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.. code:: console
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u-boot=> fatload mmc 0:1 0x89000000 nuttx.bin
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u-boot=> dcache flush
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u-boot=> bootaux 0x89000000
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.. todo::
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Loading from the bootloader currently only works for DDR builds as the
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bootloader doesn't have access to ITCM by default. Also, the remoteproc
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initialisation in Linux fails when booting the A55 later.
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To be investigated.
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Debugging
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=========
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Disable UART5 in the Linux devicetree for using the JTAG/SWD interface as there
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is a pin conflict otherwise. You should also remove the M2 module from its slot.
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In a devicetree overlay:
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.. code:: devicetree
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&lpuart5 {
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/* BT */
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status = "disabled";
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};
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The IMX93-QSB board provides a standard JTAG/SWD header for connecting an
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external debug probe (e.g. J-Link or CMSIS-DAP) to debug the Cortex-M33 core.
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For starting the J-Link gdb server:
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.. code:: console
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$ JLinkGDBServer -device MIMX9322_M33 -if JTAG -speed 4000 -noir -rtos RTOSPlugin_NuttX.so
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.. note::
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The default initialisation of JLink does not allow loading the ELF and starting the
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M33 when it is still in reset. Some CPU registers are not properly initialized. It is
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easiest to have remoteproc load and start the firmware first and only then connect the
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debugger. Loading the ELF through the debugger works afterwards.
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The on-board debug interface can alternatively be used via the USB DEBUG connection
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(see channel 1 above). In order for this to work, you need to set GPIO 4 (rc_sel) of the
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I2C IO expander at address 0x21. This I2C bus can be accessed through the same
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USB interface at channel 2. The ``enable_onboard_debug.py`` script in the ``tools``
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directory accomplishes just that, using pyftdi.
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Configurations
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==============
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Only a set of basic configurations are provided at this time. No IO's directly
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connected to the M33, other than the debug UART, are tested as of today.
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nsh
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---
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Very basic configuration which only spawns ``nsh`` on the debug serial port.
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The firmware runs from ITCM. This configuration is focused on low-level,
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command-line driver testing. Built-in applications are supported but none are
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enabled by default.
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nsh-ddr
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-------
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Identical to the ``nsh`` configuration but the firmware is linked to run from
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DDR memory. The XCache (``CONFIG_ARCH_HAVE_XCACHE``) is enabled to compensate
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for DDR latency. This configuration is useful when the firmware footprint
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exceeds ITCM capacity.
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.. note::
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See requirements for running from DDR above.
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rpmsg
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-----
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Configures the NuttShell (nsh) running from ITCM and enables the Remote
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Processor Messaging (RPMsg) service for heterogeneous inter-core communication
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with the A55/Linux. A virtual UART (``CONFIG_RPMSG_UART_RAW``) is exposed over
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RPMsg, allowing a terminal session to be opened from Linux. The physical UART
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is still the main console and also hosts an NSH instance to help debugging.
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After launching, simply open ``/dev/ttyRPMSG0`` on the Linux side:
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.. code:: console
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$ minicom -D /dev/ttyRPMSG0
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